clk: rockchip: clk-pvtpll: update cpu/npu pvtpll config for rv1126b

Change-Id: I3a594b18b8c6ced41f13fd6abdc7783b8083612d
Signed-off-by: Liang Chen <cl@rock-chips.com>
This commit is contained in:
Liang Chen
2025-04-17 16:59:43 +08:00
parent 1b882fcf73
commit ab74750ff8

View File

@@ -152,10 +152,10 @@ static struct pvtpll_table rv1126b_aisp_pvtpll_table[] = {
static struct pvtpll_table rv1126b_core_pvtpll_table[] = {
/* rate_hz, ring_sel, length */
ROCKCHIP_PVTPLL_VOLT_SEL(1608000000, 0, 30, 0),
ROCKCHIP_PVTPLL_VOLT_SEL(1512000000, 0, 30, 7),
ROCKCHIP_PVTPLL_VOLT_SEL(1416000000, 0, 34, 6),
ROCKCHIP_PVTPLL_VOLT_SEL(1296000000, 0, 38, 5),
ROCKCHIP_PVTPLL_VOLT_SEL(1608000000, 0, 30, 7),
ROCKCHIP_PVTPLL_VOLT_SEL(1512000000, 0, 30, 5),
ROCKCHIP_PVTPLL_VOLT_SEL(1416000000, 0, 34, 4),
ROCKCHIP_PVTPLL_VOLT_SEL(1296000000, 0, 38, 3),
ROCKCHIP_PVTPLL_VOLT_SEL(1200000000, 0, 38, 3),
ROCKCHIP_PVTPLL_VOLT_SEL(1008000000, 0, 52, 3),
ROCKCHIP_PVTPLL_VOLT_SEL(816000000, 0, 84, 3),
@@ -173,10 +173,10 @@ static struct pvtpll_table rv1126b_isp_pvtpll_table[] = {
static struct pvtpll_table rv1126b_npu_pvtpll_table[] = {
/* rate_hz, ring_se, length, volt_sel_thr */
ROCKCHIP_PVTPLL_VOLT_SEL(1000000000, 0, 12, 7),
ROCKCHIP_PVTPLL_VOLT_SEL(950000000, 0, 12, 5),
ROCKCHIP_PVTPLL_VOLT_SEL(900000000, 0, 14, 4),
ROCKCHIP_PVTPLL_VOLT_SEL(800000000, 0, 16, 4),
ROCKCHIP_PVTPLL_VOLT_SEL(1000000000, 0, 12, 5),
ROCKCHIP_PVTPLL_VOLT_SEL(950000000, 0, 12, 3),
ROCKCHIP_PVTPLL_VOLT_SEL(900000000, 0, 14, 2),
ROCKCHIP_PVTPLL_VOLT_SEL(800000000, 0, 16, 2),
ROCKCHIP_PVTPLL_VOLT_SEL(700000000, 0, 36, 3),
};