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osd: add osd blend reg config check. [1/4]

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PD#SWPL-2049

Problem:
osd3 din blend config may be incorrect when viu2 is enable

Solution:
add osd blend reg config check

Verify:
verify by AC202(sm1)

Change-Id: I3d8ff0d247226d4df1386808caba2a21a34f0b10
Signed-off-by: Dezhi Kong <dezhi.kong@amlogic.com>
This commit is contained in:
Dezhi Kong
2019-08-28 16:11:53 +08:00
committed by Chris KIM
parent 0a23a896e3
commit ab989433a4
1 changed files with 4 additions and 9 deletions
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13
drivers/amlogic/media/osd/osd_hw.c
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@@ -8130,18 +8130,13 @@ static void set_blend_reg(struct layer_blend_reg_s *blend_reg)
VSYNCOSD_WR_MPEG_REG(
VIU_OSD_BLEND_DIN0_SCOPE_H + reg_offset * i,
blend_reg->osd_blend_din_scope_h[i]);
}
if ((blend_reg->osd_blend_din_scope_v[i] & 0xffff0000) == 0)
blend_reg->osd_blend_din_scope_v[i] =
0xffffffff;
VSYNCOSD_WR_MPEG_REG(
VIU_OSD_BLEND_DIN0_SCOPE_V + reg_offset * i,
blend_reg->osd_blend_din_scope_v[i]);
}
else {
if ((blend_reg->osd_blend_din_scope_v[i] & 0xffff) == 0)
blend_reg->osd_blend_din_scope_v[i] =
0xffffffff;
VSYNCOSD_WR_MPEG_REG(
VIU_OSD_BLEND_DIN0_SCOPE_V + reg_offset * i,
blend_reg->osd_blend_din_scope_v[i]);
}
}
dv_core2_vsize = (blend_reg->osd_blend_blend0_size >> 16) & 0xfff;