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UPSTREAM: usb: dwc2: host: Always add to the tail of queuesa

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The queues the the dwc2 host controller used are truly queues.  That
means FIFO or first in first out.

Unfortunately though the code was iterating through these queues
starting from the head, some places in the code was adding things to the
queue by adding at the head instead of the tail.  That means last in
first out.  Doh.

Go through and just always add to the tail.

Doing this makes things much happier when I've got:
 * 7-port USB 2.0 Single-TT hub
 * - Microsoft 2.4 GHz Transceiver v7.0 dongle
 * - Jabra speakerphone playing music

Acked-by: John Youn <johnyoun@synopsys.com>
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Tested-by: Heiko Stuebner <heiko@sntech.de>
Tested-by: Stefan Wahren <stefan.wahren@i2se.com>
Signed-off-by: Felipe Balbi <balbi@kernel.org>
(cherry picked from commit 94ef7aee11)

Change-Id: Idf0f468b0e849698a637548f9520b9965368ef35
Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>
This commit is contained in:
Nickey Yang
2016-10-26 14:08:23 +08:00
committed by Huang, Tao
parent 1047560640
commit abda71220e
4 changed files with 16 additions and 13 deletions
Download Patch File Download Diff File Expand all files Collapse all files

11
drivers/usb/dwc2/hcd.c
View File

@@ -930,7 +930,8 @@ enum dwc2_transaction_type dwc2_hcd_select_transactions(
* periodic assigned schedule
*/
qh_ptr = qh_ptr->next;
list_move(&qh->qh_list_entry, &hsotg->periodic_sched_assigned);
list_move_tail(&qh->qh_list_entry,
&hsotg->periodic_sched_assigned);
ret_val = DWC2_TRANSACTION_PERIODIC;
}
@@ -963,8 +964,8 @@ enum dwc2_transaction_type dwc2_hcd_select_transactions(
* non-periodic active schedule
*/
qh_ptr = qh_ptr->next;
list_move(&qh->qh_list_entry,
&hsotg->non_periodic_sched_active);
list_move_tail(&qh->qh_list_entry,
&hsotg->non_periodic_sched_active);
if (ret_val == DWC2_TRANSACTION_NONE)
ret_val = DWC2_TRANSACTION_NON_PERIODIC;
@@ -1137,8 +1138,8 @@ static void dwc2_process_periodic_channels(struct dwc2_hsotg *hsotg)
* Move the QH from the periodic assigned schedule to
* the periodic queued schedule
*/
list_move(&qh->qh_list_entry,
&hsotg->periodic_sched_queued);
list_move_tail(&qh->qh_list_entry,
&hsotg->periodic_sched_queued);
/* done queuing high bandwidth */
hsotg->queuing_high_bandwidth = 0;

4
drivers/usb/dwc2/hcd_ddma.c
View File

@@ -1172,8 +1172,8 @@ void dwc2_hcd_complete_xfer_ddma(struct dwc2_hsotg *hsotg,
dwc2_hcd_qh_unlink(hsotg, qh);
} else {
/* Keep in assigned schedule to continue transfer */
list_move(&qh->qh_list_entry,
&hsotg->periodic_sched_assigned);
list_move_tail(&qh->qh_list_entry,
&hsotg->periodic_sched_assigned);
continue_isoc_xfer = 1;
}
/*

8
drivers/usb/dwc2/hcd_intr.c
View File

@@ -140,8 +140,8 @@ static void dwc2_sof_intr(struct dwc2_hsotg *hsotg)
* Move QH to the ready list to be executed next
* (micro)frame
*/
list_move(&qh->qh_list_entry,
&hsotg->periodic_sched_ready);
list_move_tail(&qh->qh_list_entry,
&hsotg->periodic_sched_ready);
}
tr_type = dwc2_hcd_select_transactions(hsotg);
if (tr_type != DWC2_TRANSACTION_NONE)
@@ -831,8 +831,8 @@ static void dwc2_halt_channel(struct dwc2_hsotg *hsotg,
* halt to be queued when the periodic schedule is
* processed.
*/
list_move(&chan->qh->qh_list_entry,
&hsotg->periodic_sched_assigned);
list_move_tail(&chan->qh->qh_list_entry,
&hsotg->periodic_sched_assigned);
/*
* Make sure the Periodic Tx FIFO Empty interrupt is

6
drivers/usb/dwc2/hcd_queue.c
View File

@@ -737,9 +737,11 @@ void dwc2_hcd_qh_deactivate(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh,
dwc2_frame_num_le(qh->sched_frame, frame_number)) ||
(hsotg->core_params->uframe_sched <= 0 &&
qh->sched_frame == frame_number))
list_move(&qh->qh_list_entry, &hsotg->periodic_sched_ready);
list_move_tail(&qh->qh_list_entry,
&hsotg->periodic_sched_ready);
else
list_move(&qh->qh_list_entry, &hsotg->periodic_sched_inactive);
list_move_tail(&qh->qh_list_entry,
&hsotg->periodic_sched_inactive);
}
/**