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spi: rzv2m-csi: Rework CSI_CKS_MAX definition

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Clock "csiclk" gets divided by 2 * CSI_CLKSEL_CKS in order to generate
the serial clock (output from master), with CSI_CLKSEL_CKS ranging from
0x1 (that means "csiclk" is divided by 2) to 0x3FFF ("csiclk" is divided
by 32766). CSI_CKS_MAX is used for referring to the setting
corresponding to the maximum frequency divider.
Value 0x3FFF for CSI_CKS_MAX doesn't really means much to the reader
without an explanation and a more readable definition.

Add a comment with a meaningful description and also replace value
0x3FFF with the corresponding GENMASK, to make it very clear what the
macro means.

Signed-off-by: Fabrizio Castro <fabrizio.castro.jz@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Link: https://lore.kernel.org/r/20230715010407.1751715-4-fabrizio.castro.jz@renesas.com
Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Fabrizio Castro
2023-07-15 02:04:00 +01:00
committed by Mark Brown
parent 74e27ce8d2
commit aecf9fbdb7
1 changed files with 6 additions and 1 deletions
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7
drivers/spi/spi-rzv2m-csi.c
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@@ -65,7 +65,12 @@
#define CSI_FIFO_SIZE_BYTES 32
#define CSI_FIFO_HALF_SIZE 16
#define CSI_EN_DIS_TIMEOUT_US 100
#define CSI_CKS_MAX 0x3FFF
/*
* Clock "csiclk" gets divided by 2 * CSI_CLKSEL_CKS in order to generate the
* serial clock (output from master), with CSI_CLKSEL_CKS ranging from 0x1 (that
* means "csiclk" is divided by 2) to 0x3FFF ("csiclk" is divided by 32766).
*/
#define CSI_CKS_MAX GENMASK(13, 0)
#define UNDERRUN_ERROR BIT(0)
#define OVERFLOW_ERROR BIT(1)