arm64: dts: rockchip: rk3562: Add mclk{out,in}_saix device nodes

Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Change-Id: Iff3f55286d1e209929c9667871c0f06842a4d7d1
This commit is contained in:
Sugar Zhang
2023-02-20 10:07:17 +08:00
committed by Tao Huang
parent b3cfac5e37
commit afa07cbc46

View File

@@ -133,6 +133,54 @@
#power-domain-cells = <1>;
#clock-cells = <0>;
};
mclkin_sai0: mclkin-sai0 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <12288000>;
clock-output-names = "mclk_sai0_from_io";
};
mclkin_sai1: mclkin-sai1 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <12288000>;
clock-output-names = "mclk_sai1_from_io";
};
mclkin_sai2: mclkin-sai2 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <12288000>;
clock-output-names = "mclk_sai2_from_io";
};
mclkout_sai0: mclkout-sai0@ff040070 {
compatible = "rockchip,clk-out";
reg = <0 0xff040070 0 0x4>;
clocks = <&cru MCLK_SAI0_OUT2IO>;
#clock-cells = <0>;
clock-output-names = "mclk_sai0_to_io";
rockchip,bit-shift = <4>;
};
mclkout_sai1: mclkout-sai1@ff040070 {
compatible = "rockchip,clk-out";
reg = <0 0xff040070 0 0x4>;
clocks = <&cru MCLK_SAI1_OUT2IO>;
#clock-cells = <0>;
clock-output-names = "mclk_sai1_to_io";
rockchip,bit-shift = <9>;
};
mclkout_sai2: mclkout-sai2@ff040070 {
compatible = "rockchip,clk-out";
reg = <0 0xff040070 0 0x4>;
clocks = <&cru MCLK_SAI2_OUT2IO>;
#clock-cells = <0>;
clock-output-names = "mclk_sai2_to_io";
rockchip,bit-shift = <11>;
};
};
cpus {