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rk3188: init sdio rate=24.75M to ensure even div

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chenxing
2013-01-28 15:59:00 +08:00
parent 99aaa93cbd
commit afbb4b080e
1 changed files with 1 additions and 0 deletions
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arch/arm/mach-rk3188/clock_data.c
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@@ -3141,6 +3141,7 @@ static void __init rk30_clock_common_init(unsigned long gpll_rate, unsigned long
clk_set_rate_nolock(&clk_uart0, 49500000);
clk_set_rate_nolock(&clk_sdmmc, 24750000);
clk_set_rate_nolock(&clk_sdio, 24750000);
}