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Merge commit '435ab979d269ece424166c4a01fd3dde95493094'

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* commit '435ab979d269ece424166c4a01fd3dde95493094':
  ARM: configs: rv1106-wakeup.config: enable CONFIG_INPUT_EVDEV
  PCI: rockchip: dw: Add debug info for device miss case
  drivers: rkflash: Change RK_SFTL dependent to RK_NANDC_NAND
  arm64/configs: rk3308bs_mipi_display.config add gt911
  input: touchscreen: fixed gt9xx compile error
  media: rockchip: isp: isp32 using ktime_get_boottime_ns
  media: rockchip: vicap: change irq state when start/stop stream
  media: rockchip: vicap: rv1106 use ktime_get_boottime_ns to get timestamp
  media: rockchip: vicap support skip frame
  dt-bindings: opp: rockchip: Add more properties for pvtm and pvtpll
  media: rockchip: vicap:fix oneframe switch to multiframe error
  media: rockchip: isp: fix 4k and dual_sensor pm oneframe error
  media: rockchip: vicap optimize buf rotation in thunderboot mode
  media: rockchip: vicap fixes logic error of get thundboot_resmem_head
  media: rockchip: vicap fixes some error for 4K with AOV

Change-Id: I437995aba6f4491b3896430547a382256034624b
This commit is contained in:
Tao Huang
2023-12-27 14:40:41 +08:00
parent de933152d0 435ab979d2
commit b0615530ae
36 changed files with 482 additions and 326 deletions
Download Patch File Download Diff File Expand all files Collapse all files

12
Documentation/devicetree/bindings/opp/rockchip-opp.txt
View File

@@ -33,6 +33,10 @@ In 'operating-points-v2' table:
max-pvtm: maximum frequency count in KHz.
voltage-selector: a sequence number which is used to math
opp-microvolt-L<number> property in OPP node.
- rockchip,pvtm-voltage-sel-B<number>: Similar to 'rockchip,pvtm-voltage-sel', this
depends on 'rockchip,pvtm-hw' property. If contain
'rockchip,pvtm-voltage-sel-hw', the property is unused.
- rockchip,pvtm-scaling-sel: Similar to 'rockchip,pvtm-voltage-sel', this allows
to change maximum frequency according to pvtm.
@@ -57,6 +61,12 @@ In 'operating-points-v2' table:
target frequency less than the threshold frequency,
there may be no need to set intermediate rate.
- rockchip,pvtpll-table: The property is an array of 5-tuples items, and
each item consists frequency and pvtpll config like
<freq_khz ring length low_temp_ring low_temp_length>,
this allows to change pvtpll config through sip smc interface.
- rockchip,pvtpll-table-B<number>: Similar to 'rockchip,pvtpll-table'.
- rockchip,pvtpll-avg-offset: The offset of average value register.
- rockchip,pvtpll-min-rate: Clock frequency in KHz, if opp frequency is higher
than the minimum frequency, the opp voltage will be
@@ -161,7 +171,7 @@ cluster0_opp: opp_table0 {
25 254 1
>;
nvmem-cells = <&cpu_leakage>;
nvmem-cell-names = "cpu_leakage";
nvmem-cell-names = "leakage";
opp@216000000 {
opp-hz = /bits/ 64 <216000000>;

2
arch/arm/configs/rv1106-wakeup.config
View File

@@ -82,7 +82,7 @@ CONFIG_HID_GENERIC=y
# CONFIG_HID_ZYDACRON is not set
# CONFIG_I2C_HID is not set
# CONFIG_INPUT_EVBUG is not set
# CONFIG_INPUT_EVDEV is not set
CONFIG_INPUT_EVDEV=y
# CONFIG_INPUT_FF_MEMLESS is not set
# CONFIG_INPUT_JOYDEV is not set
# CONFIG_INPUT_JOYSTICK is not set

1
arch/arm64/configs/rk3308bs_mipi_display.config
View File

@@ -86,6 +86,7 @@ CONFIG_MEMORY_ISOLATION=y
# CONFIG_TOUCHSCREEN_GSL3673_800X1280 is not set
# CONFIG_TOUCHSCREEN_GSLX680_PAD is not set
CONFIG_TOUCHSCREEN_GT1X=y
CONFIG_TOUCHSCREEN_GT9XX=y
# CONFIG_TOUCHSCREEN_GUNZE is not set
# CONFIG_TOUCHSCREEN_HAMPSHIRE is not set
# CONFIG_TOUCHSCREEN_HIDEEP is not set

9
drivers/input/touchscreen/Kconfig
View File

@@ -428,6 +428,15 @@ config TOUCHSCREEN_GSLX680_PAD
config TOUCHSCREEN_GT1X
tristate "GT1X touchscreens support"
config TOUCHSCREEN_GT9XX
tristate "Goodix gt9xx support for rockchip platform"
depends on I2C && ARCH_ROCKCHIP
help
Say Y here if you have a touchscreen interface using the gt9xx
on Rockchip platform, and your board-specific initialization
code includes that in its table of IIC devices.
If unsure, say N.
config TOUCHSCREEN_HIDEEP
tristate "HiDeep Touch IC"
depends on I2C

1
drivers/input/touchscreen/Makefile
View File

@@ -56,6 +56,7 @@ gsl3673-800x1280-y := gsl3673_800x1280.o gsl_point_id.o
obj-$(CONFIG_TOUCHSCREEN_GSLX680_PAD) += gslx680-pad.o
gslx680-pad-y := gslx680_pad.o gsl_point_id.o
obj-$(CONFIG_TOUCHSCREEN_GT1X) += gt1x/
obj-$(CONFIG_TOUCHSCREEN_GT9XX) += gt9xx/
obj-$(CONFIG_TOUCHSCREEN_HIDEEP) += hideep.o
obj-$(CONFIG_TOUCHSCREEN_ILI210X) += ili210x.o
obj-$(CONFIG_TOUCHSCREEN_ILITEK) += ilitek_ts_i2c.o

2
drivers/input/touchscreen/gt9xx/Makefile
View File

@@ -1,5 +1,5 @@
# SPDX-License-Identifier: GPL-2.0
obj-y += goodix_gt9xx.o
obj-$(CONFIG_TOUCHSCREEN_GT9XX) += goodix_gt9xx.o
#goodix_gt9xx-y +=goodix_tool.o
goodix_gt9xx-y +=gt9xx.o

91
drivers/input/touchscreen/gt9xx/gt9xx.c
View File

@@ -68,8 +68,8 @@ static u8 gtp_y_reverse = TRUE;
static const char *goodix_ts_name = "goodix-ts";
static struct workqueue_struct *goodix_wq;
struct i2c_client * i2c_connect_client = NULL;
u8 config[GTP_CONFIG_MAX_LENGTH + GTP_ADDR_LENGTH]
struct i2c_client * gtp_i2c_connect_client = NULL;
static u8 config[GTP_CONFIG_MAX_LENGTH + GTP_ADDR_LENGTH]
= {GTP_REG_CONFIG_DATA >> 8, GTP_REG_CONFIG_DATA & 0xff};
#if GTP_HAVE_TOUCH_KEY
@@ -86,12 +86,12 @@ u8 config[GTP_CONFIG_MAX_LENGTH + GTP_ADDR_LENGTH]
static s8 gtp_i2c_test(struct i2c_client *client);
void gtp_reset_guitar(struct i2c_client *client, s32 ms);
s32 gtp_send_cfg(struct i2c_client *client);
void gtp_int_sync(s32 ms, struct goodix_ts_data *ts);
static void gtp_int_sync(s32 ms, struct goodix_ts_data *ts);
static ssize_t gt91xx_config_read_proc(struct file *, char __user *, size_t, loff_t *);
static ssize_t gt91xx_config_write_proc(struct file *, const char __user *, size_t, loff_t *);
static struct proc_dir_entry *gt91xx_config_proc = NULL;
//static struct proc_dir_entry *gt91xx_config_proc = NULL;
static const struct file_operations config_proc_ops = {
.owner = THIS_MODULE,
.read = gt91xx_config_read_proc,
@@ -117,15 +117,15 @@ void gtp_esd_switch(struct i2c_client *, s32);
//*********** For GT9XXF Start **********//
#if GTP_COMPATIBLE_MODE
extern s32 i2c_read_bytes(struct i2c_client *client, u16 addr, u8 *buf, s32 len);
extern s32 i2c_write_bytes(struct i2c_client *client, u16 addr, u8 *buf, s32 len);
extern s32 gup_clk_calibration(void);
extern s32 gup_fw_download_proc(void *dir, u8 dwn_mode);
extern u8 gup_check_fs_mounted(char *path_name);
//extern s32 gtp_i2c_read_bytes(struct i2c_client *client, u16 addr, u8 *buf, s32 len);
//extern s32 gtp_i2c_write_bytes(struct i2c_client *client, u16 addr, u8 *buf, s32 len);
//extern s32 gtp_gup_clk_calibration(void);
//extern s32 gtp_gup_fw_download_proc(void *dir, u8 dwn_mode);
//extern u8 gtp_gup_check_fs_mounted(char *path_name);
void gtp_recovery_reset(struct i2c_client *client);
static void gtp_recovery_reset(struct i2c_client *client);
static s32 gtp_esd_recovery(struct i2c_client *client);
s32 gtp_fw_startup(struct i2c_client *client);
//s32 gtp_fw_startup(struct i2c_client *client);
static s32 gtp_main_clk_proc(struct goodix_ts_data *ts);
static s32 gtp_bak_ref_proc(struct goodix_ts_data *ts, u8 mode);
@@ -143,7 +143,7 @@ static DOZE_T doze_status = DOZE_DISABLED;
static s8 gtp_enter_doze(struct goodix_ts_data *ts);
#endif
u8 grp_cfg_version = 0;
static u8 grp_cfg_version = 0;
/*******************************************************
Function:
@@ -157,7 +157,7 @@ Output:
numbers of i2c_msgs to transfer:
2: succeed, otherwise: failed
*********************************************************/
s32 gtp_i2c_read(struct i2c_client *client, u8 *buf, s32 len)
static s32 gtp_i2c_read(struct i2c_client *client, u8 *buf, s32 len)
{
struct i2c_msg msgs[2];
s32 ret=-1;
@@ -230,7 +230,7 @@ Output:
numbers of i2c_msgs to transfer:
1: succeed, otherwise: failed
*********************************************************/
s32 gtp_i2c_write(struct i2c_client *client,u8 *buf,s32 len)
static s32 gtp_i2c_write(struct i2c_client *client,u8 *buf,s32 len)
{
struct i2c_msg msg;
s32 ret = -1;
@@ -523,7 +523,7 @@ static void gtp_pen_init(struct goodix_ts_data *ts)
static void gtp_pen_down(s32 x, s32 y, s32 w, s32 id)
{
struct goodix_ts_data *ts = i2c_get_clientdata(i2c_connect_client);
struct goodix_ts_data *ts = i2c_get_clientdata(gtp_i2c_connect_client);
if (gtp_change_x2y)
GTP_SWAP(x, y);
@@ -551,7 +551,7 @@ static void gtp_pen_down(s32 x, s32 y, s32 w, s32 id)
static void gtp_pen_up(s32 id)
{
struct goodix_ts_data *ts = i2c_get_clientdata(i2c_connect_client);
struct goodix_ts_data *ts = i2c_get_clientdata(gtp_i2c_connect_client);
input_report_key(ts->pen_dev, BTN_TOOL_PEN, 0);
@@ -613,7 +613,7 @@ static void goodix_ts_work_func(struct work_struct *work)
#if GTP_GESTURE_WAKEUP
if (DOZE_ENABLED == doze_status)
{
ret = gtp_i2c_read(i2c_connect_client, doze_buf, 3);
ret = gtp_i2c_read(gtp_i2c_connect_client, doze_buf, 3);
GTP_DEBUG("0x814B = 0x%02X", doze_buf[2]);
if (ret > 0)
{
@@ -640,7 +640,7 @@ static void goodix_ts_work_func(struct work_struct *work)
input_sync(ts->input_dev);
// clear 0x814B
doze_buf[2] = 0x00;
gtp_i2c_write(i2c_connect_client, doze_buf, 3);
gtp_i2c_write(gtp_i2c_connect_client, doze_buf, 3);
}
else if ( (doze_buf[2] == 0xAA) || (doze_buf[2] == 0xBB) ||
(doze_buf[2] == 0xAB) || (doze_buf[2] == 0xBA) )
@@ -656,7 +656,7 @@ static void goodix_ts_work_func(struct work_struct *work)
input_sync(ts->input_dev);
// clear 0x814B
doze_buf[2] = 0x00;
gtp_i2c_write(i2c_connect_client, doze_buf, 3);
gtp_i2c_write(gtp_i2c_connect_client, doze_buf, 3);
}
else if (0xCC == doze_buf[2])
{
@@ -668,13 +668,13 @@ static void goodix_ts_work_func(struct work_struct *work)
input_sync(ts->input_dev);
// clear 0x814B
doze_buf[2] = 0x00;
gtp_i2c_write(i2c_connect_client, doze_buf, 3);
gtp_i2c_write(gtp_i2c_connect_client, doze_buf, 3);
}
else
{
// clear 0x814B
doze_buf[2] = 0x00;
gtp_i2c_write(i2c_connect_client, doze_buf, 3);
gtp_i2c_write(gtp_i2c_connect_client, doze_buf, 3);
gtp_enter_doze(ts);
}
}
@@ -1087,7 +1087,7 @@ Input:
Output:
None.
*******************************************************/
void gtp_int_sync(s32 ms, struct goodix_ts_data *ts)
static void gtp_int_sync(s32 ms, struct goodix_ts_data *ts)
{
GTP_GPIO_OUTPUT(ts->irq_pin, 0);
msleep(ms);
@@ -1706,7 +1706,7 @@ static ssize_t gt91xx_config_read_proc(struct file *file, char __user *page, siz
ptr += sprintf(ptr, "\n");
ptr += sprintf(ptr, "==== GT9XX config real value====\n");
gtp_i2c_read(i2c_connect_client, temp_data, GTP_CONFIG_MAX_LENGTH + 2);
gtp_i2c_read(gtp_i2c_connect_client, temp_data, GTP_CONFIG_MAX_LENGTH + 2);
for (i = 0 ; i < GTP_CONFIG_MAX_LENGTH ; i++)
{
ptr += sprintf(ptr, "0x%02X ", temp_data[i+2]);
@@ -1734,7 +1734,7 @@ static ssize_t gt91xx_config_write_proc(struct file *filp, const char __user *bu
return -EFAULT;
}
ret = gtp_send_cfg(i2c_connect_client);
ret = gtp_send_cfg(gtp_i2c_connect_client);
if (ret < 0)
{
@@ -2144,7 +2144,7 @@ s32 gtp_fw_startup(struct i2c_client *client)
struct goodix_ts_data *ts = i2c_get_clientdata(client);
//init sw WDT
opr_buf[0] = 0xAA;
ret = i2c_write_bytes(client, 0x8041, opr_buf, 1);
ret = gtp_i2c_write_bytes(client, 0x8041, opr_buf, 1);
if (ret < 0)
{
return FAIL;
@@ -2152,7 +2152,7 @@ s32 gtp_fw_startup(struct i2c_client *client)
//release SS51 & DSP
opr_buf[0] = 0x00;
ret = i2c_write_bytes(client, 0x4180, opr_buf, 1);
ret = gtp_i2c_write_bytes(client, 0x4180, opr_buf, 1);
if (ret < 0)
{
return FAIL;
@@ -2161,7 +2161,7 @@ s32 gtp_fw_startup(struct i2c_client *client)
gtp_int_sync(25, ts);
//check fw run status
ret = i2c_read_bytes(client, 0x8041, opr_buf, 1);
ret = gtp_i2c_read_bytes(client, 0x8041, opr_buf, 1);
if (ret < 0)
{
return FAIL;
@@ -2175,7 +2175,7 @@ s32 gtp_fw_startup(struct i2c_client *client)
{
GTP_INFO("IC works normally, Startup success.");
opr_buf[0] = 0xAA;
i2c_write_bytes(client, 0x8041, opr_buf, 1);
gtp_i2c_write_bytes(client, 0x8041, opr_buf, 1);
return SUCCESS;
}
}
@@ -2193,7 +2193,7 @@ static s32 gtp_esd_recovery(struct i2c_client *client)
GTP_INFO("GT9XXF esd recovery mode");
for (retry = 0; retry < 5; retry++)
{
ret = gup_fw_download_proc(NULL, GTP_FL_ESD_RECOVERY);
ret = gtp_gup_fw_download_proc(NULL, GTP_FL_ESD_RECOVERY);
if (FAIL == ret)
{
GTP_ERROR("esd recovery failed %d", retry+1);
@@ -2219,7 +2219,7 @@ static s32 gtp_esd_recovery(struct i2c_client *client)
return SUCCESS;
}
void gtp_recovery_reset(struct i2c_client *client)
static void gtp_recovery_reset(struct i2c_client *client)
{
#if GTP_ESD_PROTECT
gtp_esd_switch(client, SWITCH_OFF);
@@ -2246,7 +2246,7 @@ static s32 gtp_bak_ref_proc(struct goodix_ts_data *ts, u8 mode)
struct file *ref_filp = NULL;
u8 *p_bak_ref;
ret = gup_check_fs_mounted("/data");
ret = gtp_gup_check_fs_mounted("/data");
if (FAIL == ret)
{
ts->ref_chk_fs_times++;
@@ -2334,7 +2334,7 @@ static s32 gtp_bak_ref_proc(struct goodix_ts_data *ts, u8 mode)
}
}
}
ret = i2c_write_bytes(ts->client, GTP_REG_BAK_REF, p_bak_ref, ts->bak_ref_len);
ret = gtp_i2c_write_bytes(ts->client, GTP_REG_BAK_REF, p_bak_ref, ts->bak_ref_len);
if (FAIL == ret)
{
GTP_ERROR("failed to send bak_ref because of iic comm error");
@@ -2344,7 +2344,7 @@ static s32 gtp_bak_ref_proc(struct goodix_ts_data *ts, u8 mode)
case GTP_BAK_REF_STORE:
GTP_INFO("Store backup-reference");
ret = i2c_read_bytes(ts->client, GTP_REG_BAK_REF, p_bak_ref, ts->bak_ref_len);
ret = gtp_i2c_read_bytes(ts->client, GTP_REG_BAK_REF, p_bak_ref, ts->bak_ref_len);
if (ret < 0)
{
GTP_ERROR("failed to read bak_ref info, sending default back-reference");
@@ -2368,7 +2368,7 @@ bak_ref_default:
memset(&p_bak_ref[j * ref_seg_len], 0, ref_seg_len);
p_bak_ref[j * ref_seg_len + ref_seg_len - 1] = 0x01; // checksum = 1
}
ret = i2c_write_bytes(ts->client, GTP_REG_BAK_REF, p_bak_ref, ts->bak_ref_len);
ret = gtp_i2c_write_bytes(ts->client, GTP_REG_BAK_REF, p_bak_ref, ts->bak_ref_len);
if (!IS_ERR(ref_filp))
{
GTP_INFO("write backup-reference data into %s", GTP_BAK_REF_PATH);
@@ -2450,7 +2450,7 @@ static s32 gtp_main_clk_proc(struct goodix_ts_data *ts)
goto update_main_clk;
}
#else
ret = gup_check_fs_mounted("/data");
ret = gtp_gup_check_fs_mounted("/data");
if (FAIL == ret)
{
ts->clk_chk_fs_times++;
@@ -2496,7 +2496,7 @@ static s32 gtp_main_clk_proc(struct goodix_ts_data *ts)
#if GTP_ESD_PROTECT
gtp_esd_switch(ts->client, SWITCH_OFF);
#endif
ret = gup_clk_calibration();
ret = gtp_gup_clk_calibration();
gtp_esd_recovery(ts->client);
#if GTP_ESD_PROTECT
@@ -2527,7 +2527,7 @@ static s32 gtp_main_clk_proc(struct goodix_ts_data *ts)
}
update_main_clk:
ret = i2c_write_bytes(ts->client, GTP_REG_MAIN_CLK, p_main_clk, 6);
ret = gtp_i2c_write_bytes(ts->client, GTP_REG_MAIN_CLK, p_main_clk, 6);
if (FAIL == ret)
{
GTP_ERROR("update main clock failed!");
@@ -2544,11 +2544,11 @@ exit_main_clk:
}
s32 gtp_gt9xxf_init(struct i2c_client *client)
static s32 gtp_gt9xxf_init(struct i2c_client *client)
{
s32 ret = 0;
ret = gup_fw_download_proc(NULL, GTP_FL_FW_BURN);
ret = gtp_gup_fw_download_proc(NULL, GTP_FL_FW_BURN);
if (FAIL == ret)
{
return FAIL;
@@ -2562,7 +2562,7 @@ s32 gtp_gt9xxf_init(struct i2c_client *client)
return SUCCESS;
}
void gtp_get_chip_type(struct goodix_ts_data *ts)
static void gtp_get_chip_type(struct goodix_ts_data *ts)
{
u8 opr_buf[10] = {0x00};
s32 ret = 0;
@@ -2626,7 +2626,7 @@ static int goodix_ts_probe(struct i2c_client *client, const struct i2c_device_id
GTP_INFO("GTP Driver Version: %s", GTP_DRIVER_VERSION);
GTP_INFO("GTP I2C Address: 0x%02x", client->addr);
i2c_connect_client = client;
gtp_i2c_connect_client = client;
if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C))
{
@@ -2670,8 +2670,8 @@ static int goodix_ts_probe(struct i2c_client *client, const struct i2c_device_id
} else if (val == 9110) {
m89or101 = FALSE;
bgt9110 = TRUE;
gtp_change_x2y = TRUE;
gtp_x_reverse = TRUE;
gtp_change_x2y = FALSE;
gtp_x_reverse = FALSE;
gtp_y_reverse = FALSE;
} else if (val == 9111) {
m89or101 = FALSE;
@@ -2804,6 +2804,7 @@ static int goodix_ts_probe(struct i2c_client *client, const struct i2c_device_id
ts->irq_flags = ts->int_trigger_type ? IRQF_TRIGGER_FALLING : IRQF_TRIGGER_RISING;
// Create proc file system
#if 0
gt91xx_config_proc = proc_create(GT91XX_CONFIG_PROC_FILE, 0664, NULL, &config_proc_ops);
if (gt91xx_config_proc == NULL)
{
@@ -2813,6 +2814,7 @@ static int goodix_ts_probe(struct i2c_client *client, const struct i2c_device_id
{
GTP_INFO("create proc entry %s success", GT91XX_CONFIG_PROC_FILE);
}
#endif
#if GTP_AUTO_UPDATE
ret = gup_init_update_proc(ts);
@@ -3059,7 +3061,7 @@ static void gtp_esd_check_func(struct work_struct *work)
GTP_DEBUG_FUNC();
ts = i2c_get_clientdata(i2c_connect_client);
ts = i2c_get_clientdata(gtp_i2c_connect_client);
if (ts->gtp_is_suspend)
{
@@ -3231,3 +3233,4 @@ module_exit(goodix_ts_exit);
MODULE_DESCRIPTION("GTP Series Driver");
MODULE_LICENSE("GPL");
MODULE_IMPORT_NS(VFS_internal_I_am_really_a_filesystem_and_am_NOT_a_driver);

23
drivers/input/touchscreen/gt9xx/gt9xx.h
View File

@@ -154,8 +154,8 @@ struct goodix_ts_data {
struct regulator *tp_regulator;
};
extern u16 show_len;
extern u16 total_len;
//extern u16 show_len;
//extern u16 total_len;
//*************************** PART2:TODO define **********************************
@@ -391,7 +391,22 @@ extern u16 total_len;
}while (0)
//*****************************End of Part III********************************
#define TRUE 1
#define FALSE 0
//#define TRUE 1
//#define FALSE 0
extern struct i2c_client *gtp_i2c_connect_client;
s32 gtp_fw_startup(struct i2c_client *client);
s32 gtp_i2c_read_dbl_check(struct i2c_client *client, u16 addr, u8 *rxbuf, int len);
void gtp_irq_disable(struct goodix_ts_data *ts);
void gtp_irq_enable(struct goodix_ts_data *ts);
s32 gtp_read_version(struct i2c_client *client, u16 *version);
void gtp_reset_guitar(struct i2c_client *client, s32 ms);
s32 gtp_send_cfg(struct i2c_client *client);
u8 gtp_gup_check_fs_mounted(char *path_name);
s32 gtp_gup_fw_download_proc(void *dir, u8 dwn_mode);
s32 gtp_i2c_read_bytes(struct i2c_client *client, u16 addr, u8 *buf, s32 len);
s32 gtp_i2c_write_bytes(struct i2c_client *client, u16 addr, u8 *buf, s32 len);
s32 gtp_gup_clk_calibration(void);
#endif /* _GOODIX_GT9XX_H_ */

16
drivers/input/touchscreen/gt9xx/gt9xx_cfg.h
View File

@@ -19,21 +19,21 @@
#define _GOODIX_GT9XX_CFG_H_
/* CFG for GT911 */
u8 gtp_dat_gt11[] = {
static u8 gtp_dat_gt11[] = {
/* <1200, 1920>*/
#include "WGJ89006B_GT911_Config_20140625_085816_0X43.cfg"
};
u8 gtp_dat_gt9110[] = {
static u8 gtp_dat_gt9110[] = {
/* <1200, 1920>*/
#include "GT9110P(2020)V71_Config_20201028_170326.cfg"
};
u8 gtp_dat_gt9111[] = {
static u8 gtp_dat_gt9111[] = {
#include "HLS-0102-1398V1-1060-GT911_Config_20201204_V66.cfg"
};
u8 gtp_dat_8_9[] = {
static u8 gtp_dat_8_9[] = {
/* TODO:Puts your update firmware data here! */
/* <1920, 1200> 8.9 */
/* #include "WGJ89006B_GT9271_Config_20140625_085816_0X41.cfg" */
@@ -41,22 +41,22 @@ u8 gtp_dat_8_9[] = {
#include "WGJ10162B_GT9271_1060_Config_20140821_1341110X42.cfg"
};
u8 gtp_dat_8_9_1[] = {
static u8 gtp_dat_8_9_1[] = {
#include "GT9271_Config_20170526.cfg"
};
u8 gtp_dat_9_7[] = {
static u8 gtp_dat_9_7[] = {
/* <1536, 2048> 9.7 */
#include "GT9110P_Config_20160217_1526_2048_97.cfg"
};
u8 gtp_dat_10_1[] = {
static u8 gtp_dat_10_1[] = {
/* TODO:Puts your update firmware data here! */
/* <1200, 1920> 10.1 */
#include "WGJ10187_GT9271_Config_20140623_104014_0X41.cfg"
};
u8 gtp_dat_7[] = {
static u8 gtp_dat_7[] = {
/* TODO:Puts your update firmware data here! */
/* <1024, 600> 7.0 */
#include "WGJ10187_GT910_Config_20140623_104014_0X41.cfg"

4
drivers/input/touchscreen/gt9xx/gt9xx_firmware.h
View File

@@ -15,7 +15,7 @@
#define _GT9XX_FIRMWARE_H_
#if GTP_HEADER_FW_UPDATE
unsigned char gtp_default_FW[] = {
static unsigned char gtp_default_FW[] = {
};
#endif
@@ -26,7 +26,7 @@ unsigned char gtp_default_FW[] = {
*[GENERATED]2014/01/20 17:37:45
*/
#if GTP_COMPATIBLE_MODE
unsigned char gtp_default_FW_fl[] = {
static unsigned char gtp_default_FW_fl[] = {
0x00, 0x90, 0x06, 0x00, 0x39, 0x31, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x20, 0x80, 0x00,
0x55, 0x40, 0xa4, 0x28, 0xb3, 0x26, 0x69, 0xf0, 0x0c, 0xc1, 0x00, 0x62, 0x72, 0xed, 0x88, 0x5c,
0x4f, 0x41, 0xf0, 0x90, 0x24, 0xbf, 0x32, 0xe0, 0x1d, 0xc9, 0xdf, 0xf2, 0x53, 0x73, 0x01, 0x20,

195
drivers/input/touchscreen/gt9xx/gt9xx_update.c
View File

@@ -26,7 +26,7 @@
* 3. add update file cal checksum.
* By Andrew, 2012/12/12
* V1.6:
* 1. replace guitar_client with i2c_connect_client;
* 1. replace guitar_client with gtp_i2c_connect_client;
* 2. support firmware header array update.
* By Meta, 2013/03/11
* V2.2:
@@ -106,21 +106,21 @@ typedef struct
u32 fw_burned_len;
}st_update_msg;
st_update_msg update_msg;
u16 show_len;
u16 total_len;
u8 got_file_flag = 0;
u8 searching_file = 0;
static st_update_msg update_msg;
static u16 show_len;
static u16 total_len;
//static u8 got_file_flag = 0;
static u8 searching_file = 0;
extern u8 config[GTP_CONFIG_MAX_LENGTH + GTP_ADDR_LENGTH];
extern void gtp_reset_guitar(struct i2c_client *client, s32 ms);
extern s32 gtp_send_cfg(struct i2c_client *client);
extern s32 gtp_read_version(struct i2c_client *, u16* );
extern struct i2c_client * i2c_connect_client;
extern void gtp_irq_enable(struct goodix_ts_data *ts);
extern void gtp_irq_disable(struct goodix_ts_data *ts);
extern s32 gtp_i2c_read_dbl_check(struct i2c_client *, u16, u8 *, int);
static u8 gup_burn_fw_gwake_section(struct i2c_client *client, u8 *fw_section, u16 start_addr, u32 len, u8 bank_cmd );
//extern u8 config[GTP_CONFIG_MAX_LENGTH + GTP_ADDR_LENGTH];
//extern void gtp_reset_guitar(struct i2c_client *client, s32 ms);
//extern s32 gtp_send_cfg(struct i2c_client *client);
//extern s32 gtp_read_version(struct i2c_client *, u16* );
//extern struct i2c_client * gtp_i2c_connect_client;
//extern void gtp_irq_enable(struct goodix_ts_data *ts);
//extern void gtp_irq_disable(struct goodix_ts_data *ts);
//extern s32 gtp_i2c_read_dbl_check(struct i2c_client *, u16, u8 *, int);
//static u8 gup_burn_fw_gwake_section(struct i2c_client *client, u8 *fw_section, u16 start_addr, u32 len, u8 bank_cmd );
#define _CLOSE_FILE(p_file) if (p_file && !IS_ERR(p_file)) \
{ \
@@ -132,7 +132,7 @@ extern void gtp_esd_switch(struct i2c_client *, s32);
#endif
#if GTP_COMPATIBLE_MODE
s32 gup_fw_download_proc(void *dir, u8 dwn_mode);
s32 gtp_gup_fw_download_proc(void *dir, u8 dwn_mode);
#endif
/*******************************************************
Function:
@@ -146,7 +146,7 @@ Output:
numbers of i2c_msgs to transfer:
2: succeed, otherwise: failed
*********************************************************/
s32 gup_i2c_read(struct i2c_client *client, u8 *buf, s32 len)
static s32 gup_i2c_read(struct i2c_client *client, u8 *buf, s32 len)
{
struct i2c_msg msgs[2];
s32 ret=-1;
@@ -192,7 +192,7 @@ Output:
numbers of i2c_msgs to transfer:
1: succeed, otherwise: failed
*********************************************************/
s32 gup_i2c_write(struct i2c_client *client,u8 *buf,s32 len)
static s32 gup_i2c_write(struct i2c_client *client,u8 *buf,s32 len)
{
struct i2c_msg msg;
s32 ret=-1;
@@ -218,6 +218,7 @@ s32 gup_i2c_write(struct i2c_client *client,u8 *buf,s32 len)
return ret;
}
#if 0
static s32 gup_init_panel(struct goodix_ts_data *ts)
{
s32 ret = 0;
@@ -329,6 +330,7 @@ static s32 gup_init_panel(struct goodix_ts_data *ts)
msleep(10);
return 0;
}
#endif
static u8 gup_get_ic_msg(struct i2c_client *client, u16 addr, u8* msg, s32 len)
@@ -381,6 +383,7 @@ static u8 gup_set_ic_msg(struct i2c_client *client, u16 addr, u8 val)
return SUCCESS;
}
#if 0
static u8 gup_get_ic_fw_msg(struct i2c_client *client)
{
s32 ret = -1;
@@ -462,7 +465,7 @@ static u8 gup_get_ic_fw_msg(struct i2c_client *client)
return SUCCESS;
}
s32 gup_enter_update_mode(struct i2c_client *client)
static s32 gup_enter_update_mode(struct i2c_client *client)
{
s32 ret = -1;
s32 retry = 0;
@@ -519,14 +522,14 @@ s32 gup_enter_update_mode(struct i2c_client *client)
return ret;
}
void gup_leave_update_mode(struct goodix_ts_data *ts)
static void gup_leave_update_mode(struct goodix_ts_data *ts)
{
gpio_direction_input(ts->irq_pin);
//s3c_gpio_setpull(pin, S3C_GPIO_PULL_NONE);
//s3c_gpio_cfgpin(pin, GTP_INT_CFG);
GTP_DEBUG("[leave_update_mode]reset chip.");
gtp_reset_guitar(i2c_connect_client, 20);
gtp_reset_guitar(gtp_i2c_connect_client, 20);
}
// Get the correct nvram data
@@ -646,6 +649,7 @@ static u8 gup_enter_update_judge(st_fw_head *fw_head)
return FAIL;
}
#endif
@@ -869,6 +873,7 @@ static void gup_search_file(s32 search_type)
#endif
#if 0
static u8 gup_check_update_file(struct i2c_client *client, st_fw_head* fw_head, u8* path)
{
s32 ret = 0;
@@ -924,7 +929,7 @@ static u8 gup_check_update_file(struct i2c_client *client, st_fw_head* fw_head,
gup_search_file(AUTO_SEARCH_BIN | AUTO_SEARCH_CFG);
if (got_file_flag & CFG_FILE_READY)
{
ret = gup_update_config(i2c_connect_client);
ret = gup_update_config(gtp_i2c_connect_client);
if(ret <= 0)
{
GTP_ERROR("Update config failed.");
@@ -2271,7 +2276,7 @@ exit_burn_fw_finish:
}
return FAIL;
}
s32 gup_update_proc(void *dir)
static s32 gup_update_proc(void *dir)
{
s32 ret = 0;
s32 update_ret = FAIL;
@@ -2281,7 +2286,7 @@ s32 gup_update_proc(void *dir)
GTP_DEBUG("[update_proc]Begin update ......");
ts = i2c_get_clientdata(i2c_connect_client);
ts = i2c_get_clientdata(gtp_i2c_connect_client);
#if GTP_AUTO_UPDATE
if (searching_file)
@@ -2302,19 +2307,19 @@ s32 gup_update_proc(void *dir)
#if GTP_COMPATIBLE_MODE
if (CHIP_TYPE_GT9F == ts->chip_type)
{
return gup_fw_download_proc(dir, GTP_FL_FW_BURN);
return gtp_gup_fw_download_proc(dir, GTP_FL_FW_BURN);
}
#endif
update_msg.file = NULL;
ret = gup_check_update_file(i2c_connect_client, &fw_head, (u8*)dir); //20121211
ret = gup_check_update_file(gtp_i2c_connect_client, &fw_head, (u8*)dir); //20121211
if(FAIL == ret)
{
GTP_ERROR("[update_proc]check update file fail.");
goto file_fail;
}
ret = gup_get_ic_fw_msg(i2c_connect_client);
ret = gup_get_ic_fw_msg(gtp_i2c_connect_client);
if(FAIL == ret)
{
GTP_ERROR("[update_proc]get ic message fail.");
@@ -2333,7 +2338,7 @@ s32 gup_update_proc(void *dir)
#if GTP_ESD_PROTECT
gtp_esd_switch(ts->client, SWITCH_OFF);
#endif
ret = gup_enter_update_mode(i2c_connect_client);
ret = gup_enter_update_mode(gtp_i2c_connect_client);
if(FAIL == ret)
{
GTP_ERROR("[update_proc]enter update mode fail.");
@@ -2345,7 +2350,7 @@ s32 gup_update_proc(void *dir)
show_len = 10;
total_len = 100;
update_msg.fw_burned_len = 0;
ret = gup_burn_dsp_isp(i2c_connect_client);
ret = gup_burn_dsp_isp(gtp_i2c_connect_client);
if(FAIL == ret)
{
GTP_ERROR("[update_proc]burn dsp isp fail.");
@@ -2353,7 +2358,7 @@ s32 gup_update_proc(void *dir)
}
show_len = 20;
ret = gup_burn_fw_ss51(i2c_connect_client);
ret = gup_burn_fw_ss51(gtp_i2c_connect_client);
if(FAIL == ret)
{
GTP_ERROR("[update_proc]burn ss51 firmware fail.");
@@ -2361,7 +2366,7 @@ s32 gup_update_proc(void *dir)
}
show_len = 30;
ret = gup_burn_fw_dsp(i2c_connect_client);
ret = gup_burn_fw_dsp(gtp_i2c_connect_client);
if(FAIL == ret)
{
GTP_ERROR("[update_proc]burn dsp firmware fail.");
@@ -2369,7 +2374,7 @@ s32 gup_update_proc(void *dir)
}
show_len = 40;
ret = gup_burn_fw_boot(i2c_connect_client);
ret = gup_burn_fw_boot(gtp_i2c_connect_client);
if(FAIL == ret)
{
GTP_ERROR("[update_proc]burn bootloader firmware fail.");
@@ -2377,7 +2382,7 @@ s32 gup_update_proc(void *dir)
}
show_len = 50;
ret = gup_burn_fw_boot_isp(i2c_connect_client);
ret = gup_burn_fw_boot_isp(gtp_i2c_connect_client);
if (FAIL == ret)
{
GTP_ERROR("[update_proc]burn boot_isp firmware fail.");
@@ -2385,7 +2390,7 @@ s32 gup_update_proc(void *dir)
}
show_len = 60;
ret = gup_burn_fw_link(i2c_connect_client);
ret = gup_burn_fw_link(gtp_i2c_connect_client);
if (FAIL == ret)
{
GTP_ERROR("[update_proc]burn link firmware fail.");
@@ -2393,7 +2398,7 @@ s32 gup_update_proc(void *dir)
}
show_len = 70;
ret = gup_burn_fw_gwake(i2c_connect_client);
ret = gup_burn_fw_gwake(gtp_i2c_connect_client);
if (FAIL == ret)
{
GTP_ERROR("[update_proc]burn app_code firmware fail.");
@@ -2401,7 +2406,7 @@ s32 gup_update_proc(void *dir)
}
show_len = 80;
ret = gup_burn_fw_finish(i2c_connect_client);
ret = gup_burn_fw_finish(gtp_i2c_connect_client);
if (FAIL == ret)
{
GTP_ERROR("[update_proc]burn finish fail.");
@@ -2439,7 +2444,7 @@ update_fail:
else
{
GTP_DEBUG("[update_proc]send config.");
ret = gtp_send_cfg(i2c_connect_client);
ret = gtp_send_cfg(gtp_i2c_connect_client);
if (ret < 0)
{
GTP_ERROR("[update_proc]send config fail.");
@@ -2472,7 +2477,7 @@ file_fail:
gup_search_file(AUTO_SEARCH_CFG);
if (got_file_flag & CFG_FILE_READY)
{
ret = gup_update_config(i2c_connect_client);
ret = gup_update_config(gtp_i2c_connect_client);
if(ret <= 0)
{
GTP_ERROR("Update config failed.");
@@ -2495,6 +2500,7 @@ file_fail:
return FAIL;
}
}
#endif
#if GTP_AUTO_UPDATE
u8 gup_init_update_proc(struct goodix_ts_data *ts)
@@ -2570,16 +2576,16 @@ u8 gup_init_update_proc(struct goodix_ts_data *ts)
#if GTP_COMPATIBLE_MODE
u8 i2c_opr_buf[GTP_ADDR_LENGTH + FL_PACK_SIZE] = {0};
u8 chk_cmp_buf[FL_PACK_SIZE] = {0};
static u8 i2c_opr_buf[GTP_ADDR_LENGTH + FL_PACK_SIZE] = {0};
static u8 chk_cmp_buf[FL_PACK_SIZE] = {0};
extern s32 gtp_fw_startup(struct i2c_client *client);
//extern s32 gtp_fw_startup(struct i2c_client *client);
static u8 gup_download_fw_dsp(struct i2c_client *client, u8 dwn_mode);
static s32 gup_burn_fw_proc(struct i2c_client *client, u16 start_addr, s32 start_index, s32 burn_len);
static s32 gup_check_and_repair(struct i2c_client *client, u16 start_addr, s32 start_index, s32 chk_len);
u8 gup_check_fs_mounted(char *path_name)
u8 gtp_gup_check_fs_mounted(char *path_name)
{
struct path root_path;
struct path path;
@@ -2617,7 +2623,7 @@ u8 gup_check_fs_mounted(char *path_name)
#endif
}
s32 i2c_write_bytes(struct i2c_client *client, u16 addr, u8 *buf, s32 len)
s32 gtp_i2c_write_bytes(struct i2c_client *client, u16 addr, u8 *buf, s32 len)
{
s32 ret = 0;
s32 write_bytes = 0;
@@ -2658,7 +2664,7 @@ s32 i2c_write_bytes(struct i2c_client *client, u16 addr, u8 *buf, s32 len)
return 1;
}
s32 i2c_read_bytes(struct i2c_client *client, u16 addr, u8 *buf, s32 len)
s32 gtp_i2c_read_bytes(struct i2c_client *client, u16 addr, u8 *buf, s32 len)
{
s32 ret = 0;
s32 read_bytes = 0;
@@ -2705,11 +2711,11 @@ s32 i2c_read_bytes(struct i2c_client *client, u16 addr, u8 *buf, s32 len)
static void gup_bit_write(s32 addr, s32 bit, s32 val)
{
u8 buf;
i2c_read_bytes(i2c_connect_client, addr, &buf, 1);
gtp_i2c_read_bytes(gtp_i2c_connect_client, addr, &buf, 1);
buf = (buf & (~((u8)1 << bit))) | ((u8)val << bit);
i2c_write_bytes(i2c_connect_client, addr, &buf, 1);
gtp_i2c_write_bytes(gtp_i2c_connect_client, addr, &buf, 1);
}
static void gup_clk_count_init(s32 bCh, s32 bCNT)
@@ -2722,13 +2728,13 @@ static void gup_clk_count_init(s32 bCh, s32 bCNT)
gup_bit_write(_fRW_MISCTL__MEA, 1, 1);
//_bRW_MISCTL__MEA_MODE = 0; //Pulse mode
buf = 0;
i2c_write_bytes(i2c_connect_client, _bRW_MISCTL__MEA_MODE, &buf, 1);
gtp_i2c_write_bytes(gtp_i2c_connect_client, _bRW_MISCTL__MEA_MODE, &buf, 1);
//_bRW_MISCTL__MEA_SRCSEL = 8 + bCh; //From GIO1
buf = 8 + bCh;
i2c_write_bytes(i2c_connect_client, _bRW_MISCTL__MEA_SRCSEL, &buf, 1);
gtp_i2c_write_bytes(gtp_i2c_connect_client, _bRW_MISCTL__MEA_SRCSEL, &buf, 1);
//_wRW_MISCTL__MEA_MAX_NUM = bCNT; //Set the Measure Counts = 1
buf = bCNT;
i2c_write_bytes(i2c_connect_client, _wRW_MISCTL__MEA_MAX_NUM, &buf, 1);
gtp_i2c_write_bytes(gtp_i2c_connect_client, _wRW_MISCTL__MEA_MAX_NUM, &buf, 1);
//_fRW_MISCTL__MEA_CLR = 0; //Frequency measure not clear
gup_bit_write(_fRW_MISCTL__MEA, 1, 0);
//_fRW_MISCTL__MEA_EN = 1;
@@ -2743,7 +2749,7 @@ static u32 gup_clk_count_get(void)
while (ready == 0) //Wait for measurement complete
{
i2c_read_bytes(i2c_connect_client, _bRO_MISCTL__MEA_RDY, buf, 1);
gtp_i2c_read_bytes(gtp_i2c_connect_client, _bRO_MISCTL__MEA_RDY, buf, 1);
ready = buf[0];
}
@@ -2751,7 +2757,7 @@ static u32 gup_clk_count_get(void)
//_fRW_MISCTL__MEA_EN = 0;
gup_bit_write(_fRW_MISCTL__MEA, 0, 0);
i2c_read_bytes(i2c_connect_client, _dRO_MISCTL__MEA_VAL, buf, 4);
gtp_i2c_read_bytes(gtp_i2c_connect_client, _dRO_MISCTL__MEA_VAL, buf, 4);
GTP_DEBUG("Clk_count 0: %2X", buf[0]);
GTP_DEBUG("Clk_count 1: %2X", buf[1]);
GTP_DEBUG("Clk_count 2: %2X", buf[2]);
@@ -2761,23 +2767,23 @@ static u32 gup_clk_count_get(void)
GTP_INFO("Clk_count : %d", temp);
return temp;
}
u8 gup_clk_dac_setting(int dac)
static u8 gup_clk_dac_setting(int dac)
{
s8 buf1, buf2;
i2c_read_bytes(i2c_connect_client, _wRW_MISCTL__RG_DMY, &buf1, 1);
i2c_read_bytes(i2c_connect_client, _bRW_MISCTL__RG_OSC_CALIB, &buf2, 1);
gtp_i2c_read_bytes(gtp_i2c_connect_client, _wRW_MISCTL__RG_DMY, &buf1, 1);
gtp_i2c_read_bytes(gtp_i2c_connect_client, _bRW_MISCTL__RG_OSC_CALIB, &buf2, 1);
buf1 = (buf1 & 0xFFCF) | ((dac & 0x03) << 4);
buf2 = (dac >> 2) & 0x3f;
i2c_write_bytes(i2c_connect_client, _wRW_MISCTL__RG_DMY, &buf1, 1);
i2c_write_bytes(i2c_connect_client, _bRW_MISCTL__RG_OSC_CALIB, &buf2, 1);
gtp_i2c_write_bytes(gtp_i2c_connect_client, _wRW_MISCTL__RG_DMY, &buf1, 1);
gtp_i2c_write_bytes(gtp_i2c_connect_client, _bRW_MISCTL__RG_OSC_CALIB, &buf2, 1);
return 0;
}
static u8 gup_clk_calibration_pin_select(s32 bCh)
static u8 gtp_gup_clk_calibration_pin_select(s32 bCh)
{
s32 i2c_addr;
@@ -2822,6 +2828,9 @@ static u8 gup_clk_calibration_pin_select(s32 bCh)
case 9:
i2c_addr = _fRW_MISCTL__GIO9;
break;
default:
return -1;
}
gup_bit_write(i2c_addr, 1, 0);
@@ -2829,12 +2838,12 @@ static u8 gup_clk_calibration_pin_select(s32 bCh)
return 0;
}
void gup_output_pulse(int t)
static void gup_output_pulse(int t)
{
unsigned long flags;
struct goodix_ts_data *ts;
ts = i2c_get_clientdata(i2c_connect_client);
ts = i2c_get_clientdata(gtp_i2c_connect_client);
GTP_GPIO_OUTPUT(ts->irq_pin, 0);
msleep(10);
@@ -2861,13 +2870,13 @@ static void gup_sys_clk_init(void)
gup_bit_write(_rRW_MISCTL__ANA_RXADC_B0_, 5, 0);
//_bRW_MISCTL__RG_LDO_A18_PWD = 0; //DrvMISCTL_A18_PowerON
buf = 0;
i2c_write_bytes(i2c_connect_client, _bRW_MISCTL__RG_LDO_A18_PWD, &buf, 1);
gtp_i2c_write_bytes(gtp_i2c_connect_client, _bRW_MISCTL__RG_LDO_A18_PWD, &buf, 1);
//_bRW_MISCTL__RG_BG_PWD = 0; //DrvMISCTL_BG_PowerON
buf = 0;
i2c_write_bytes(i2c_connect_client, _bRW_MISCTL__RG_BG_PWD, &buf, 1);
gtp_i2c_write_bytes(gtp_i2c_connect_client, _bRW_MISCTL__RG_BG_PWD, &buf, 1);
//_bRW_MISCTL__RG_CLKGEN_PWD = 0; //DrvMISCTL_CLKGEN_PowerON
buf = 0;
i2c_write_bytes(i2c_connect_client, _bRW_MISCTL__RG_CLKGEN_PWD, &buf, 1);
gtp_i2c_write_bytes(gtp_i2c_connect_client, _bRW_MISCTL__RG_CLKGEN_PWD, &buf, 1);
//_fRW_MISCTL__RG_RXADC_PWD = 0; //DrvMISCTL_RX_ADC_PowerON
gup_bit_write(_rRW_MISCTL__ANA_RXADC_B0_, 0, 0);
//_fRW_MISCTL__RG_RXADC_REF_PWD = 0; //DrvMISCTL_RX_ADCREF_PowerON
@@ -2875,26 +2884,26 @@ static void gup_sys_clk_init(void)
//gup_clk_dac_setting(60);
//_bRW_MISCTL__OSC_CK_SEL = 1;;
buf = 1;
i2c_write_bytes(i2c_connect_client, _bRW_MISCTL__OSC_CK_SEL, &buf, 1);
gtp_i2c_write_bytes(gtp_i2c_connect_client, _bRW_MISCTL__OSC_CK_SEL, &buf, 1);
}
s32 gup_clk_calibration(void)
s32 gtp_gup_clk_calibration(void)
{
u8 buf;
//u8 trigger;
s32 i;
struct timeval start, end;
//struct timeval start, end;
s32 count;
s32 count_ref;
s32 sec;
s32 usec;
//s32 count_ref;
//s32 sec;
//s32 usec;
//unsigned long flags;
struct goodix_ts_data *ts;
ts = i2c_get_clientdata(i2c_connect_client);
ts = i2c_get_clientdata(gtp_i2c_connect_client);
buf = 0x0C; // hold ss51 and dsp
i2c_write_bytes(i2c_connect_client, _rRW_MISCTL__SWRST_B0_, &buf, 1);
gtp_i2c_write_bytes(gtp_i2c_connect_client, _rRW_MISCTL__SWRST_B0_, &buf, 1);
//_fRW_MISCTL__CLK_BIAS = 0; //disable clock bias
gup_bit_write(_rRW_MISCTL_RG_DMY83, 7, 0);
@@ -2906,12 +2915,12 @@ s32 gup_clk_calibration(void)
gup_bit_write(_rRW_MISCTL__GIO1CTL_B1_, 1, 0);
//buf = 0x00;
//i2c_write_bytes(i2c_connect_client, _rRW_MISCTL__SWRST_B0_, &buf, 1);
//gtp_i2c_write_bytes(gtp_i2c_connect_client, _rRW_MISCTL__SWRST_B0_, &buf, 1);
//msleep(1000);
GTP_INFO("CLK calibration GO");
gup_sys_clk_init();
gup_clk_calibration_pin_select(1);//use GIO1 to do the calibration
gtp_gup_clk_calibration_pin_select(1);//use GIO1 to do the calibration
GTP_GPIO_OUTPUT(ts->irq_pin, 0);
@@ -2928,7 +2937,7 @@ s32 gup_clk_calibration(void)
gup_clk_dac_setting(i);
gup_clk_count_init(1, CLK_AVG_TIME);
#if 0
#if 1
gup_output_pulse(PULSE_LENGTH);
count = gup_clk_count_get();
@@ -2975,24 +2984,24 @@ s32 gup_clk_calibration(void)
//clk_dac = i;
gtp_reset_guitar(i2c_connect_client, 20);
gtp_reset_guitar(gtp_i2c_connect_client, 20);
#if 0//for debug
//-- ouput clk to GPIO 4
buf = 0x00;
i2c_write_bytes(i2c_connect_client, 0x41FA, &buf, 1);
gtp_i2c_write_bytes(gtp_i2c_connect_client, 0x41FA, &buf, 1);
buf = 0x00;
i2c_write_bytes(i2c_connect_client, 0x4104, &buf, 1);
gtp_i2c_write_bytes(gtp_i2c_connect_client, 0x4104, &buf, 1);
buf = 0x00;
i2c_write_bytes(i2c_connect_client, 0x4105, &buf, 1);
gtp_i2c_write_bytes(gtp_i2c_connect_client, 0x4105, &buf, 1);
buf = 0x00;
i2c_write_bytes(i2c_connect_client, 0x4106, &buf, 1);
gtp_i2c_write_bytes(gtp_i2c_connect_client, 0x4106, &buf, 1);
buf = 0x01;
i2c_write_bytes(i2c_connect_client, 0x4107, &buf, 1);
gtp_i2c_write_bytes(gtp_i2c_connect_client, 0x4107, &buf, 1);
buf = 0x06;
i2c_write_bytes(i2c_connect_client, 0x41F8, &buf, 1);
gtp_i2c_write_bytes(gtp_i2c_connect_client, 0x41F8, &buf, 1);
buf = 0x02;
i2c_write_bytes(i2c_connect_client, 0x41F9, &buf, 1);
gtp_i2c_write_bytes(gtp_i2c_connect_client, 0x41F9, &buf, 1);
#endif
/*GTP_GPIO_AS_INT(ts->irq_pin);*/
@@ -3002,7 +3011,7 @@ s32 gup_clk_calibration(void)
s32 gup_hold_ss51_dsp(struct i2c_client *client)
static s32 gup_hold_ss51_dsp(struct i2c_client *client)
{
s32 ret = -1;
s32 retry = 0;
@@ -3083,7 +3092,7 @@ s32 gup_hold_ss51_dsp(struct i2c_client *client)
return SUCCESS;
}
s32 gup_enter_update_mode_fl(struct i2c_client *client)
static s32 gup_enter_update_mode_fl(struct i2c_client *client)
{
s32 ret = -1;
//s32 retry = 0;
@@ -3215,7 +3224,7 @@ static s32 gup_burn_fw_proc(struct i2c_client *client, u16 start_addr, s32 start
GTP_DEBUG("burn firmware: 0x%04X, %d bytes, start_index: 0x%04X", start_addr, burn_len, start_index);
ret = i2c_write_bytes(client, start_addr, (u8*)&gtp_default_FW_fl[FW_HEAD_LENGTH + start_index], burn_len);
ret = gtp_i2c_write_bytes(client, start_addr, (u8*)&gtp_default_FW_fl[FW_HEAD_LENGTH + start_index], burn_len);
if (ret < 0)
{
GTP_ERROR("burn 0x%04X, %d bytes failed!", start_addr, burn_len);
@@ -3248,7 +3257,7 @@ static s32 gup_check_and_repair(struct i2c_client *client, u16 start_addr, s32 s
GTP_ERROR("Check failed, buffer overflow\n");
break;
}
ret = i2c_read_bytes(client, cmp_addr, chk_cmp_buf, cmp_len);
ret = gtp_i2c_read_bytes(client, cmp_addr, chk_cmp_buf, cmp_len);
if (ret < 0)
{
chk_fail = 1;
@@ -3259,7 +3268,7 @@ static s32 gup_check_and_repair(struct i2c_client *client, u16 start_addr, s32 s
if (chk_cmp_buf[i] != gtp_default_FW_fl[FW_HEAD_LENGTH + start_index +i])
{
chk_fail = 1;
i2c_write_bytes(client, cmp_addr+i, &gtp_default_FW_fl[FW_HEAD_LENGTH + start_index + i], cmp_len-i);
gtp_i2c_write_bytes(client, cmp_addr+i, &gtp_default_FW_fl[FW_HEAD_LENGTH + start_index + i], cmp_len-i);
GTP_ERROR("Check failed index: %d(%d != %d), redownload chuck", i, chk_cmp_buf[i],
gtp_default_FW_fl[FW_HEAD_LENGTH + start_index +i]);
break;
@@ -3373,7 +3382,7 @@ static s32 gup_prepare_fl_fw(char *path, st_fw_head *fw_head)
s32 ret = 0;
s32 i = 0;
s32 timeout = 0;
struct goodix_ts_data *ts = i2c_get_clientdata(i2c_connect_client);
struct goodix_ts_data *ts = i2c_get_clientdata(gtp_i2c_connect_client);
if (!memcmp(path, "update", 6))
{
@@ -3512,14 +3521,14 @@ static u8 gup_check_update_file_fl(struct i2c_client *client, st_fw_head* fw_hea
return ret;
}
s32 gup_fw_download_proc(void *dir, u8 dwn_mode)
s32 gtp_gup_fw_download_proc(void *dir, u8 dwn_mode)
{
s32 ret = 0;
u8 retry = 0;
st_fw_head fw_head;
struct goodix_ts_data *ts;
ts = i2c_get_clientdata(i2c_connect_client);
ts = i2c_get_clientdata(gtp_i2c_connect_client);
if (NULL == dir)
{
if(GTP_FL_FW_BURN == dwn_mode) // GT9XXF firmware burn mode
@@ -3543,7 +3552,7 @@ s32 gup_fw_download_proc(void *dir, u8 dwn_mode)
total_len = 100;
show_len = 0;
ret = gup_check_update_file_fl(i2c_connect_client, &fw_head, (char *)dir);
ret = gup_check_update_file_fl(gtp_i2c_connect_client, &fw_head, (char *)dir);
show_len = 10;
if (FAIL == ret)
@@ -3570,7 +3579,7 @@ s32 gup_fw_download_proc(void *dir, u8 dwn_mode)
#endif
}
ret = gup_enter_update_mode_fl(i2c_connect_client);
ret = gup_enter_update_mode_fl(gtp_i2c_connect_client);
show_len = 20;
if (FAIL == ret)
{
@@ -3580,7 +3589,7 @@ s32 gup_fw_download_proc(void *dir, u8 dwn_mode)
while (retry++ < 5)
{
ret = gup_download_fw_ss51(i2c_connect_client, dwn_mode);
ret = gup_download_fw_ss51(gtp_i2c_connect_client, dwn_mode);
show_len = 60;
if (FAIL == ret)
{
@@ -3588,7 +3597,7 @@ s32 gup_fw_download_proc(void *dir, u8 dwn_mode)
continue;
}
ret = gup_download_fw_dsp(i2c_connect_client, dwn_mode);
ret = gup_download_fw_dsp(gtp_i2c_connect_client, dwn_mode);
show_len = 80;
if (FAIL == ret)
{

319
drivers/media/platform/rockchip/cif/capture.c
View File

@@ -1638,22 +1638,22 @@ static void rkcif_rx_buffer_free(struct rkcif_stream *stream)
}
}
static void rkcif_s_rx_buffer(struct rkcif_device *dev, struct rkisp_rx_buf *dbufs)
static void rkcif_s_rx_buffer(struct rkcif_stream *stream, struct rkisp_rx_buf *dbufs)
{
struct rkcif_device *dev = stream->cifdev;
struct v4l2_subdev *sd;
struct rkcif_rx_buffer *rx_buf = NULL;
sd = get_rkisp_sd(dev->sditf[0]);
if (!sd)
return;
if (dev->rdbk_debug &&
dbufs->sequence < 15) {
rx_buf = to_cif_rx_buf(dbufs);
v4l2_info(&dev->v4l2_dev,
"s_buf seq %d type %d, dma addr %x, %lld\n",
dbufs->sequence, dbufs->type, (u32)rx_buf->dummy.dma_addr,
ktime_get_ns());
rkcif_time_get_ns(dev));
}
v4l2_subdev_call(sd, video, s_rx_buffer, dbufs, NULL);
}
@@ -1755,9 +1755,9 @@ static void rkcif_rdbk_frame_end_toisp(struct rkcif_stream *stream,
}
dev->rdbk_rx_buf[RDBK_M]->dbufs.sequence = dev->rdbk_rx_buf[RDBK_L]->dbufs.sequence;
dev->rdbk_rx_buf[RDBK_S]->dbufs.sequence = dev->rdbk_rx_buf[RDBK_L]->dbufs.sequence;
rkcif_s_rx_buffer(dev, &dev->rdbk_rx_buf[RDBK_L]->dbufs);
rkcif_s_rx_buffer(dev, &dev->rdbk_rx_buf[RDBK_M]->dbufs);
rkcif_s_rx_buffer(dev, &dev->rdbk_rx_buf[RDBK_S]->dbufs);
rkcif_s_rx_buffer(&dev->stream[RDBK_L], &dev->rdbk_rx_buf[RDBK_L]->dbufs);
rkcif_s_rx_buffer(&dev->stream[RDBK_M], &dev->rdbk_rx_buf[RDBK_M]->dbufs);
rkcif_s_rx_buffer(&dev->stream[RDBK_S], &dev->rdbk_rx_buf[RDBK_S]->dbufs);
rkcif_rdbk_with_tools(&dev->stream[RDBK_L], dev->rdbk_rx_buf[RDBK_L]);
rkcif_rdbk_with_tools(&dev->stream[RDBK_M], dev->rdbk_rx_buf[RDBK_M]);
rkcif_rdbk_with_tools(&dev->stream[RDBK_S], dev->rdbk_rx_buf[RDBK_S]);
@@ -1800,8 +1800,8 @@ static void rkcif_rdbk_frame_end_toisp(struct rkcif_stream *stream,
}
}
dev->rdbk_rx_buf[RDBK_M]->dbufs.sequence = dev->rdbk_rx_buf[RDBK_L]->dbufs.sequence;
rkcif_s_rx_buffer(dev, &dev->rdbk_rx_buf[RDBK_L]->dbufs);
rkcif_s_rx_buffer(dev, &dev->rdbk_rx_buf[RDBK_M]->dbufs);
rkcif_s_rx_buffer(&dev->stream[RDBK_L], &dev->rdbk_rx_buf[RDBK_L]->dbufs);
rkcif_s_rx_buffer(&dev->stream[RDBK_M], &dev->rdbk_rx_buf[RDBK_M]->dbufs);
rkcif_rdbk_with_tools(&dev->stream[RDBK_L], dev->rdbk_rx_buf[RDBK_L]);
rkcif_rdbk_with_tools(&dev->stream[RDBK_M], dev->rdbk_rx_buf[RDBK_M]);
atomic_dec(&dev->stream[RDBK_L].buf_cnt);
@@ -1964,7 +1964,7 @@ static int rkcif_assign_new_buffer_update_toisp(struct rkcif_stream *stream,
struct sditf_priv *priv = dev->sditf[0];
u32 frm_addr_y, buff_addr_y;
unsigned long flags;
int on = 0;
if (mbus_cfg->type == V4L2_MBUS_CSI2_DPHY ||
mbus_cfg->type == V4L2_MBUS_CSI2_CPHY ||
@@ -1977,8 +1977,17 @@ static int rkcif_assign_new_buffer_update_toisp(struct rkcif_stream *stream,
get_dvp_reg_index_of_frm0_y_addr(channel_id) :
get_dvp_reg_index_of_frm1_y_addr(channel_id);
}
spin_lock_irqsave(&stream->vbq_lock, flags);
if (stream->cur_skip_frame)
goto out_get_buf;
memset(&stream->toisp_buf_state, 0, sizeof(stream->toisp_buf_state));
if (!list_empty(&stream->rx_buf_head)) {
if (stream->curr_buf_toisp && stream->next_buf_toisp &&
stream->curr_buf_toisp != stream->next_buf_toisp)
stream->toisp_buf_state.state = RKCIF_TOISP_BUF_ROTATE;
else
stream->toisp_buf_state.state = RKCIF_TOISP_BUF_LOSS;
if (stream->frame_phase == CIF_CSI_FRAME0_READY) {
active_buf = stream->curr_buf_toisp;
@@ -1995,10 +2004,10 @@ static int rkcif_assign_new_buffer_update_toisp(struct rkcif_stream *stream,
active_buf->dbufs.is_first = true;
active_buf->dbufs.sequence = stream->frame_idx - 1;
active_buf->dbufs.timestamp = stream->readout.fs_timestamp;
active_buf->fe_timestamp = ktime_get_ns();
active_buf->fe_timestamp = rkcif_time_get_ns(dev);
stream->last_frame_idx = stream->frame_idx;
if (dev->hdr.hdr_mode == NO_HDR) {
rkcif_s_rx_buffer(dev, &active_buf->dbufs);
rkcif_s_rx_buffer(stream, &active_buf->dbufs);
if (dev->is_support_tools && stream->tools_vdev)
rkcif_rdbk_with_tools(stream, active_buf);
atomic_dec(&stream->buf_cnt);
@@ -2007,7 +2016,7 @@ static int rkcif_assign_new_buffer_update_toisp(struct rkcif_stream *stream,
}
} else {
if (active_buf)
rkcif_s_rx_buffer(dev, &active_buf->dbufs);
rkcif_s_rx_buffer(stream, &active_buf->dbufs);
if (dev->is_support_tools && stream->tools_vdev)
rkcif_rdbk_with_tools(stream, active_buf);
}
@@ -2026,10 +2035,10 @@ static int rkcif_assign_new_buffer_update_toisp(struct rkcif_stream *stream,
active_buf->dbufs.is_first = true;
active_buf->dbufs.sequence = stream->frame_idx - 1;
active_buf->dbufs.timestamp = stream->readout.fs_timestamp;
active_buf->fe_timestamp = ktime_get_ns();
active_buf->fe_timestamp = rkcif_time_get_ns(dev);
stream->last_frame_idx = stream->frame_idx;
if (dev->hdr.hdr_mode == NO_HDR) {
rkcif_s_rx_buffer(dev, &active_buf->dbufs);
rkcif_s_rx_buffer(stream, &active_buf->dbufs);
if (dev->is_support_tools && stream->tools_vdev)
rkcif_rdbk_with_tools(stream, active_buf);
atomic_dec(&stream->buf_cnt);
@@ -2038,7 +2047,7 @@ static int rkcif_assign_new_buffer_update_toisp(struct rkcif_stream *stream,
}
} else {
if (active_buf)
rkcif_s_rx_buffer(dev, &active_buf->dbufs);
rkcif_s_rx_buffer(stream, &active_buf->dbufs);
if (dev->is_support_tools && stream->tools_vdev)
rkcif_rdbk_with_tools(stream, active_buf);
}
@@ -2053,10 +2062,8 @@ static int rkcif_assign_new_buffer_update_toisp(struct rkcif_stream *stream,
if (dev->hw_dev->dummy_buf.vaddr) {
if (stream->frame_phase == CIF_CSI_FRAME0_READY) {
active_buf = stream->curr_buf_toisp;
stream->curr_buf_toisp = NULL;
} else {
active_buf = stream->next_buf_toisp;
stream->next_buf_toisp = NULL;
}
} else if (stream->curr_buf_toisp && stream->next_buf_toisp &&
stream->curr_buf_toisp != stream->next_buf_toisp) {
@@ -2069,40 +2076,25 @@ static int rkcif_assign_new_buffer_update_toisp(struct rkcif_stream *stream,
stream->next_buf_toisp = stream->curr_buf_toisp;
buffer = stream->curr_buf_toisp;
}
stream->toisp_buf_state.state = RKCIF_TOISP_BUF_THESAME;
if (stream->cifdev->rdbk_debug)
v4l2_info(&stream->cifdev->v4l2_dev,
"stream[%d] hold buf %x\n",
stream->id,
(u32)stream->next_buf_toisp->dummy.dma_addr);
} else {
if (stream->curr_buf_toisp)
active_buf = stream->curr_buf_toisp;
else if (stream->next_buf_toisp)
active_buf = stream->next_buf_toisp;
stream->toisp_buf_state.state = RKCIF_TOISP_BUF_LOSS;
}
stream->next_buf_toisp = NULL;
stream->curr_buf_toisp = NULL;
}
if (stream->lack_buf_cnt == 2 || stream->is_single_cap) {
stream->to_stop_dma = RKCIF_DMAEN_BY_ISP;
rkcif_stop_dma_capture(stream);
stream->is_single_cap = false;
if ((dev->hdr.hdr_mode == NO_HDR && atomic_read(&dev->streamoff_cnt) == 1) ||
(dev->hdr.hdr_mode == HDR_X2 && atomic_read(&dev->streamoff_cnt) == 2) ||
(dev->hdr.hdr_mode == HDR_X3 && atomic_read(&dev->streamoff_cnt) == 3)) {
dev->sensor_work.on = 0;
schedule_work(&dev->sensor_work.work);
}
}
if (active_buf) {
if (stream->frame_idx == 1)
active_buf->dbufs.is_first = true;
active_buf->dbufs.sequence = stream->frame_idx - 1;
active_buf->dbufs.timestamp = stream->readout.fs_timestamp;
active_buf->fe_timestamp = ktime_get_ns();
active_buf->fe_timestamp = rkcif_time_get_ns(dev);
stream->last_frame_idx = stream->frame_idx;
if (dev->hdr.hdr_mode == NO_HDR) {
rkcif_s_rx_buffer(dev, &active_buf->dbufs);
rkcif_s_rx_buffer(stream, &active_buf->dbufs);
atomic_dec(&stream->buf_cnt);
} else {
rkcif_rdbk_frame_end_toisp(stream, active_buf);
@@ -2117,18 +2109,6 @@ static int rkcif_assign_new_buffer_update_toisp(struct rkcif_stream *stream,
if (dev->is_support_tools && stream->tools_vdev && active_buf)
rkcif_rdbk_with_tools(stream, active_buf);
}
if (stream->is_single_cap) {
stream->to_stop_dma = RKCIF_DMAEN_BY_ISP;
rkcif_stop_dma_capture(stream);
rkcif_dphy_quick_stream(stream->cifdev, on);
stream->is_single_cap = false;
if ((dev->hdr.hdr_mode == NO_HDR && atomic_read(&dev->streamoff_cnt) == 1) ||
(dev->hdr.hdr_mode == HDR_X2 && atomic_read(&dev->streamoff_cnt) == 2) ||
(dev->hdr.hdr_mode == HDR_X3 && atomic_read(&dev->streamoff_cnt) == 3)) {
dev->sensor_work.on = 0;
schedule_work(&dev->sensor_work.work);
}
}
out_get_buf:
stream->frame_phase_cache = stream->frame_phase;
if (buffer) {
@@ -2185,10 +2165,12 @@ void rkcif_assign_check_buffer_update_toisp(struct rkcif_stream *stream)
u64 cur_time = 0;
int frame_phase = 0;
int frame_phase_next = 0;
bool is_early_update = false;
bool is_dual_update = false;
if (stream->curr_buf_toisp != stream->next_buf_toisp) {
if (stream->toisp_buf_state.state == RKCIF_TOISP_BUF_ROTATE ||
(stream->toisp_buf_state.state == RKCIF_TOISP_BUF_THESAME &&
stream->toisp_buf_state.check_cnt >= 1) ||
(stream->toisp_buf_state.state == RKCIF_TOISP_BUF_LOSS &&
stream->toisp_buf_state.check_cnt >= 2)) {
if (dev->rdbk_debug > 2 &&
stream->frame_idx < 15)
v4l2_info(&dev->v4l2_dev,
@@ -2202,21 +2184,27 @@ void rkcif_assign_check_buffer_update_toisp(struct rkcif_stream *stream)
dev->sensor_linetime = rkcif_get_linetime(stream);
vblank = rkcif_get_sensor_vblank(dev);
vblank_ns = vblank * dev->sensor_linetime;
cur_time = ktime_get_ns();
frame_phase = stream->frame_phase & CIF_CSI_FRAME0_READY ?
CIF_CSI_FRAME0_READY : CIF_CSI_FRAME1_READY;
frame_phase_next = stream->frame_phase & CIF_CSI_FRAME0_READY ?
CIF_CSI_FRAME1_READY : CIF_CSI_FRAME0_READY;
if (dev->chip_id > CHIP_RK3568_CIF &&
dev->hdr.hdr_mode == NO_HDR &&
cur_time - stream->readout.fe_timestamp < (vblank_ns - 500000) &&
stream->lack_buf_cnt == 2 &&
stream->frame_idx > stream->last_frame_idx)
is_early_update = true;
else if (!stream->dma_en)
is_dual_update = true;
cur_time = rkcif_time_get_ns(dev);
if (stream->toisp_buf_state.state == RKCIF_TOISP_BUF_THESAME) {
frame_phase = stream->frame_phase;
} else {
if (stream->toisp_buf_state.state == RKCIF_TOISP_BUF_LOSS &&
stream->toisp_buf_state.check_cnt == 0 &&
cur_time - stream->readout.fe_timestamp < (vblank_ns - 500000)) {
stream->toisp_buf_state.is_early_update = true;
frame_phase = stream->frame_phase & CIF_CSI_FRAME0_READY ?
CIF_CSI_FRAME1_READY : CIF_CSI_FRAME0_READY;
frame_phase_next = stream->frame_phase & CIF_CSI_FRAME0_READY ?
CIF_CSI_FRAME0_READY : CIF_CSI_FRAME1_READY;
} else {
if (stream->toisp_buf_state.check_cnt == 1 &&
(!stream->toisp_buf_state.is_early_update))
return;
frame_phase = stream->frame_phase;
stream->toisp_buf_state.is_early_update = false;
}
}
if (dev->rdbk_debug > 2 &&
stream->frame_idx < 15)
v4l2_info(&dev->v4l2_dev,
@@ -2288,7 +2276,7 @@ void rkcif_assign_check_buffer_update_toisp(struct rkcif_stream *stream)
if (stream->lack_buf_cnt)
stream->lack_buf_cnt--;
}
if (is_early_update) {
if (stream->toisp_buf_state.is_early_update) {
if (dev->rdbk_debug > 1 &&
stream->frame_idx < 15)
v4l2_info(&dev->v4l2_dev,
@@ -2304,7 +2292,7 @@ void rkcif_assign_check_buffer_update_toisp(struct rkcif_stream *stream)
active_buf->dbufs.sequence = stream->frame_idx - 1;
active_buf->dbufs.timestamp = stream->readout.fs_timestamp;
stream->last_frame_idx = stream->frame_idx;
rkcif_s_rx_buffer(dev, &active_buf->dbufs);
rkcif_s_rx_buffer(stream, &active_buf->dbufs);
}
if (dev->hw_dev->dummy_buf.vaddr)
return;
@@ -2330,30 +2318,8 @@ void rkcif_assign_check_buffer_update_toisp(struct rkcif_stream *stream)
} else {
rkcif_write_register(dev, frm_addr_y, buff_addr_y);
}
} else if (is_dual_update) {
if (mbus_cfg->type == V4L2_MBUS_CSI2_DPHY ||
mbus_cfg->type == V4L2_MBUS_CSI2_CPHY ||
mbus_cfg->type == V4L2_MBUS_CCP2) {
frm_addr_y = frame_phase_next & CIF_CSI_FRAME0_READY ?
get_reg_index_of_frm0_y_addr(stream->id) :
get_reg_index_of_frm1_y_addr(stream->id);
} else {
frm_addr_y = frame_phase_next & CIF_CSI_FRAME0_READY ?
get_dvp_reg_index_of_frm0_y_addr(stream->id) :
get_dvp_reg_index_of_frm1_y_addr(stream->id);
}
if (frame_phase == CIF_CSI_FRAME0_READY)
stream->next_buf_toisp = stream->curr_buf_toisp;
else
stream->curr_buf_toisp = stream->next_buf_toisp;
buff_addr_y = stream->curr_buf_toisp->dummy.dma_addr;
if (capture_info->mode == RKMODULE_MULTI_DEV_COMBINE_ONE) {
rkcif_write_buff_addr_multi_dev_combine(stream, frm_addr_y, 0,
buff_addr_y, 0, false);
} else {
rkcif_write_register(dev, frm_addr_y, buff_addr_y);
}
}
stream->toisp_buf_state.check_cnt++;
}
static void rkcif_assign_new_buffer_init(struct rkcif_stream *stream,
@@ -2651,7 +2617,7 @@ static int rkcif_assign_new_buffer_update(struct rkcif_stream *stream,
}
}
stream->frame_phase_cache = stream->frame_phase;
if (stream->is_single_cap) {
if (stream->is_single_cap && !stream->cur_skip_frame) {
stream->to_stop_dma = RKCIF_DMAEN_BY_VICAP;
rkcif_stop_dma_capture(stream);
rkcif_dphy_quick_stream(stream->cifdev, on);
@@ -2714,7 +2680,7 @@ static int rkcif_assign_new_buffer_update(struct rkcif_stream *stream,
}
}
if (dbufs)
rkcif_s_rx_buffer(dev, dbufs);
rkcif_s_rx_buffer(stream, dbufs);
}
}
spin_unlock_irqrestore(&stream->vbq_lock, flags);
@@ -2744,7 +2710,7 @@ stop_dma:
dbufs = &stream->curr_buf_toisp->dbufs;
}
if (dbufs)
rkcif_s_rx_buffer(dev, dbufs);
rkcif_s_rx_buffer(stream, dbufs);
if (stream->frame_phase == CIF_CSI_FRAME0_READY &&
stream->curr_buf) {
@@ -2909,7 +2875,13 @@ static int rkcif_get_new_buffer_wake_up_mode_rdbk(struct rkcif_stream *stream)
int frame_phase = 0;
spin_lock_irqsave(&stream->vbq_lock, flags);
memset(&stream->toisp_buf_state, 0, sizeof(stream->toisp_buf_state));
if (!list_empty(&stream->rx_buf_head)) {
if (stream->curr_buf_toisp && stream->next_buf_toisp &&
stream->curr_buf_toisp != stream->next_buf_toisp)
stream->toisp_buf_state.state = RKCIF_TOISP_BUF_ROTATE;
else
stream->toisp_buf_state.state = RKCIF_TOISP_BUF_LOSS;
if (stream->line_int_cnt % 2) {
buffer = list_first_entry(&stream->rx_buf_head,
struct rkcif_rx_buffer, list);
@@ -2945,8 +2917,10 @@ static int rkcif_get_new_buffer_wake_up_mode_rdbk(struct rkcif_stream *stream)
"stream[%d] hold buf %x\n",
stream->id,
(u32)stream->next_buf_toisp->dummy.dma_addr);
stream->toisp_buf_state.state = RKCIF_TOISP_BUF_THESAME;
} else {
ret = -EINVAL;
stream->toisp_buf_state.state = RKCIF_TOISP_BUF_LOSS;
}
}
if (buffer) {
@@ -4709,7 +4683,7 @@ int rkcif_init_rx_buf(struct rkcif_stream *stream, int buf_num)
if (priv && i == 0) {
buf->dbufs.is_first = true;
if (priv->mode.rdbk_mode == RKISP_VICAP_ONLINE)
rkcif_s_rx_buffer(dev, &buf->dbufs);
rkcif_s_rx_buffer(stream, &buf->dbufs);
}
i++;
if (!dev->is_thunderboot && i >= buf_num) {
@@ -4992,7 +4966,7 @@ void rkcif_do_stop_stream(struct rkcif_stream *stream,
spin_lock_irqsave(&stream->fps_lock, flags);
fs_time = stream->readout.fs_timestamp;
spin_unlock_irqrestore(&stream->fps_lock, flags);
cur_time = ktime_get_ns();
cur_time = rkcif_time_get_ns(dev);
if (cur_time > fs_time &&
cur_time - fs_time < (frame_time_ns - 10000000)) {
spin_lock_irqsave(&stream->vbq_lock, flags);
@@ -6133,6 +6107,7 @@ int rkcif_do_start_stream(struct rkcif_stream *stream, unsigned int mode)
int rkmodule_stream_seq = RKMODULE_START_STREAM_DEFAULT;
int ret;
int i = 0;
u32 skip_frame = 0;
v4l2_info(&dev->v4l2_dev, "stream[%d] start streaming\n", stream->id);
@@ -6260,6 +6235,15 @@ int rkcif_do_start_stream(struct rkcif_stream *stream, unsigned int mode)
if (ret < 0)
goto destroy_buf;
}
ret = v4l2_subdev_call(terminal_sensor->sd,
core, ioctl,
RKMODULE_GET_SKIP_FRAME,
&skip_frame);
if (!ret && skip_frame < RKCIF_SKIP_FRAME_MAX)
stream->skip_frame = skip_frame;
else
stream->skip_frame = 0;
stream->cur_skip_frame = stream->skip_frame;
}
if (dev->chip_id >= CHIP_RK1808_CIF) {
if (dev->active_sensor &&
@@ -7234,6 +7218,14 @@ void rkcif_set_fps(struct rkcif_stream *stream, struct rkcif_fps *fps)
skip_n);
}
static bool rkcif_check_can_be_online(struct rkcif_device *cif_dev)
{
if (cif_dev->chip_id == CHIP_RV1106_CIF &&
strstr(cif_dev->sditf[0]->mode.name, "unite"))
return false;
return true;
}
static int rkcif_do_reset_work(struct rkcif_device *cif_dev,
enum rkmodule_reset_src reset_src);
static bool rkcif_check_single_dev_stream_on(struct rkcif_hw *hw);
@@ -7254,6 +7246,7 @@ static long rkcif_ioctl_default(struct file *file, void *fh,
int ret = -EINVAL;
int i = 0;
int stream_num = 0;
bool is_can_be_online = false;
switch (cmd) {
case RKCIF_CMD_GET_CSI_MEMORY_MODE:
@@ -7313,8 +7306,11 @@ static long rkcif_ioctl_default(struct file *file, void *fh,
else
stream_num = 1;
if (stream_param->on) {
for (i = 0; i < stream_num; i++)
dev->stream[i].cur_skip_frame = dev->stream[i].skip_frame;
is_single_dev = rkcif_check_single_dev_stream_on(dev->hw_dev);
if (is_single_dev) {
is_can_be_online = rkcif_check_can_be_online(dev);
if (is_single_dev && is_can_be_online) {
for (i = 0; i < stream_num - 1; i++) {
dev->stream[i].to_en_dma = RKCIF_DMAEN_BY_ISP;
rkcif_enable_dma_capture(&dev->stream[i], true);
@@ -7331,6 +7327,11 @@ static long rkcif_ioctl_default(struct file *file, void *fh,
}
} else {
sditf_disable_immediately(dev->sditf[0]);
dev->sditf[0]->mode.rdbk_mode = RKISP_VICAP_RDBK_AUTO;
sd = get_rkisp_sd(dev->sditf[0]);
if (sd)
ret = v4l2_subdev_call(sd, core, ioctl,
RKISP_VICAP_CMD_MODE, &dev->sditf[0]->mode);
for (i = 0; i < stream_num; i++) {
if (dev->sditf[0]->mode.rdbk_mode == RKISP_VICAP_RDBK_AUTO)
dev->stream[i].to_en_dma = RKCIF_DMAEN_BY_ISP;
@@ -7367,6 +7368,9 @@ static long rkcif_ioctl_default(struct file *file, void *fh,
wait_for_completion_timeout(&dev->stream[i].stop_complete,
msecs_to_jiffies(RKCIF_STOP_MAX_WAIT_TIME_MS));
}
rkcif_dphy_quick_stream(dev, stream_param->on);
v4l2_subdev_call(dev->terminal_sensor.sd, core, ioctl,
RKMODULE_SET_QUICK_STREAM, &stream_param->on);
}
stream_param->frame_num = dev->stream[0].frame_idx - 1;
if (!dev->is_rtt_suspend)
@@ -8176,7 +8180,7 @@ static bool rkcif_is_csi2_err_trigger_reset(struct rkcif_timer *timer)
timer->csi2_err_triggered_cnt++;
if (timer->csi2_err_triggered_cnt == 1) {
is_first_err = true;
timer->csi2_first_err_timestamp = ktime_get_ns();
timer->csi2_first_err_timestamp = rkcif_time_get_ns(dev);
}
is_assign_triggered = true;
@@ -8188,7 +8192,7 @@ static bool rkcif_is_csi2_err_trigger_reset(struct rkcif_timer *timer)
if (!is_first_err) {
if (timer->csi2_err_triggered_cnt >= 1) {
cur_time = ktime_get_ns();
cur_time = rkcif_time_get_ns(dev);
diff_time = cur_time - timer->csi2_first_err_timestamp;
diff_time = div_u64(diff_time, 1000000);
if (diff_time >= timer->err_time_interval) {
@@ -8678,7 +8682,7 @@ static void rkcif_buf_done_prepare(struct rkcif_stream *stream,
else
vb_done->vb2_buf.timestamp = stream->readout.fs_timestamp;
vb_done->sequence = stream->frame_idx - 1;
active_buf->fe_timestamp = ktime_get_ns();
active_buf->fe_timestamp = rkcif_time_get_ns(cif_dev);
if (stream->is_line_wake_up) {
spin_lock_irqsave(&stream->fps_lock, flags);
if (mode)
@@ -8690,6 +8694,10 @@ static void rkcif_buf_done_prepare(struct rkcif_stream *stream,
}
if (stream->cif_fmt_in->field == V4L2_FIELD_INTERLACED)
vb_done->sequence /= 2;
if (stream->cur_skip_frame) {
rkcif_buf_queue(&active_buf->vb.vb2_buf);
return;
}
} else if (cif_dev->rdbk_buf[stream->id]) {
vb_done = &cif_dev->rdbk_buf[stream->id]->vb;
if (cif_dev->chip_id < CHIP_RK3588_CIF &&
@@ -8698,7 +8706,7 @@ static void rkcif_buf_done_prepare(struct rkcif_stream *stream,
else
vb_done->vb2_buf.timestamp = stream->readout.fs_timestamp;
vb_done->sequence = stream->frame_idx - 1;
cif_dev->rdbk_buf[stream->id]->fe_timestamp = ktime_get_ns();
cif_dev->rdbk_buf[stream->id]->fe_timestamp = rkcif_time_get_ns(cif_dev);
}
if (cif_dev->hdr.hdr_mode == NO_HDR || cif_dev->hdr.hdr_mode == HDR_COMPR) {
@@ -8917,10 +8925,10 @@ static void rkcif_line_wake_up_rdbk(struct rkcif_stream *stream, int mipi_id)
spin_unlock_irqrestore(&stream->vbq_lock, flags);
active_buf->dbufs.sequence = stream->frame_idx - 1;
active_buf->dbufs.timestamp = stream->readout.fs_timestamp;
active_buf->fe_timestamp = ktime_get_ns();
active_buf->fe_timestamp = rkcif_time_get_ns(stream->cifdev);
stream->last_frame_idx = stream->frame_idx;
if (stream->cifdev->hdr.hdr_mode == NO_HDR) {
rkcif_s_rx_buffer(stream->cifdev, &active_buf->dbufs);
rkcif_s_rx_buffer(stream, &active_buf->dbufs);
if (stream->cifdev->is_support_tools && stream->tools_vdev)
rkcif_rdbk_with_tools(stream, active_buf);
} else {
@@ -8937,7 +8945,7 @@ static void rkcif_deal_readout_time(struct rkcif_stream *stream)
unsigned long flags;
spin_lock_irqsave(&stream->fps_lock, flags);
stream->readout.fe_timestamp = ktime_get_ns();
stream->readout.fe_timestamp = rkcif_time_get_ns(cif_dev);
if (cif_dev->inf_id == RKCIF_DVP) {
spin_unlock_irqrestore(&stream->fps_lock, flags);
@@ -8984,11 +8992,11 @@ static void rkcif_update_stream(struct rkcif_device *cif_dev,
if (stream->frame_phase & CIF_CSI_FRAME0_READY) {
if (stream->curr_buf)
active_buf = stream->curr_buf;
stream->fps_stats.frm0_timestamp = ktime_get_ns();
stream->fps_stats.frm0_timestamp = rkcif_time_get_ns(cif_dev);
} else if (stream->frame_phase & CIF_CSI_FRAME1_READY) {
if (stream->next_buf)
active_buf = stream->next_buf;
stream->fps_stats.frm1_timestamp = ktime_get_ns();
stream->fps_stats.frm1_timestamp = rkcif_time_get_ns(cif_dev);
}
spin_unlock_irqrestore(&stream->fps_lock, flags);
}
@@ -9010,7 +9018,7 @@ static void rkcif_update_stream(struct rkcif_device *cif_dev,
cif_dev->active_sensor->mbus.type == V4L2_MBUS_BT656 &&
stream->id != 0)
stream->frame_idx++;
if (!stream->is_line_wake_up && stream->dma_en & RKCIF_DMAEN_BY_VICAP)
if (!stream->is_line_wake_up)
rkcif_buf_done_prepare(stream, active_buf, mipi_id, 0);
if (cif_dev->chip_id == CHIP_RV1126_CIF ||
@@ -9032,9 +9040,9 @@ static void rkcif_update_stream_toisp(struct rkcif_device *cif_dev,
spin_lock(&stream->fps_lock);
if (stream->frame_phase & CIF_CSI_FRAME0_READY)
stream->fps_stats.frm0_timestamp = ktime_get_ns();
stream->fps_stats.frm0_timestamp = rkcif_time_get_ns(cif_dev);
else if (stream->frame_phase & CIF_CSI_FRAME1_READY)
stream->fps_stats.frm1_timestamp = ktime_get_ns();
stream->fps_stats.frm1_timestamp = rkcif_time_get_ns(cif_dev);
spin_unlock(&stream->fps_lock);
if (cif_dev->inf_id == RKCIF_MIPI_LVDS)
@@ -9066,11 +9074,11 @@ static void rkcif_update_stream_rockit(struct rkcif_device *cif_dev,
if (stream->frame_phase & CIF_CSI_FRAME0_READY) {
if (stream->curr_buf_rockit)
active_buf = stream->curr_buf_rockit;
stream->fps_stats.frm0_timestamp = ktime_get_ns();
stream->fps_stats.frm0_timestamp = rkcif_time_get_ns(cif_dev);
} else if (stream->frame_phase & CIF_CSI_FRAME1_READY) {
if (stream->next_buf_rockit)
active_buf = stream->next_buf_rockit;
stream->fps_stats.frm1_timestamp = ktime_get_ns();
stream->fps_stats.frm1_timestamp = rkcif_time_get_ns(cif_dev);
}
spin_unlock_irqrestore(&stream->fps_lock, flags);
}
@@ -9383,7 +9391,7 @@ static bool rkcif_is_reduced_frame_rate(struct rkcif_device *dev)
v4l2_dbg(3, rkcif_debug, &dev->v4l2_dev, "diff_time:%lld,devi_t:%ld,devi_h:%d\n",
diff_time, timer->line_end_cycle * deviation, deviation);
cur_time = ktime_get_ns();
cur_time = rkcif_time_get_ns(dev);
time_distance = timestamp0 > timestamp1 ?
cur_time - timestamp0 : cur_time - timestamp1;
time_distance = div_u64(time_distance, 1000);
@@ -10097,12 +10105,17 @@ static void rkcif_toisp_check_stop_status(struct sditf_priv *priv,
complete(&stream->stop_complete);
}
}
if (stream->is_single_cap) {
if (stream->is_single_cap && (!stream->cur_skip_frame)) {
rkcif_dphy_quick_stream(stream->cifdev, on);
stream->cifdev->sensor_work.on = 0;
schedule_work(&stream->cifdev->sensor_work.work);
stream->is_single_cap = false;
}
if (stream->cur_skip_frame &&
(stream->cifdev->hdr.hdr_mode == NO_HDR ||
(stream->cifdev->hdr.hdr_mode == HDR_X2 && stream->id == 1) ||
(stream->cifdev->hdr.hdr_mode == HDR_X3 && stream->id == 2)))
stream->cur_skip_frame--;
if (stream->cifdev->chip_id >= CHIP_RV1106_CIF)
rkcif_modify_frame_skip_config(stream);
if (stream->cifdev->rdbk_debug &&
@@ -10139,14 +10152,14 @@ static void rkcif_toisp_check_stop_status(struct sditf_priv *priv,
if (stream->id == 0)
rkcif_send_sof(stream->cifdev);
stream->frame_idx++;
cur_time = ktime_get_ns();
cur_time = rkcif_time_get_ns(stream->cifdev);
stream->readout.readout_time = cur_time - stream->readout.fs_timestamp;
stream->readout.fs_timestamp = cur_time;
stream->buf_wake_up_cnt++;
if (stream->frame_idx % 2)
stream->fps_stats.frm0_timestamp = ktime_get_ns();
stream->fps_stats.frm0_timestamp = rkcif_time_get_ns(stream->cifdev);
else
stream->fps_stats.frm1_timestamp = ktime_get_ns();
stream->fps_stats.frm1_timestamp = rkcif_time_get_ns(stream->cifdev);
if (stream->cifdev->rdbk_debug &&
stream->frame_idx < 15)
v4l2_info(&priv->cif_dev->v4l2_dev,
@@ -10271,7 +10284,7 @@ static void rkcif_deal_sof(struct rkcif_device *cif_dev)
if (cif_dev->chip_id < CHIP_RK3588_CIF)
detect_stream->fs_cnt_in_single_frame++;
spin_lock_irqsave(&detect_stream->fps_lock, flags);
detect_stream->readout.fs_timestamp = ktime_get_ns();
detect_stream->readout.fs_timestamp = rkcif_time_get_ns(cif_dev);
spin_unlock_irqrestore(&detect_stream->fps_lock, flags);
if (cif_dev->sync_cfg.type != RKCIF_NOSYNC_MODE) {
@@ -10322,7 +10335,7 @@ static void rkcif_deal_sof(struct rkcif_device *cif_dev)
"stream[%d] sof %d %lld\n",
detect_stream->id,
detect_stream->frame_idx - 1,
ktime_get_ns());
rkcif_time_get_ns(cif_dev));
}
}
@@ -10416,7 +10429,7 @@ static void rkcif_get_resmem_head(struct rkcif_device *cif_dev)
int cam_idx = 0;
char cam_idx_str[3] = {0};
if (!cif_dev->is_thunderboot && !cif_dev->is_rtt_suspend)
if (!cif_dev->is_rtt_suspend)
return;
strscpy(cam_idx_str, cif_dev->terminal_sensor.sd->name + 1, 2);
cam_idx_str[2] = '\0';
@@ -10431,6 +10444,8 @@ static void rkcif_get_resmem_head(struct rkcif_device *cif_dev)
size = sizeof(struct rkisp32_thunderboot_resmem_head);
offset = size * cam_idx;
}
/* currently, thunderboot with mcu only run one camera */
offset = 0;
if (size && size < cif_dev->resmem_size) {
dma_sync_single_for_cpu(cif_dev->dev, cif_dev->resmem_addr + offset,
@@ -10612,11 +10627,14 @@ int rkcif_stream_resume(struct rkcif_device *cif_dev, int mode)
int resume_cnt = 0;
unsigned long flags;
bool is_single_dev = false;
bool is_can_be_online = false;
struct rkisp_vicap_mode vicap_mode;
mutex_lock(&cif_dev->stream_lock);
rkcif_get_resmem_head(cif_dev);
is_single_dev = rkcif_check_single_dev_stream_on(cif_dev->hw_dev);
is_can_be_online = rkcif_check_can_be_online(cif_dev);
if (cif_dev->resume_mode == RKISP_RTT_MODE_ONE_FRAME) {
if (cif_dev->is_rtt_suspend) {
capture_mode = RKCIF_STREAM_MODE_TOISP_RDBK;
@@ -10639,14 +10657,20 @@ int rkcif_stream_resume(struct rkcif_device *cif_dev, int mode)
}
}
} else if (cif_dev->resume_mode == RKISP_RTT_MODE_MULTI_FRAME) {
if (is_single_dev) {
if (is_single_dev && is_can_be_online) {
capture_mode = RKCIF_STREAM_MODE_TOISP;
if (priv)
priv->mode.rdbk_mode = RKISP_VICAP_ONLINE;
} else {
capture_mode = RKCIF_STREAM_MODE_TOISP_RDBK;
if (priv)
priv->mode.rdbk_mode = RKISP_VICAP_RDBK_AUTO;
if (cif_dev->is_thunderboot) {
capture_mode = RKCIF_STREAM_MODE_TOISP_RDBK;
if (priv)
priv->mode.rdbk_mode = RKISP_VICAP_RDBK_AUTO;
} else {
capture_mode = RKCIF_STREAM_MODE_CAPTURE;
if (priv)
priv->mode.rdbk_mode = RKISP_VICAP_RDBK_AIQ;
}
}
} else {
if (priv && priv->mode.rdbk_mode == RKISP_VICAP_ONLINE)
@@ -10729,11 +10753,12 @@ int rkcif_stream_resume(struct rkcif_device *cif_dev, int mode)
rkcif_init_rx_buf(stream, 1);
} else {
if (stream->is_single_cap && stream->id == 0) {
priv->mode.rdbk_mode = RKISP_VICAP_RDBK_AUTO_ONE_FRAME;
vicap_mode = priv->mode;
vicap_mode.rdbk_mode = RKISP_VICAP_RDBK_AUTO_ONE_FRAME;
sd = get_rkisp_sd(priv);
if (sd) {
ret = v4l2_subdev_call(sd, core, ioctl,
RKISP_VICAP_CMD_MODE, &priv->mode);
RKISP_VICAP_CMD_MODE, &vicap_mode);
if (ret)
v4l2_err(&cif_dev->v4l2_dev,
"set isp work mode rdbk aotu oneframe fail\n");
@@ -10764,6 +10789,7 @@ int rkcif_stream_resume(struct rkcif_device *cif_dev, int mode)
__func__, stream->id);
resume_cnt++;
stream->cur_skip_frame = stream->skip_frame;
v4l2_dbg(1, rkcif_debug, &cif_dev->v4l2_dev,
"resume stream[%d], frm_idx:%d, csi_sof:%d\n",
stream->id, stream->frame_idx,
@@ -10802,7 +10828,7 @@ void rkcif_err_print_work(struct work_struct *work)
u64 cur_time = 0;
bool is_print = false;
cur_time = ktime_get_ns();
cur_time = rkcif_time_get_ns(dev);
if (err_state_work->last_timestamp == 0) {
is_print = true;
} else {
@@ -10891,6 +10917,7 @@ void rkcif_irq_pingpong_v1(struct rkcif_device *cif_dev)
unsigned long flags;
bool is_update = false;
int ret = 0;
int on = 0;
if (!cif_dev->active_sensor)
return;
@@ -11002,7 +11029,7 @@ void rkcif_irq_pingpong_v1(struct rkcif_device *cif_dev)
stream->id,
stream->frame_idx - 1,
stream->frame_phase,
ktime_get_ns());
rkcif_time_get_ns(cif_dev));
if (stream->is_finish_stop_dma && stream->is_wait_dma_stop) {
stream->is_wait_dma_stop = false;
wake_up(&stream->wq_stopped);
@@ -11040,6 +11067,21 @@ void rkcif_irq_pingpong_v1(struct rkcif_device *cif_dev)
stream->dma_en);
rkcif_update_stream_rockit(cif_dev, stream, mipi_id);
}
if (stream->is_single_cap) {
stream->to_stop_dma = RKCIF_DMAEN_BY_ISP;
rkcif_stop_dma_capture(stream);
stream->is_single_cap = false;
if ((cif_dev->hdr.hdr_mode == NO_HDR && atomic_read(&cif_dev->streamoff_cnt) == 1) ||
(cif_dev->hdr.hdr_mode == HDR_X2 && atomic_read(&cif_dev->streamoff_cnt) == 2) ||
(cif_dev->hdr.hdr_mode == HDR_X3 && atomic_read(&cif_dev->streamoff_cnt) == 3)) {
rkcif_dphy_quick_stream(stream->cifdev, on);
cif_dev->sensor_work.on = 0;
schedule_work(&cif_dev->sensor_work.work);
}
}
if (stream->cur_skip_frame)
stream->cur_skip_frame--;
if (cif_dev->chip_id >= CHIP_RV1106_CIF)
rkcif_modify_frame_skip_config(stream);
@@ -11087,10 +11129,11 @@ void rkcif_irq_pingpong_v1(struct rkcif_device *cif_dev)
if (intstat & CSI_START_INTSTAT(i)) {
stream = &cif_dev->stream[i];
if (i == 0) {
rkcif_deal_sof(cif_dev);
if (!stream->cur_skip_frame)
rkcif_deal_sof(cif_dev);
} else {
spin_lock_irqsave(&stream->fps_lock, flags);
stream->readout.fs_timestamp = ktime_get_ns();
stream->readout.fs_timestamp = rkcif_time_get_ns(cif_dev);
stream->frame_idx++;
spin_unlock_irqrestore(&stream->fps_lock, flags);
}
@@ -11121,7 +11164,8 @@ void rkcif_irq_pingpong_v1(struct rkcif_device *cif_dev)
v4l2_info(&cif_dev->v4l2_dev,
"line int %lld\n",
stream->line_int_cnt);
if (cif_dev->sditf[0] && cif_dev->sditf[0]->mode.rdbk_mode == RKISP_VICAP_RDBK_AUTO)
if (cif_dev->sditf[0] && (cif_dev->sditf[0]->mode.rdbk_mode == RKISP_VICAP_RDBK_AUTO ||
cif_dev->sditf[0]->mode.rdbk_mode == RKISP_VICAP_RDBK_AUTO_ONE_FRAME))
rkcif_line_wake_up_rdbk(stream, stream->id);
else
rkcif_line_wake_up(stream, stream->id);
@@ -11230,7 +11274,8 @@ void rkcif_irq_pingpong_v1(struct rkcif_device *cif_dev)
if (intstat & DVP_FRAME0_START_ID0 || intstat & DVP_FRAME1_START_ID0) {
stream->is_in_vblank = false;
rkcif_deal_sof(cif_dev);
if (!stream->cur_skip_frame)
rkcif_deal_sof(cif_dev);
}
if (stream->crop_dyn_en)
@@ -11342,10 +11387,11 @@ void rkcif_irq_pingpong(struct rkcif_device *cif_dev)
if (intstat & CSI_START_INTSTAT(i)) {
stream = &cif_dev->stream[i];
if (i == 0) {
rkcif_deal_sof(cif_dev);
if (!stream->cur_skip_frame)
rkcif_deal_sof(cif_dev);
} else {
spin_lock_irqsave(&stream->fps_lock, flags);
stream->readout.fs_timestamp = ktime_get_ns();
stream->readout.fs_timestamp = rkcif_time_get_ns(cif_dev);
stream->frame_idx++;
spin_unlock_irqrestore(&stream->fps_lock, flags);
}
@@ -11472,9 +11518,9 @@ void rkcif_irq_pingpong(struct rkcif_device *cif_dev)
spin_lock_irqsave(&stream->fps_lock, flags);
if (stream->frame_phase & CIF_CSI_FRAME0_READY)
stream->fps_stats.frm0_timestamp = ktime_get_ns();
stream->fps_stats.frm0_timestamp = rkcif_time_get_ns(cif_dev);
else if (stream->frame_phase & CIF_CSI_FRAME1_READY)
stream->fps_stats.frm1_timestamp = ktime_get_ns();
stream->fps_stats.frm1_timestamp = rkcif_time_get_ns(cif_dev);
spin_unlock_irqrestore(&stream->fps_lock, flags);
ret = rkcif_assign_new_buffer_oneframe(stream,
@@ -11545,7 +11591,8 @@ void rkcif_irq_pingpong(struct rkcif_device *cif_dev)
(cif_dev->dvp_sof_in_oneframe == 0)) {
if ((intstat & (PRE_INF_FRAME_END | PST_INF_FRAME_END)) == 0x0) {
if ((intstat & INTSTAT_ERR) == 0x0) {
rkcif_deal_sof(cif_dev);
if (!stream->cur_skip_frame)
rkcif_deal_sof(cif_dev);
int_en = rkcif_read_register(cif_dev, CIF_REG_DVP_INTEN);
int_en &= ~LINE_INT_EN;
rkcif_write_register(cif_dev, CIF_REG_DVP_INTEN, int_en);

2
drivers/media/platform/rockchip/cif/cif-luma.c
View File

@@ -361,7 +361,7 @@ void rkcif_luma_isr(struct rkcif_luma_vdev *luma_vdev, int mipi_id, u32 frame_id
if (send_task) {
luma_vdev->work.readout = RKCIF_READOUT_LUMA;
luma_vdev->work.timestamp = ktime_get_ns();
luma_vdev->work.timestamp = rkcif_time_get_ns(luma_vdev->cifdev);
luma_vdev->work.frame_id = frame_id;
if (frm_mode == RKCIF_LUMA_THREEFRM)

2
drivers/media/platform/rockchip/cif/cif-scale.c
View File

@@ -968,7 +968,7 @@ static void rkcif_scale_vb_done_oneframe(struct rkcif_scale_vdev *scale_vdev,
scale_vdev->pixm.plane_fmt[i].sizeimage);
}
vb_done->vb2_buf.timestamp = ktime_get_ns();
vb_done->vb2_buf.timestamp = rkcif_time_get_ns(scale_vdev->cifdev);
vb2_buffer_done(&vb_done->vb2_buf, VB2_BUF_STATE_DONE);
}

25
drivers/media/platform/rockchip/cif/dev.h
View File

@@ -99,6 +99,8 @@
*/
#define RKCIF_STOP_MAX_WAIT_TIME_MS (500)
#define RKCIF_SKIP_FRAME_MAX (16)
enum rkcif_workmode {
RKCIF_WORKMODE_ONEFRAME = 0x00,
RKCIF_WORKMODE_PINGPONG = 0x01,
@@ -476,6 +478,18 @@ struct rkcif_sync_cfg {
u32 group;
};
enum rkcif_toisp_buf_update_state {
RKCIF_TOISP_BUF_ROTATE,
RKCIF_TOISP_BUF_THESAME,
RKCIF_TOISP_BUF_LOSS,
};
struct rkcif_toisp_buf_state {
enum rkcif_toisp_buf_update_state state;
int check_cnt;
bool is_early_update;
};
/*
* struct rkcif_stream - Stream states TODO
*
@@ -547,6 +561,9 @@ struct rkcif_stream {
int new_fource_idx;
atomic_t buf_cnt;
struct completion stop_complete;
struct rkcif_toisp_buf_state toisp_buf_state;
u32 skip_frame;
u32 cur_skip_frame;
bool stopping;
bool crop_enable;
bool crop_dyn_en;
@@ -1007,4 +1024,12 @@ void rkcif_err_print_work(struct work_struct *work);
int rkcif_stream_suspend(struct rkcif_device *cif_dev, int mode);
int rkcif_stream_resume(struct rkcif_device *cif_dev, int mode);
static inline u64 rkcif_time_get_ns(struct rkcif_device *dev)
{
if (dev->chip_id == CHIP_RV1106_CIF)
return ktime_get_boottime_ns();
else
return ktime_get_ns();
}
#endif

20
drivers/media/platform/rockchip/cif/mipi-csi2.c
View File

@@ -234,6 +234,8 @@ static int csi2_start(struct csi2_dev *csi2)
v4l2_err(&csi2->sd, "%s: enable clks failed\n", __func__);
return ret;
}
enable_irq(csi2->csi2_hw[csi_idx]->irq1);
enable_irq(csi2->csi2_hw[csi_idx]->irq2);
csi2_enable(csi2->csi2_hw[csi_idx], host_type);
}
@@ -251,6 +253,8 @@ static int csi2_start(struct csi2_dev *csi2)
err_assert_reset:
for (i = 0; i < csi2->csi_info.csi_num; i++) {
csi_idx = csi2->csi_info.csi_idx[i];
disable_irq(csi2->csi2_hw[csi_idx]->irq1);
disable_irq(csi2->csi2_hw[csi_idx]->irq2);
csi2_disable(csi2->csi2_hw[csi_idx]);
csi2_disable_clks(csi2->csi2_hw[csi_idx]);
}
@@ -268,6 +272,8 @@ static void csi2_stop(struct csi2_dev *csi2)
for (i = 0; i < csi2->csi_info.csi_num; i++) {
csi_idx = csi2->csi_info.csi_idx[i];
disable_irq(csi2->csi2_hw[csi_idx]->irq1);
disable_irq(csi2->csi2_hw[csi_idx]->irq2);
csi2_disable(csi2->csi2_hw[csi_idx]);
csi2_hw_do_reset(csi2->csi2_hw[csi_idx]);
csi2_disable_clks(csi2->csi2_hw[csi_idx]);
@@ -752,6 +758,11 @@ static irqreturn_t rk_csirx_irq1_handler(int irq, void *ctx)
char vc_info[CSI_VCINFO_LEN] = {0};
bool is_add_cnt = false;
if (!csi2_hw || !csi2) {
disable_irq_nosync(irq);
return IRQ_HANDLED;
}
val = read_csihost_reg(csi2_hw->base, CSIHOST_ERR1);
if (val) {
if (val & CSIHOST_ERR1_PHYERR_SPTSYNCHS) {
@@ -852,6 +863,11 @@ static irqreturn_t rk_csirx_irq2_handler(int irq, void *ctx)
char err_str[CSI_ERRSTR_LEN] = {0};
char vc_info[CSI_VCINFO_LEN] = {0};
if (!csi2_hw) {
disable_irq_nosync(irq);
return IRQ_HANDLED;
}
val = read_csihost_reg(csi2_hw->base, CSIHOST_ERR2);
if (val) {
if (val & CSIHOST_ERR2_PHYERR_ESC) {
@@ -1273,7 +1289,7 @@ static int csi2_hw_probe(struct platform_device *pdev)
irq = platform_get_irq_byname(pdev, "csi-intr1");
if (irq > 0) {
ret = devm_request_irq(&pdev->dev, irq,
rk_csirx_irq1_handler, 0,
rk_csirx_irq1_handler, IRQ_NOAUTOEN,
dev_driver_string(&pdev->dev),
&pdev->dev);
if (ret < 0)
@@ -1287,7 +1303,7 @@ static int csi2_hw_probe(struct platform_device *pdev)
irq = platform_get_irq_byname(pdev, "csi-intr2");
if (irq > 0) {
ret = devm_request_irq(&pdev->dev, irq,
rk_csirx_irq2_handler, 0,
rk_csirx_irq2_handler, IRQ_NOAUTOEN,
dev_driver_string(&pdev->dev),
&pdev->dev);
if (ret < 0)

3
drivers/media/platform/rockchip/cif/subdev-itf.c
View File

@@ -913,7 +913,8 @@ static int sditf_s_rx_buffer(struct v4l2_subdev *sd,
}
spin_unlock_irqrestore(&stream->vbq_lock, flags);
if (!cif_dev->is_thunderboot)
if (!cif_dev->is_thunderboot ||
cif_dev->is_rdbk_to_online == false)
return 0;
if (dbufs->runtime_us && cif_dev->early_line == 0) {

8
drivers/media/platform/rockchip/isp/bridge_v20.c
View File

@@ -668,7 +668,7 @@ static int bridge_frame_end(struct rkisp_bridge_device *dev, u32 state)
struct rkisp_hw_dev *hw = ispdev->hw_dev;
struct v4l2_subdev *sd = v4l2_get_subdev_hostdata(&dev->sd);
unsigned long lock_flags = 0;
u64 ns = ktime_get_ns();
u64 ns = rkisp_time_get_ns(ispdev);
struct rkisp_bridge_buf *buf;
u32 val;
@@ -710,7 +710,7 @@ static int bridge_frame_end(struct rkisp_bridge_device *dev, u32 state)
if (!sof_ns)
sof_ns = 0;
if (!ns)
ns = ktime_get_ns();
ns = rkisp_time_get_ns(ispdev);
hw->cur_buf->frame_timestamp = ns;
hw->cur_buf->index = ispdev->dev_id;
v4l2_subdev_call(sd, core, ioctl, RKISP_ISPP_CMD_REQUEST_REGBUF,
@@ -743,11 +743,11 @@ static int bridge_frame_end(struct rkisp_bridge_device *dev, u32 state)
buf = to_bridge_buf(hw->cur_buf);
vaddr = buf->dummy[GROUP_BUF_PIC].vaddr;
size = buf->dummy[GROUP_BUF_PIC].size;
*(u64 *)(vaddr + size / 4 - 2) = ktime_get_ns();
*(u64 *)(vaddr + size / 4 - 2) = rkisp_time_get_ns(ispdev);
vaddr = buf->dummy[GROUP_BUF_GAIN].vaddr;
size = buf->dummy[GROUP_BUF_GAIN].size;
*(u64 *)(vaddr + size / 4 - 2) = ktime_get_ns();
*(u64 *)(vaddr + size / 4 - 2) = rkisp_time_get_ns(ispdev);
hw->cur_buf->mfbc_dmaidx = hw->cur_buf->didx[GROUP_BUF_PIC];
hw->cur_buf->gain_dmaidx = hw->cur_buf->didx[GROUP_BUF_GAIN];
hw->cur_buf->is_move_judge = true;

4
drivers/media/platform/rockchip/isp/bridge_v30.c
View File

@@ -113,7 +113,7 @@ static int bridge_frame_end(struct rkisp_bridge_device *dev, u32 state)
struct rkisp_hw_dev *hw = ispdev->hw_dev;
struct v4l2_subdev *sd = v4l2_get_subdev_hostdata(&dev->sd);
unsigned long lock_flags = 0;
u64 ns = ktime_get_ns();
u64 ns = rkisp_time_get_ns(ispdev);
if (dev->stopping) {
if (!hw->is_single) {
@@ -147,7 +147,7 @@ static int bridge_frame_end(struct rkisp_bridge_device *dev, u32 state)
rkisp_dmarx_get_frame(ispdev, &hw->cur_buf->frame_id,
NULL, &ns, true);
if (!ns)
ns = ktime_get_ns();
ns = rkisp_time_get_ns(ispdev);
hw->cur_buf->frame_timestamp = ns;
hw->cur_buf->index = ispdev->dev_id;
v4l2_subdev_call(sd, video, s_rx_buffer, hw->cur_buf, NULL);

6
drivers/media/platform/rockchip/isp/capture_v20.c
View File

@@ -1392,10 +1392,10 @@ static int mi_frame_end(struct rkisp_stream *stream, u32 state)
stream->curr_buf->vb.sequence =
atomic_read(&stream->sequence) - 1;
if (!ns)
ns = ktime_get_ns();
ns = rkisp_time_get_ns(dev);
vb2_buf->timestamp = ns;
ns = ktime_get_ns();
ns = rkisp_time_get_ns(dev);
stream->dbg.interval = ns - stream->dbg.timestamp;
stream->dbg.timestamp = ns;
stream->dbg.id = stream->curr_buf->vb.sequence;
@@ -1439,7 +1439,7 @@ static int mi_frame_end(struct rkisp_stream *stream, u32 state)
u32 sizeimage = vb2_plane_size(&stream->curr_buf->vb.vb2_buf, 0);
u32 *buf = (u32 *)vb2_plane_vaddr(&stream->curr_buf->vb.vb2_buf, 0);
*(u64 *)(buf + sizeimage / 4 - 2) = ktime_get_ns();
*(u64 *)(buf + sizeimage / 4 - 2) = rkisp_time_get_ns(dev);
stream->curr_buf->dev_id = dev->dev_id;
rkisp_bridge_save_spbuf(dev, stream->curr_buf);
} else {

4
drivers/media/platform/rockchip/isp/capture_v21.c
View File

@@ -1251,10 +1251,10 @@ static int mi_frame_end(struct rkisp_stream *stream, u32 state)
atomic_read(&stream->sequence) - 1;
}
if (!ns)
ns = ktime_get_ns();
ns = rkisp_time_get_ns(dev);
vb2_buf->timestamp = ns;
ns = ktime_get_ns();
ns = rkisp_time_get_ns(dev);
stream->dbg.interval = ns - stream->dbg.timestamp;
stream->dbg.timestamp = ns;
stream->dbg.id = stream->curr_buf->vb.sequence;

4
drivers/media/platform/rockchip/isp/capture_v30.c
View File

@@ -996,10 +996,10 @@ static int mi_frame_end(struct rkisp_stream *stream, u32 state)
rkisp_dmarx_get_frame(dev, &i, NULL, &ns, true);
buf->vb.sequence = i;
if (!ns)
ns = ktime_get_ns();
ns = rkisp_time_get_ns(dev);
vb2_buf->timestamp = ns;
ns = ktime_get_ns();
ns = rkisp_time_get_ns(dev);
stream->dbg.interval = ns - stream->dbg.timestamp;
stream->dbg.timestamp = ns;
stream->dbg.id = buf->vb.sequence;

8
drivers/media/platform/rockchip/isp/capture_v32.c
View File

@@ -1240,7 +1240,7 @@ static void luma_frame_readout(unsigned long arg)
data++;
}
if (!ns)
ns = ktime_get_ns();
ns = rkisp_time_get_ns(dev);
stream->curr_buf->vb.vb2_buf.timestamp = ns;
stream->curr_buf->vb.sequence = seq;
vb2_set_plane_payload(&stream->curr_buf->vb.vb2_buf, 0, val * 4);
@@ -1455,10 +1455,10 @@ static int mi_frame_end(struct rkisp_stream *stream, u32 state)
rkisp_dmarx_get_frame(dev, &i, NULL, &ns, true);
if (!ns)
ns = ktime_get_ns();
ns = rkisp_time_get_ns(dev);
buf->vb.sequence = i;
buf->vb.vb2_buf.timestamp = ns;
ns = ktime_get_ns();
ns = rkisp_time_get_ns(dev);
stream->dbg.interval = ns - stream->dbg.timestamp;
stream->dbg.delay = ns - dev->isp_sdev.frm_timestamp;
stream->dbg.timestamp = ns;
@@ -2325,7 +2325,7 @@ void rkisp_mi_v32_isr(u32 mis_val, struct rkisp_device *dev)
wake_up(&stream->done);
}
} else if (stream->id == RKISP_STREAM_MP && dev->cap_dev.wrap_line) {
ns = ktime_get_ns();
ns = rkisp_time_get_ns(dev);
rkisp_dmarx_get_frame(dev, &seq, NULL, NULL, true);
stream->dbg.interval = ns - stream->dbg.timestamp;
stream->dbg.delay = ns - dev->isp_sdev.frm_timestamp;

11
drivers/media/platform/rockchip/isp/common.c
View File

@@ -468,3 +468,14 @@ void rkisp_free_common_dummy_buf(struct rkisp_device *dev)
else
rkisp_free_buffer(dev, &hw->dummy_buf);
}
u64 rkisp_time_get_ns(struct rkisp_device *dev)
{
u64 ns;
if (dev->isp_ver == ISP_V32)
ns = ktime_get_boottime_ns();
else
ns = ktime_get_ns();
return ns;
}

1
drivers/media/platform/rockchip/isp/common.h
View File

@@ -198,4 +198,5 @@ int rkisp_alloc_common_dummy_buf(struct rkisp_device *dev);
void rkisp_free_common_dummy_buf(struct rkisp_device *dev);
void rkisp_set_clk_rate(struct clk *clk, unsigned long rate);
u64 rkisp_time_get_ns(struct rkisp_device *dev);
#endif /* _RKISP_COMMON_H */

7
drivers/media/platform/rockchip/isp/dev.c
View File

@@ -1152,7 +1152,9 @@ static void rkisp_pm_complete(struct device *dev)
isp_dev->is_suspend = false;
isp_dev->isp_state = ISP_START | ISP_FRAME_END;
if (isp_dev->is_suspend_one_frame)
if (!hw->is_single && hw->is_multi_overflow)
hw->pre_dev_id++;
if (isp_dev->is_suspend_one_frame && !hw->is_multi_overflow)
isp_dev->is_first_double = true;
if (hw->isp_ver > ISP_V20) {
val = ISP3X_YNR_FST_FRAME | ISP3X_CNR_FST_FRAME |
@@ -1166,7 +1168,8 @@ static void rkisp_pm_complete(struct device *dev)
if (i == RKISP_STREAM_VIR || !stream->streaming || !stream->curr_buf)
continue;
/* skip first frame due to hw no reference frame information */
stream->skip_frame = 1;
if (isp_dev->is_first_double)
stream->skip_frame = 1;
}
if (hw->cur_dev_id == isp_dev->dev_id)
rkisp_rdbk_trigger_event(isp_dev, T_CMD_QUEUE, NULL);

2
drivers/media/platform/rockchip/isp/isp_mipi_luma.c
View File

@@ -396,7 +396,7 @@ void rkisp_luma_isr(struct rkisp_luma_vdev *luma_vdev, u32 isp_stat)
if (send_task) {
luma_vdev->work.readout = RKISP_ISP_READOUT_LUMA;
luma_vdev->work.timestamp = ktime_get_ns();
luma_vdev->work.timestamp = rkisp_time_get_ns(luma_vdev->dev);
luma_vdev->work.frame_id = cur_frame_id;
if (frm_mode == RKISP_LUMA_THREEFRM)

2
drivers/media/platform/rockchip/isp/isp_rockit.c
View File

@@ -254,7 +254,7 @@ int rkisp_rockit_buf_done(struct rkisp_stream *stream, int cmd)
rkisp_dmarx_get_frame(stream->ispdev, &seq, NULL, &ns, true);
if (!ns)
ns = ktime_get_ns();
ns = rkisp_time_get_ns(dev);
rockit_cfg->frame.u64PTS = ns;

2
drivers/media/platform/rockchip/isp/isp_stats_v21.c
View File

@@ -1100,7 +1100,7 @@ rkisp_stats_isr_v21(struct rkisp_isp_stats_vdev *stats_vdev,
work.frame_id = cur_frame_id;
work.isp_ris = temp_isp_ris | isp_ris;
work.isp3a_ris = temp_isp3a_ris | iq_3a_mask;
work.timestamp = ktime_get_ns();
work.timestamp = rkisp_time_get_ns(dev);
rkisp_stats_send_meas_v21(stats_vdev, &work);
}

2
drivers/media/platform/rockchip/isp/isp_stats_v2x.c
View File

@@ -1406,7 +1406,7 @@ rkisp_stats_isr_v2x(struct rkisp_isp_stats_vdev *stats_vdev,
work.frame_id = cur_frame_id;
work.isp_ris = temp_isp_ris | isp_ris;
work.isp3a_ris = temp_isp3a_ris | iq_3a_mask;
work.timestamp = ktime_get_ns();
work.timestamp = rkisp_time_get_ns(dev);
if (!IS_HDR_RDBK(dev->hdr.op_mode)) {
if (!kfifo_is_full(&stats_vdev->rd_kfifo))

2
drivers/media/platform/rockchip/isp/isp_stats_v32.c
View File

@@ -1046,7 +1046,7 @@ rkisp_stats_isr_v32(struct rkisp_isp_stats_vdev *stats_vdev,
work.frame_id = cur_frame_id;
work.isp_ris = temp_isp_ris | isp_ris;
work.isp3a_ris = temp_isp3a_ris;
work.timestamp = ktime_get_ns();
work.timestamp = rkisp_time_get_ns(stats_vdev->dev);
rkisp_stats_send_meas_v32(stats_vdev, &work);
}

2
drivers/media/platform/rockchip/isp/isp_stats_v3x.c
View File

@@ -1149,7 +1149,7 @@ rkisp_stats_isr_v3x(struct rkisp_isp_stats_vdev *stats_vdev,
work.frame_id = cur_frame_id;
work.isp_ris = temp_isp_ris | isp_ris;
work.isp3a_ris = temp_isp3a_ris | iq_3a_mask;
work.timestamp = ktime_get_ns();
work.timestamp = rkisp_time_get_ns(dev);
rkisp_stats_send_meas_v3x(stats_vdev, &work);
}

10
drivers/media/platform/rockchip/isp/rkisp.c
View File

@@ -4148,7 +4148,7 @@ void rkisp_isp_isr(unsigned int isp_mis,
if (isp_mis & CIF_ISP_FRAME)
sof_event_later = true;
if (dev->vs_irq < 0 && !sof_event_later) {
dev->isp_sdev.frm_timestamp = ktime_get_ns();
dev->isp_sdev.frm_timestamp = rkisp_time_get_ns(dev);
rkisp_isp_queue_event_sof(&dev->isp_sdev);
rkisp_stream_frame_start(dev, isp_mis);
}
@@ -4216,7 +4216,7 @@ vs_skip:
/* sampled input frame is complete */
if (isp_mis & CIF_ISP_FRAME_IN) {
dev->isp_sdev.dbg.interval =
ktime_get_ns() - dev->isp_sdev.dbg.timestamp;
rkisp_time_get_ns(dev) - dev->isp_sdev.dbg.timestamp;
rkisp_set_state(&dev->isp_state, ISP_FRAME_IN);
writel(CIF_ISP_FRAME_IN, base + CIF_ISP_ICR);
isp_mis_tmp = readl(base + CIF_ISP_MIS);
@@ -4230,7 +4230,7 @@ vs_skip:
dev->rawaf_irq_cnt = 0;
if (!dev->is_pre_on || !IS_HDR_RDBK(dev->rd_mode))
dev->isp_sdev.dbg.interval =
ktime_get_ns() - dev->isp_sdev.dbg.timestamp;
rkisp_time_get_ns(dev) - dev->isp_sdev.dbg.timestamp;
/* Clear Frame In (ISP) */
rkisp_set_state(&dev->isp_state, ISP_FRAME_END);
writel(CIF_ISP_FRAME, base + CIF_ISP_ICR);
@@ -4250,7 +4250,7 @@ vs_skip:
u64 tmp = dev->isp_sdev.dbg.interval +
dev->isp_sdev.dbg.timestamp;
dev->isp_sdev.dbg.timestamp = ktime_get_ns();
dev->isp_sdev.dbg.timestamp = rkisp_time_get_ns(dev);
/* v-blank: frame(N)start - frame(N-1)end */
dev->isp_sdev.dbg.delay = dev->isp_sdev.dbg.timestamp - tmp;
}
@@ -4302,7 +4302,7 @@ vs_skip:
/* cur frame end and next frame start irq togeter */
if (dev->vs_irq < 0 && sof_event_later) {
dev->isp_sdev.frm_timestamp = ktime_get_ns();
dev->isp_sdev.frm_timestamp = rkisp_time_get_ns(dev);
rkisp_isp_queue_event_sof(&dev->isp_sdev);
rkisp_stream_frame_start(dev, isp_mis);
}

1
drivers/pci/controller/dwc/pcie-dw-rockchip.c
View File

@@ -1842,6 +1842,7 @@ static int rk_pcie_really_probe(void *p)
if (!IS_ERR_OR_NULL(rk_pcie->prsnt_gpio)) {
if (!gpiod_get_value(rk_pcie->prsnt_gpio)) {
dev_info(dev, "device isn't present\n");
ret = -ENODEV;
goto release_driver;
}

2
drivers/rkflash/Kconfig
View File

@@ -22,7 +22,7 @@ comment "Rockchip Flash Devices"
config RK_SFTL
tristate "Rockchip Slc Nand FTL support"
default y
depends on (RK_NAND || (RK_SFC_NAND && RK_SFC_NAND_MTD !=y))
depends on (RK_NANDC_NAND || (RK_SFC_NAND && RK_SFC_NAND_MTD !=y))
help
This enables support for Slc Nand FTL.

3
include/uapi/linux/rk-camera-module.h
View File

@@ -183,6 +183,9 @@
#define RKMODULE_SET_CAPTURE_MODE \
_IOW('V', BASE_VIDIOC_PRIVATE + 40, struct rkmodule_capture_info)
#define RKMODULE_GET_SKIP_FRAME \
_IOW('V', BASE_VIDIOC_PRIVATE + 41, __u32)
struct rkmodule_i2cdev_info {
__u8 slave_addr;
} __attribute__ ((packed));