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media: rockchip: hdmirx: binding CPU compatible with RK3583
Find the physical ID based on the logical ID of the CPU. Currently, there are three possible order of physical CPU IDs: 1.Typical RK3588 platform: 0 1 2 3 4 5 6 7. 2.RK3588 NVR SDK swap cpu: 4 5 6 7 0 1 2 3. 3.RK3583: 0 1 2 3 4 5 or 0 1 2 3 6 7. Signed-off-by: Dingxian Wen <shawn.wen@rock-chips.com> Change-Id: I174c06afb143f05e07b4d277a487383c3119938f
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@@ -81,7 +81,10 @@ MODULE_PARM_DESC(low_latency, "low_latency en(0-1)");
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#define NO_LOCK_CFG_RETRY_TIME 300
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#define WAIT_LOCK_STABLE_TIME 20
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#define WAIT_AVI_PKT_TIME 300
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#define BIG_CPU_PHY_ID 5
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#define LOGIC_CPU_ID_1 1
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#define LOGIC_CPU_ID_2 2
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#define LOGIC_CPU_ID_5 5
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#define PHY_CPU_ID_4 4
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#define is_validfs(x) (x == 32000 || \
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x == 44100 || \
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@@ -3767,6 +3770,38 @@ static void hdmirx_work_wdt_config(struct work_struct *work)
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v4l2_dbg(3, debug, v4l2_dev, "hb\n");
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}
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static void hdmirx_get_phy_cpuid_func(void *_hdmirx_dev)
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{
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struct rk_hdmirx_dev *hdmirx_dev = _hdmirx_dev;
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u64 mpidr = read_cpuid_mpidr() & MPIDR_HWID_BITMASK;
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hdmirx_dev->phy_cpuid = (mpidr >> 8) & 0xF;
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dev_info(hdmirx_dev->dev, "%s: mpidr: 0x%010lx, phy_cpuid:%#x",
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__func__, (unsigned long)mpidr, hdmirx_dev->phy_cpuid);
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}
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static void hdmirx_get_phy_cpuid(struct rk_hdmirx_dev *hdmirx_dev, int cpu)
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{
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smp_call_function_single(cpu, hdmirx_get_phy_cpuid_func, hdmirx_dev, true);
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}
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static void hdmirx_get_correct_phy_cpuid(struct rk_hdmirx_dev *hdmirx_dev)
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{
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int cpu;
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cpu = LOGIC_CPU_ID_5;
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hdmirx_get_phy_cpuid(hdmirx_dev, cpu);
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if (hdmirx_dev->phy_cpuid < PHY_CPU_ID_4) {
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for (cpu = LOGIC_CPU_ID_1; cpu < LOGIC_CPU_ID_5; cpu++) {
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hdmirx_get_phy_cpuid(hdmirx_dev, cpu);
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if (hdmirx_dev->phy_cpuid >= PHY_CPU_ID_4)
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break;
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}
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}
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hdmirx_dev->bound_cpu = cpu;
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}
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static irqreturn_t hdmirx_5v_det_irq_handler(int irq, void *dev_id)
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{
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struct rk_hdmirx_dev *hdmirx_dev = dev_id;
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@@ -4666,7 +4701,7 @@ static int hdmirx_probe(struct platform_device *pdev)
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struct resource *res;
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struct hdmirx_cec_data cec_data;
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struct cpumask cpumask;
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int ret, irq, cpu_aff, phy_cpuid, i;
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int ret, irq, cpu_aff;
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hdmirx_dev = devm_kzalloc(dev, sizeof(*hdmirx_dev), GFP_KERNEL);
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if (!hdmirx_dev)
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@@ -4693,27 +4728,14 @@ static int hdmirx_probe(struct platform_device *pdev)
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* in order to quickly respond to FIQ and prevent them from affecting
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* each other.
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*/
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for (i = 0; i < 8; i++) {
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cpu_aff = sip_cpu_logical_map_mpidr(i);
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phy_cpuid = (cpu_aff >> 8) & 0xf;
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if (phy_cpuid == BIG_CPU_PHY_ID) {
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hdmirx_dev->bound_cpu = i;
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hdmirx_dev->phy_cpuid = phy_cpuid;
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break;
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}
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}
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hdmirx_get_correct_phy_cpuid(hdmirx_dev);
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if (!hdmirx_dev->phy_cpuid) {
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dev_info(dev, "%s: Failed to get phy_cpuid, use default BIG_CPU_PHY_ID!\n",
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__func__);
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cpu_aff = BIG_CPU_PHY_ID << 8;
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hdmirx_dev->bound_cpu = BIG_CPU_PHY_ID;
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hdmirx_dev->phy_cpuid = BIG_CPU_PHY_ID;
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}
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if (hdmirx_dev->phy_cpuid < PHY_CPU_ID_4)
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dev_warn(dev, "%s: Failed to bind to big cpu!\n", __func__);
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cpu_aff = hdmirx_dev->phy_cpuid << 8;
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sip_fiq_control(RK_SIP_FIQ_CTRL_SET_AFF, RK_IRQ_HDMIRX_HDMI, cpu_aff);
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hdmirx_dev->phy_cpuid = (cpu_aff >> 8) & 0xf;
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hdmirx_dev->wdt_cfg_bound_cpu = hdmirx_dev->bound_cpu + 1;
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hdmirx_dev->wdt_cfg_bound_cpu = LOGIC_CPU_ID_2;
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dev_info(dev, "%s: cpu_aff:%#x, Bound_cpu:%d, wdt_cfg_bound_cpu:%d, phy_cpuid:%d\n",
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__func__, cpu_aff,
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hdmirx_dev->bound_cpu,
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