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audio: auge: The recorded data L/R channel has 7.5 degree phase diff [1/1]

Browse Source 
PD#SWPL-3145

Problem:
The L/R channel has 7.5 degree phase diff

Solution:
Change reg_tdmin_in_rev_ws of EE_AUDIO_TDMIN_X_CTRL 1->0

Verify:
Verify by T962x2_X301 board

Change-Id: I6ca624db10ff96481dd7f413d9f184aeee8c95b3
Signed-off-by: Shuyu Li <shuyu.li@amlogic.com>
This commit is contained in:
Shuyu Li
2018-12-12 16:25:47 +08:00
committed by Dongjin Kim
parent 83aa4314fb
commit b1ade9f925
3 changed files with 17 additions and 1 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
sound/soc/amlogic/auge/tdm.c
View File

@@ -801,8 +801,10 @@ static int aml_dai_set_tdm_fmt(struct snd_soc_dai *cpu_dai, unsigned int fmt)
if (cpu_dai->capture_active
&& p_tdm->chipinfo
&& p_tdm->chipinfo->adc_fn
&& p_tdm->acodec_adc)
&& p_tdm->acodec_adc){
aml_update_tdmin_skew(p_tdm->actrl, p_tdm->id, 4);
aml_update_tdmin_rev_ws(p_tdm->actrl, p_tdm->id, 0);
}
return 0;
}

11
sound/soc/amlogic/auge/tdm_hw.c
View File

@@ -414,6 +414,17 @@ void aml_update_tdmin_skew(struct aml_audio_controller *actrl,
0x7 << 16, skew << 16);
}
void aml_update_tdmin_rev_ws(struct aml_audio_controller *actrl,
int idx, int is_rev)
{
unsigned int reg_in, off_set;
off_set = EE_AUDIO_TDMIN_B_CTRL - EE_AUDIO_TDMIN_A_CTRL;
reg_in = EE_AUDIO_TDMIN_A_CTRL + off_set * idx;
aml_audiobus_update_bits(actrl, reg_in,
0x1 << 25, is_rev << 25);
}
void aml_tdm_set_slot_out(
struct aml_audio_controller *actrl,
int index, int slots, int slot_width,

3
sound/soc/amlogic/auge/tdm_hw.h
View File

@@ -91,6 +91,9 @@ extern void aml_tdm_set_format(
extern void aml_update_tdmin_skew(struct aml_audio_controller *actrl,
int idx, int skew);
extern void aml_update_tdmin_rev_ws(struct aml_audio_controller *actrl,
int idx, int is_rev);
extern void aml_tdm_set_slot_out(
struct aml_audio_controller *actrl,
int index, int slots, int slot_width,