arm64: dts: g12a: add cpufreq 1.92G.

PD#165143: cpufreq: add cpufreq 1.92G.

Change-Id: I8b9dddf8c4c138bf4b5763f707c174ad48e8a53a
Signed-off-by: Hong Guo <hong.guo@amlogic.com>
This commit is contained in:
Hong Guo
2018-05-14 19:35:02 +08:00
committed by Yixun Lan
parent 27336a865c
commit b1afe9a41a
11 changed files with 21 additions and 10 deletions

View File

@@ -350,6 +350,7 @@
};
/* Audio Related end */
/*DCDC for MP8756GD*/
cpu_opp_table0: cpu_opp_table0 {
compatible = "operating-points-v2";
opp-shared;
@@ -395,7 +396,7 @@
opp-microvolt = <861000>;
};
opp10 {
opp-hz = /bits/ 64 <1896000000>;
opp-hz = /bits/ 64 <1920000000>;
opp-microvolt = <981000>;
};
};

View File

@@ -621,6 +621,7 @@
};
/* Audio Related end */
/*DCDC for MP8756GD*/
cpu_opp_table0: cpu_opp_table0 {
compatible = "operating-points-v2";
opp-shared;
@@ -666,7 +667,7 @@
opp-microvolt = <861000>;
};
opp10 {
opp-hz = /bits/ 64 <1896000000>;
opp-hz = /bits/ 64 <1920000000>;
opp-microvolt = <981000>;
};
opp11 {

View File

@@ -570,6 +570,7 @@
};
/* Audio Related end */
/*DCDC for MP8756GD*/
cpu_opp_table0: cpu_opp_table0 {
compatible = "operating-points-v2";
opp-shared;
@@ -615,7 +616,7 @@
opp-microvolt = <861000>;
};
opp10 {
opp-hz = /bits/ 64 <1896000000>;
opp-hz = /bits/ 64 <1920000000>;
opp-microvolt = <981000>;
};
};

View File

@@ -660,6 +660,7 @@
};
/* Audio Related end */
/*DCDC for MP8756GD*/
cpu_opp_table0: cpu_opp_table0 {
compatible = "operating-points-v2";
opp-shared;
@@ -705,7 +706,7 @@
opp-microvolt = <861000>;
};
opp10 {
opp-hz = /bits/ 64 <1896000000>;
opp-hz = /bits/ 64 <1920000000>;
opp-microvolt = <981000>;
};
};

View File

@@ -728,6 +728,7 @@
};
/* Audio Related end */
/*DCDC for MP8756GD*/
cpu_opp_table0: cpu_opp_table0 {
compatible = "operating-points-v2";
opp-shared;
@@ -773,7 +774,7 @@
opp-microvolt = <861000>;
};
opp10 {
opp-hz = /bits/ 64 <1896000000>;
opp-hz = /bits/ 64 <1920000000>;
opp-microvolt = <981000>;
};
};

View File

@@ -729,6 +729,7 @@
};
/* Audio Related end */
/*DCDC for MP8756GD*/
cpu_opp_table0: cpu_opp_table0 {
compatible = "operating-points-v2";
opp-shared;
@@ -774,7 +775,7 @@
opp-microvolt = <861000>;
};
opp10 {
opp-hz = /bits/ 64 <1896000000>;
opp-hz = /bits/ 64 <1920000000>;
opp-microvolt = <981000>;
};
};

View File

@@ -647,6 +647,7 @@
};
/* Audio Related end */
/*DCDC for SY8120B1ABC*/
cpu_opp_table0: cpu_opp_table0 {
compatible = "operating-points-v2";
opp-shared;
@@ -692,7 +693,7 @@
opp-microvolt = <861000>;
};
opp10 {
opp-hz = /bits/ 64 <1896000000>;
opp-hz = /bits/ 64 <1920000000>;
opp-microvolt = <981000>;
};
};

View File

@@ -661,6 +661,7 @@
};
/* Audio Related end */
/*DCDC for SY8120B1ABC*/
cpu_opp_table0: cpu_opp_table0 {
compatible = "operating-points-v2";
opp-shared;
@@ -706,7 +707,7 @@
opp-microvolt = <921000>;
};
opp10 {
opp-hz = /bits/ 64 <1896000000>;
opp-hz = /bits/ 64 <1920000000>;
opp-microvolt = <1011000>;
};
};

View File

@@ -758,6 +758,7 @@
};
/* Audio Related end */
/*DCDC for SY8120B1ABC*/
cpu_opp_table0: cpu_opp_table0 {
compatible = "operating-points-v2";
opp-shared;
@@ -803,7 +804,7 @@
opp-microvolt = <861000>;
};
opp10 {
opp-hz = /bits/ 64 <1896000000>;
opp-hz = /bits/ 64 <1920000000>;
opp-microvolt = <981000>;
};
};

View File

@@ -621,6 +621,7 @@
};
/* Audio Related end */
/*DCDC for MP1605GTF*/
cpu_opp_table0: cpu_opp_table0 {
compatible = "operating-points-v2";
opp-shared;
@@ -666,7 +667,7 @@
opp-microvolt = <861000>;
};
opp10 {
opp-hz = /bits/ 64 <1896000000>;
opp-hz = /bits/ 64 <1920000000>;
opp-microvolt = <981000>;
};
};

View File

@@ -137,6 +137,7 @@ static const struct pll_rate_table g12a_pll_rate_table[] = {
PLL_RATE(1704000000, 142, 1, 1), /*DCO=3408M*/
PLL_RATE(1800000000, 150, 1, 1), /*DCO=3600M*/
PLL_RATE(1896000000, 158, 1, 1), /*DCO=3792M*/
PLL_RATE(1920000000, 160, 1, 1), /*DCO=3840M*/
PLL_RATE(2016000000, 168, 1, 1), /*DCO=4032M*/
PLL_RATE(2100000000, 175, 1, 1), /*DCO=4200M*/
PLL_RATE(2196000000, 183, 1, 1), /*DCO=4392M*/