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rk29: change IO memory map / VMALLOC_END, better support 1G memory
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@@ -24,10 +24,10 @@
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/*
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* SRAM memory whereabouts
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*/
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#define SRAM_CODE_OFFSET 0xff400000
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#define SRAM_CODE_END 0xff401fff
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#define SRAM_DATA_OFFSET 0xff402000
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#define SRAM_DATA_END 0xff403fff
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#define SRAM_CODE_OFFSET 0xFEF00000
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#define SRAM_CODE_END 0xFEF01FFF
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#define SRAM_DATA_OFFSET 0xFEF02000
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#define SRAM_DATA_END 0xFEF03FFF
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#endif
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@@ -18,16 +18,24 @@
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#include <asm/sizes.h>
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/* defines */
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#define SZ_22K 0x5800
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/*IOӳ<4F>䷽ʽ<E4B7BD><CABD><EFBFBD>壬<EFBFBD><E5A3AC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ0x20000000Ϊ<30><CEAA><EFBFBD><EFBFBD>ַ
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*<EFBFBD><EFBFBD><EFBFBD><EFBFBD>0x10000000Ϊ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ӳ<EFBFBD><EFBFBD>Ϊ<EFBFBD><EFBFBD>0xf5000000,
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*0xf4000000
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/*
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* RK29 IO memory map:
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*
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* Virt Phys Size What
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* ---------------------------------------------------------------------------
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* 10000000 1M CPU L1 AXI Interconnect
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* FEA00000 10100000 1200K
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* 10300000 1M Peri AXI Interconnect
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* FEC00000 10500000 16K NANDC
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* 11000000 1M SMC Bank0
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* 12000000 1M SMC Bank1
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* 15000000 1M CPU L2 AXI Interconnect
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* FED00000 20000000 640K APB
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* FEF00000 0 16K SRAM
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*/
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#define RK29_ADDR_BASE1 0xF5000000
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#define RK29_ADDR_BASE0 0xF4000000
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#define RK29_ADDR_BASE0 0xFEA00000
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#define RK29_ADDR_BASE1 0xFED00000
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#define RK29_SDRAM_PHYS 0x60000000U
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#define RK29_AXI1_PHYS 0x10000000
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@@ -94,8 +102,9 @@
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#define RK29_ARBITER1_PHYS 0x10228000
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#define RK29_ARBITER1_SIZE SZ_16K
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#define RK29_PERI_AXI_BUS0_PHYS 0x10300000
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#define RK29_NANDC_PHYS 0x10500000
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#define RK29_NANDC_BASE (RK29_ADDR_BASE0+0x500000)
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#define RK29_NANDC_BASE 0xFEC00000
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#define RK29_NANDC_SIZE SZ_16K
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//CPU AXI 1 APB
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@@ -16,7 +16,7 @@
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#ifndef __ASM_ARCH_RK29_VMALLOC_H
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#define __ASM_ARCH_RK29_VMALLOC_H
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#define VMALLOC_END 0xF0000000
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#define VMALLOC_END 0xFE800000
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#endif
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