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arm64: dts: renesas: beacon kit: Fix Audio Clock sources

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The SoC was expecting two clock sources with different frequencies.
One to support 44.1KHz and one to support 48KHz.  With the newly added
ability to configure the programmable clock, configure both clocks.

Assign the rcar-sound clocks to reference the versaclock instead of
the fixed clock.

Signed-off-by: Adam Ford <aford173@gmail.com>
Link: https://lore.kernel.org/r/20201224170502.2254683-2-aford173@gmail.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
This commit is contained in:
Adam Ford
2020-12-24 11:04:55 -06:00
committed by Geert Uytterhoeven
parent fe82bb4db5
commit b29120d6cf
2 changed files with 22 additions and 24 deletions
Download Patch File Download Diff File Expand all files Collapse all files

25
arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi
View File

@@ -246,12 +246,6 @@
};
};
&audio_clk_a {
clock-frequency = <24576000>;
assigned-clocks = <&versaclock6_bb 4>;
assigned-clock-rates = <24576000>;
};
&audio_clk_b {
clock-frequency = <22579200>;
};
@@ -596,7 +590,7 @@
};
sound_clk_pins: sound_clk {
groups = "audio_clk_a_a";
groups = "audio_clk_a_a", "audio_clk_b_a";
function = "audio_clk";
};
@@ -647,23 +641,6 @@
status = "okay";
clocks = <&cpg CPG_MOD 1005>,
<&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
<&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
<&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
<&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
<&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
<&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
<&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
<&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
<&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
<&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
<&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
<&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
<&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
<&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>,
<&cpg CPG_CORE R8A774A1_CLK_S0D4>;
ports {
#address-cells = <1>;
#size-cells = <0>;

21
arch/arm64/boot/dts/renesas/r8a774a1-beacon-rzg2m-kit.dts
View File

@@ -27,3 +27,24 @@
stdout-path = "serial0:115200n8";
};
};
/* Reference versaclock instead of audio_clk_a */
&rcar_sound {
clocks = <&cpg CPG_MOD 1005>,
<&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
<&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
<&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
<&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
<&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
<&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
<&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
<&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
<&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
<&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
<&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
<&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
<&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
<&versaclock6_bb 4>, <&audio_clk_b>,
<&audio_clk_c>,
<&cpg CPG_CORE R8A774A1_CLK_S0D4>;
};