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ARM64: dts: rockchip: rename mipi to dsi for rk3368

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Change-Id: Ied02b4d521ad3c49ce7b7a591a3d3f8544182e12
Signed-off-by: WeiYong Bi <bivvy.bi@rock-chips.com>
This commit is contained in:
WeiYong Bi
2017-07-13 16:10:11 +08:00
committed by Huang, Tao
parent bae7eaad9f
commit b2b7438b82
4 changed files with 17 additions and 15 deletions
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4
arch/arm64/boot/dts/rockchip/rk3368-android.dtsi
View File

@@ -141,13 +141,13 @@
memory-region = <&drm_logo>;
route {
route_mipi: route-mipi {
route_dsi: route-dsi {
status = "disabled";
logo,uboot = "logo.bmp";
logo,kernel = "logo_kernel.bmp";
logo,mode = "center";
charge_logo,mode = "center";
connect = <&vop_out_mipi>;
connect = <&vop_out_dsi>;
};
route_edp: route-edp {

7
arch/arm64/boot/dts/rockchip/rk3368-p9.dts
View File

@@ -674,7 +674,7 @@
status = "okay";
};
&mipi_dsi_host {
&dsi {
status = "okay";
dsi_panel: panel@0 {
@@ -682,6 +682,7 @@
reg = <0>;
backlight = <&backlight>;
enable-gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>;
dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST)>;
dsi,format = <MIPI_DSI_FMT_RGB888>;
dsi,lanes = <4>;
@@ -689,7 +690,7 @@
delay,prepare = <120>;
delay,enable = <200>;
disp_timings: display-timings {
display-timings {
native-mode = <&timing0>;
timing0: timing0 {
@@ -715,7 +716,7 @@
status = "okay";
};
&route_mipi {
&route_dsi {
status = "okay";
};

11
arch/arm64/boot/dts/rockchip/rk3368-sheep.dts
View File

@@ -585,7 +585,7 @@
status = "okay";
};
&mipi_dsi_host {
&dsi {
status = "okay";
dsi_panel: panel@0 {
@@ -593,13 +593,14 @@
reg = <0>;
backlight = <&backlight>;
enable-gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>;
dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST)>;
dsi,format = <MIPI_DSI_FMT_RGB888>;
dsi,lanes = <4>;
delay,prepare = <120>;
status = "okay";
disp_timings: display-timings {
delay,prepare = <120>;
display-timings {
native-mode = <&timing0>;
timing0: timing0 {
@@ -626,7 +627,7 @@
status = "okay";
};
&route_mipi {
&route_dsi {
status = "okay";
};

10
arch/arm64/boot/dts/rockchip/rk3368.dtsi
View File

@@ -1381,9 +1381,9 @@
#address-cells = <1>;
#size-cells = <0>;
vop_out_mipi: endpoint@0 {
vop_out_dsi: endpoint@0 {
reg = <0>;
remote-endpoint = <&mipi_in_vop>;
remote-endpoint = <&dsi_in_vop>;
};
vop_out_edp: endpoint@1 {
@@ -1421,7 +1421,7 @@
status = "disabled";
};
mipi_dsi_host: mipi-dsi-host@ff960000 {
dsi: dsi@ff960000 {
compatible = "rockchip,rk3368-mipi-dsi";
reg = <0x0 0xff960000 0x0 0x4000>;
interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
@@ -1439,8 +1439,8 @@
ports {
port {
mipi_in_vop: endpoint {
remote-endpoint = <&vop_out_mipi>;
dsi_in_vop: endpoint {
remote-endpoint = <&vop_out_dsi>;
};
};
};