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arm64: dts: imx8mp-phycore-som: Correct pad settings

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Do not set reserved bits 0 and 3 in pad configuration.

Signed-off-by: Teresa Remmet <t.remmet@phytec.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This commit is contained in:
Teresa Remmet
2023-07-19 09:13:09 +02:00
committed by Shawn Guo
parent 2d3779dd1e
commit b34f668154
1 changed files with 13 additions and 13 deletions
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26
arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi
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@@ -206,20 +206,20 @@
&iomuxc {
pinctrl_fec: fecgrp {
fsl,pins = <
MX8MP_IOMUXC_SAI1_RXD2__ENET1_MDC 0x3
MX8MP_IOMUXC_SAI1_RXD3__ENET1_MDIO 0x3
MX8MP_IOMUXC_SAI1_RXD4__ENET1_RGMII_RD0 0x91
MX8MP_IOMUXC_SAI1_RXD5__ENET1_RGMII_RD1 0x91
MX8MP_IOMUXC_SAI1_RXD6__ENET1_RGMII_RD2 0x91
MX8MP_IOMUXC_SAI1_RXD7__ENET1_RGMII_RD3 0x91
MX8MP_IOMUXC_SAI1_TXC__ENET1_RGMII_RXC 0x91
MX8MP_IOMUXC_SAI1_RXD2__ENET1_MDC 0x2
MX8MP_IOMUXC_SAI1_RXD3__ENET1_MDIO 0x2
MX8MP_IOMUXC_SAI1_RXD4__ENET1_RGMII_RD0 0x90
MX8MP_IOMUXC_SAI1_RXD5__ENET1_RGMII_RD1 0x90
MX8MP_IOMUXC_SAI1_RXD6__ENET1_RGMII_RD2 0x90
MX8MP_IOMUXC_SAI1_RXD7__ENET1_RGMII_RD3 0x90
MX8MP_IOMUXC_SAI1_TXC__ENET1_RGMII_RXC 0x90
MX8MP_IOMUXC_SAI1_TXD0__ENET1_RGMII_TD0 0x12
MX8MP_IOMUXC_SAI1_TXD1__ENET1_RGMII_TD1 0x12
MX8MP_IOMUXC_SAI1_TXD2__ENET1_RGMII_TD2 0x14
MX8MP_IOMUXC_SAI1_TXD3__ENET1_RGMII_TD3 0x14
MX8MP_IOMUXC_SAI1_TXD4__ENET1_RGMII_TX_CTL 0x14
MX8MP_IOMUXC_SAI1_TXD5__ENET1_RGMII_TXC 0x14
MX8MP_IOMUXC_SAI1_TXFS__ENET1_RGMII_RX_CTL 0x91
MX8MP_IOMUXC_SAI1_TXFS__ENET1_RGMII_RX_CTL 0x90
>;
};
@@ -236,21 +236,21 @@
pinctrl_i2c1: i2c1grp {
fsl,pins = <
MX8MP_IOMUXC_I2C1_SDA__I2C1_SDA 0x400001c3
MX8MP_IOMUXC_I2C1_SCL__I2C1_SCL 0x400001c3
MX8MP_IOMUXC_I2C1_SDA__I2C1_SDA 0x400001c2
MX8MP_IOMUXC_I2C1_SCL__I2C1_SCL 0x400001c2
>;
};
pinctrl_i2c1_gpio: i2c1gpiogrp {
fsl,pins = <
MX8MP_IOMUXC_I2C1_SCL__GPIO5_IO14 0x1e3
MX8MP_IOMUXC_I2C1_SDA__GPIO5_IO15 0x1e3
MX8MP_IOMUXC_I2C1_SCL__GPIO5_IO14 0x1e2
MX8MP_IOMUXC_I2C1_SDA__GPIO5_IO15 0x1e2
>;
};
pinctrl_pmic: pmicirqgrp {
fsl,pins = <
MX8MP_IOMUXC_SAI1_TXD6__GPIO4_IO18 0x141
MX8MP_IOMUXC_SAI1_TXD6__GPIO4_IO18 0x140
>;
};