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x86/KVM/VMX: Add L1D flush logic
commit c595ceee45 upstream
Add the logic for flushing L1D on VMENTER. The flush depends on the static
key being enabled and the new l1tf_flush_l1d flag being set.
The flags is set:
- Always, if the flush module parameter is 'always'
- Conditionally at:
- Entry to vcpu_run(), i.e. after executing user space
- From the sched_in notifier, i.e. when switching to a vCPU thread.
- From vmexit handlers which are considered unsafe, i.e. where
sensitive data can be brought into L1D:
- The emulator, which could be a good target for other speculative
execution-based threats,
- The MMU, which can bring host page tables in the L1 cache.
- External interrupts
- Nested operations that require the MMU (see above). That is
vmptrld, vmptrst, vmclear,vmwrite,vmread.
- When handling invept,invvpid
[ tglx: Split out from combo patch and reduced to a single flag ]
[ dwmw2: Backported to 4.9, set l1tf_flush_l1d in svm/vmx code ]
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
committed by
Greg Kroah-Hartman
parent
acca8a70a5
commit
b3dc63c4f4
@@ -659,6 +659,9 @@ struct kvm_vcpu_arch {
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int pending_ioapic_eoi;
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int pending_external_vector;
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/* Flush the L1 Data cache for L1TF mitigation on VMENTER */
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bool l1tf_flush_l1d;
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};
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struct kvm_lpage_info {
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@@ -819,6 +822,7 @@ struct kvm_vcpu_stat {
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u64 signal_exits;
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u64 irq_window_exits;
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u64 nmi_window_exits;
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u64 l1d_flush;
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u64 halt_exits;
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u64 halt_successful_poll;
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u64 halt_attempted_poll;
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@@ -2124,6 +2124,8 @@ static int pf_interception(struct vcpu_svm *svm)
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u32 error_code;
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int r = 1;
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svm->vcpu.arch.l1tf_flush_l1d = true;
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switch (svm->apf_reason) {
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default:
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error_code = svm->vmcb->control.exit_info_1;
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@@ -5773,6 +5773,7 @@ static int handle_exception(struct kvm_vcpu *vcpu)
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BUG_ON(enable_ept);
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cr2 = vmcs_readl(EXIT_QUALIFICATION);
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trace_kvm_page_fault(cr2, error_code);
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vcpu->arch.l1tf_flush_l1d = true;
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if (kvm_event_needs_reinjection(vcpu))
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kvm_mmu_unprotect_page_virt(vcpu, cr2);
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@@ -8549,9 +8550,20 @@ static int vmx_handle_exit(struct kvm_vcpu *vcpu)
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#define L1D_CACHE_ORDER 4
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static void *vmx_l1d_flush_pages;
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static void __maybe_unused vmx_l1d_flush(void)
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static void vmx_l1d_flush(struct kvm_vcpu *vcpu)
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{
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int size = PAGE_SIZE << L1D_CACHE_ORDER;
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bool always;
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/*
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* If the mitigation mode is 'flush always', keep the flush bit
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* set, otherwise clear it. It gets set again either from
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* vcpu_run() or from one of the unsafe VMEXIT handlers.
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*/
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always = vmentry_l1d_flush == VMENTER_L1D_FLUSH_ALWAYS;
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vcpu->arch.l1tf_flush_l1d = always;
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vcpu->stat.l1d_flush++;
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if (static_cpu_has(X86_FEATURE_FLUSH_L1D)) {
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wrmsrl(MSR_IA32_FLUSH_CMD, L1D_FLUSH);
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@@ -8792,6 +8804,7 @@ static void vmx_handle_external_intr(struct kvm_vcpu *vcpu)
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[ss]"i"(__KERNEL_DS),
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[cs]"i"(__KERNEL_CS)
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);
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vcpu->arch.l1tf_flush_l1d = true;
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}
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}
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STACK_FRAME_NON_STANDARD(vmx_handle_external_intr);
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@@ -9037,6 +9050,11 @@ static void __noclone vmx_vcpu_run(struct kvm_vcpu *vcpu)
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vmx->__launched = vmx->loaded_vmcs->launched;
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if (static_branch_unlikely(&vmx_l1d_should_flush)) {
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if (vcpu->arch.l1tf_flush_l1d)
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vmx_l1d_flush(vcpu);
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}
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asm(
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/* Store host registers */
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"push %%" _ASM_DX "; push %%" _ASM_BP ";"
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@@ -10552,6 +10570,9 @@ static int nested_vmx_run(struct kvm_vcpu *vcpu, bool launch)
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vmcs12->launch_state = 1;
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/* Hide L1D cache contents from the nested guest. */
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vmx->vcpu.arch.l1tf_flush_l1d = true;
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if (vmcs12->guest_activity_state == GUEST_ACTIVITY_HLT)
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return kvm_vcpu_halt(vcpu);
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@@ -180,6 +180,7 @@ struct kvm_stats_debugfs_item debugfs_entries[] = {
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{ "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
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{ "irq_injections", VCPU_STAT(irq_injections) },
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{ "nmi_injections", VCPU_STAT(nmi_injections) },
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{ "l1d_flush", VCPU_STAT(l1d_flush) },
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{ "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
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{ "mmu_pte_write", VM_STAT(mmu_pte_write) },
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{ "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
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@@ -4476,6 +4477,9 @@ static int emulator_write_std(struct x86_emulate_ctxt *ctxt, gva_t addr, void *v
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int kvm_write_guest_virt_system(struct kvm_vcpu *vcpu, gva_t addr, void *val,
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unsigned int bytes, struct x86_exception *exception)
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{
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/* kvm_write_guest_virt_system can pull in tons of pages. */
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vcpu->arch.l1tf_flush_l1d = true;
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return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
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PFERR_WRITE_MASK, exception);
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}
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@@ -5574,6 +5578,8 @@ int x86_emulate_instruction(struct kvm_vcpu *vcpu,
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bool writeback = true;
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bool write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
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vcpu->arch.l1tf_flush_l1d = true;
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/*
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* Clear write_fault_to_shadow_pgtable here to ensure it is
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* never reused.
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@@ -6929,6 +6935,7 @@ static int vcpu_run(struct kvm_vcpu *vcpu)
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struct kvm *kvm = vcpu->kvm;
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vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
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vcpu->arch.l1tf_flush_l1d = true;
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for (;;) {
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if (kvm_vcpu_running(vcpu)) {
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@@ -7899,6 +7906,7 @@ void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
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void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu)
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{
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vcpu->arch.l1tf_flush_l1d = true;
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kvm_x86_ops->sched_in(vcpu, cpu);
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}
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