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https://github.com/hardkernel/linux.git
synced 2026-06-09 04:10:18 +09:00
rk312x: vcodec driver revision for rk312x
This commit is contained in:
@@ -658,15 +658,15 @@
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status = "disabled";
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};
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vpu: vpu_service@10104000 {
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vpu: vpu_service@10106000 {
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compatible = "vpu_service";
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reg = <0x10104000 0x800>;
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reg = <0x10106000 0x800>;
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interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "irq_enc", "irq_dec";
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clocks = <&clk_vdpu>, <&hclk_vdpu>;
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clock-names = "aclk_vcodec", "hclk_vcodec";
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name = "vpu_service";
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status = "disabled";
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status = "okay";
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};
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hevc: hevc_service@10104000 {
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@@ -677,10 +677,10 @@
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clocks = <&clk_vdpu>, <&hclk_vdpu>, <&clk_hevc_core>;
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clock-names = "aclk_vcodec", "hclk_vcodec", "clk_core";
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name = "hevc_service";
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status = "disabled";
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};
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status = "okay";
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};
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iep: iep@10108000 {
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iep: iep@10108000 {
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compatible = "rockchip,iep";
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reg = <0x10108000 0x800>;
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interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
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@@ -166,7 +166,7 @@ static VPU_HW_INFO_E vpu_hw_set[] = {
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.dec_reg_num = REG_NUM_9190_DEC_PP,
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.dec_io_size = REG_NUM_9190_DEC_PP * 4,
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},
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};
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@@ -358,7 +358,7 @@ typedef struct vpu_service_info {
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struct dentry *debugfs_file_regs;
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u32 irq_status;
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#if defined(CONFIG_VCODEC_MMU)
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#if defined(CONFIG_VCODEC_MMU)
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struct ion_client *ion_client;
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struct list_head mem_region_list;
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struct device *mmu_dev;
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@@ -401,35 +401,41 @@ static const struct file_operations debug_vcodec_fops = {
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#define VPU_TIMEOUT_DELAY 2*HZ /* 2s */
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#define VPU_SIMULATE_DELAY msecs_to_jiffies(15)
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#define BIT_VCODEC_SEL_RK3036 (1<<3)
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#define BIT_VCODEC_SEL_RK312X (1<<15)
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static void vcodec_enter_mode_nolock(enum vcodec_device_id id, u32 *reserved_mode)
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{
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if (soc_is_rk3036()) {
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if (soc_is_rk3036() || soc_is_rk3126() || soc_is_rk3128()) {
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int bits = soc_is_rk3036() ? BIT_VCODEC_SEL_RK3036 : BIT_VCODEC_SEL_RK312X;
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void __iomem *addr = soc_is_rk3036() ? (RK_GRF_VIRT + RK3036_GRF_SOC_CON1) : (RK_GRF_VIRT + RK312X_GRF_SOC_CON1);
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if (reserved_mode)
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*reserved_mode = readl_relaxed(RK_GRF_VIRT + RK3036_GRF_SOC_CON1);
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#define BIT_VCODEC_SEL (1<<3)
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if (id == VCODEC_DEVICE_ID_HEVC) {
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writel_relaxed(readl_relaxed(RK_GRF_VIRT + RK3036_GRF_SOC_CON1) | (BIT_VCODEC_SEL) | (BIT_VCODEC_SEL << 16), RK_GRF_VIRT + RK3036_GRF_SOC_CON1);
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} else {
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writel_relaxed((readl_relaxed(RK_GRF_VIRT + RK3036_GRF_SOC_CON1) & (~BIT_VCODEC_SEL)) | (BIT_VCODEC_SEL << 16), RK_GRF_VIRT + RK3036_GRF_SOC_CON1);
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}
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*reserved_mode = readl_relaxed(addr);
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if (id == VCODEC_DEVICE_ID_HEVC)
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writel_relaxed(readl_relaxed(addr) | (bits) | (bits << 16), addr);
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else
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writel_relaxed((readl_relaxed(addr) & (~bits)) | (bits << 16), addr);
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}
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}
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static void vcodec_exit_mode_nolock(enum vcodec_device_id id, u32 reserved_mode)
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{
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writel_relaxed(reserved_mode | (BIT_VCODEC_SEL << 16), RK_GRF_VIRT + RK3036_GRF_SOC_CON1);
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if (soc_is_rk3036() || soc_is_rk3126() || soc_is_rk3128()) {
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int bits = soc_is_rk3036() ? BIT_VCODEC_SEL_RK3036 : BIT_VCODEC_SEL_RK312X;
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void __iomem *addr = soc_is_rk3036() ? (RK_GRF_VIRT + RK3036_GRF_SOC_CON1) : (RK_GRF_VIRT + RK312X_GRF_SOC_CON1);
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writel_relaxed(reserved_mode | (bits << 16), addr);
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}
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}
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static void vcodec_enter_mode(enum vcodec_device_id id)
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{
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if (soc_is_rk3036())
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if (soc_is_rk3036() || soc_is_rk3126() || soc_is_rk3128())
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mutex_lock(&g_mode_mutex);
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vcodec_enter_mode_nolock(id, NULL);
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}
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static void vcodec_exit_mode(void)
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{
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if (soc_is_rk3036())
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if (soc_is_rk3036() || soc_is_rk3126() || soc_is_rk3128())
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mutex_unlock(&g_mode_mutex);
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}
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@@ -456,7 +462,7 @@ static int vpu_get_clk(struct vpu_service_info *pservice)
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break;
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}
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if (!soc_is_rk3036()) {
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if (!soc_is_rk3036() && !soc_is_rk3126() && !soc_is_rk3128()) {
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pservice->clk_cabac = devm_clk_get(pservice->dev, "clk_cabac");
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if (IS_ERR(pservice->clk_cabac)) {
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dev_err(pservice->dev, "failed on clk_get clk_cabac\n");
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@@ -466,7 +472,7 @@ static int vpu_get_clk(struct vpu_service_info *pservice)
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pservice->clk_cabac = NULL;
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}
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if (!soc_is_rk3036()) {
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if (!soc_is_rk3036() && !soc_is_rk3126() && !soc_is_rk3128()) {
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pservice->pd_video = devm_clk_get(pservice->dev, "pd_hevc");
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if (IS_ERR(pservice->pd_video)) {
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dev_err(pservice->dev, "failed on clk_get pd_hevc\n");
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@@ -476,7 +482,7 @@ static int vpu_get_clk(struct vpu_service_info *pservice)
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pservice->pd_video = NULL;
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}
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} else {
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if (!soc_is_rk3036()) {
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if (!soc_is_rk3036() && !soc_is_rk3126() && !soc_is_rk3128()) {
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pservice->pd_video = devm_clk_get(pservice->dev, "pd_video");
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if (IS_ERR(pservice->pd_video)) {
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dev_err(pservice->dev, "failed on clk_get pd_video\n");
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@@ -487,6 +493,14 @@ static int vpu_get_clk(struct vpu_service_info *pservice)
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}
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}
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if (soc_is_rk3126() || soc_is_rk3128()) {
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pservice->pd_video = devm_clk_get(pservice->dev, "pd_video");
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if (IS_ERR(pservice->pd_video)) {
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dev_err(pservice->dev, "failed on clk_get pd_video\n");
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break;
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}
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}
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return 0;
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} while (0);
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@@ -880,7 +894,7 @@ static vpu_reg *reg_init(struct vpu_service_info *pservice, vpu_session *session
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INIT_LIST_HEAD(®->session_link);
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INIT_LIST_HEAD(®->status_link);
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#if defined(CONFIG_VCODEC_MMU)
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#if defined(CONFIG_VCODEC_MMU)
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if (pservice->mmu_dev)
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INIT_LIST_HEAD(®->mem_region_list);
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#endif
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@@ -1384,7 +1398,7 @@ static long vpu_service_ioctl(struct file *filp, unsigned int cmd, unsigned long
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int iommu_enable = 0;
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#if defined(CONFIG_VCODEC_MMU)
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iommu_enable = pservice->mmu_dev ? 1 : 0;
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iommu_enable = pservice->mmu_dev ? 1 : 0;
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#endif
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if (copy_to_user((void __user *)arg, &iommu_enable, sizeof(int))) {
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@@ -1695,7 +1709,7 @@ static int vcodec_probe(struct platform_device *pdev)
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if (pservice->debugfs_dir == NULL)
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pr_err("create debugfs dir %s failed\n", dev_name(dev));
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pservice->debugfs_file_regs =
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pservice->debugfs_file_regs =
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debugfs_create_file("regs", 0664,
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pservice->debugfs_dir, pservice,
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&debug_vcodec_fops);
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@@ -1816,7 +1830,7 @@ static void get_hw_info(struct vpu_service_info *pservice)
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if (pservice->dev_id == VCODEC_DEVICE_ID_VPU) {
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u32 configReg = pservice->dec_dev.hwregs[VPU_DEC_HWCFG0];
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u32 asicID = pservice->dec_dev.hwregs[0];
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dec->h264Support = (configReg >> DWL_H264_E) & 0x3U;
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dec->jpegSupport = (configReg >> DWL_JPEG_E) & 0x01U;
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if (dec->jpegSupport && ((configReg >> DWL_PJPEG_E) & 0x01U))
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@@ -1830,11 +1844,11 @@ static void get_hw_info(struct vpu_service_info *pservice)
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if (soc_is_rk3190() || soc_is_rk3288())
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dec->maxDecPicWidth = 4096;
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else if (soc_is_rk3036())
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else if (soc_is_rk3036() || soc_is_rk3126() || soc_is_rk3128())
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dec->maxDecPicWidth = 1920;
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else
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dec->maxDecPicWidth = configReg & 0x07FFU;
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/* 2nd Config register */
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configReg = pservice->dec_dev.hwregs[VPU_DEC_HWCFG1];
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if (dec->refBufSupport) {
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@@ -1862,9 +1876,9 @@ static void get_hw_info(struct vpu_service_info *pservice)
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if (dec->refBufSupport && (asicID >> 16) == 0x6731U )
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dec->refBufSupport |= 8; /* enable HW support for offset */
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/// invalidate fuse register value in rk319x vpu and following.
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if (!soc_is_rk3190() && !soc_is_rk3288() && !soc_is_rk3036()) {
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if (!soc_is_rk3190() && !soc_is_rk3288() && !soc_is_rk3036() && !soc_is_rk3126() && !soc_is_rk3128()) {
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VPUHwFuseStatus_t hwFuseSts;
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/* Decoder fuse configuration */
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u32 fuseReg = pservice->dec_dev.hwregs[VPU_DEC_HW_FUSE_CFG];
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@@ -2004,7 +2018,7 @@ static void get_hw_info(struct vpu_service_info *pservice)
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pservice->bug_dec_addr = cpu_is_rk30xx();
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} else {
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if (soc_is_rk3036())
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if (soc_is_rk3036() || soc_is_rk3126() || soc_is_rk3128())
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dec->maxDecPicWidth = 1920;
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else
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dec->maxDecPicWidth = 4096;
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@@ -2308,7 +2322,7 @@ u8* get_align_ptr_no_copy(int len, u32 *phy)
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static int hevc_test_case0(vpu_service_info *pservice)
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{
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vpu_session session;
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vpu_reg *reg;
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vpu_reg *reg;
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unsigned long size = 272;//sizeof(register_00); // registers array length
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int testidx = 0;
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int ret = 0;
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@@ -2324,7 +2338,7 @@ static int hevc_test_case0(vpu_service_info *pservice)
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int rps_size[2];
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int scl_size[2];
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int cabac_size[2];
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u32 phy_pps;
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u32 phy_rps;
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u32 phy_scl;
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@@ -2371,7 +2385,7 @@ static int hevc_test_case0(vpu_service_info *pservice)
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scl_size[0] = sizeof(scaling_list_00);
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scl_size[1] = sizeof(scaling_list_01);
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cabac_size[0] = sizeof(Cabac_table);
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cabac_size[1] = sizeof(Cabac_table);
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