shinys000114/linux
1
0
Fork 0
mirror of https://github.com/hardkernel/linux.git synced 2026-06-07 19:30:30 +09:00
Code Issues Packages Projects Releases Wiki Activity

video: rockchip: hdmi: fix HDMI CTS HF1-33

Browse Source 
Accroding to CEA 861-F: When the Length field is set to L==1,
the Y420CMDB does not include a YCbCr 4:2:0 Capability Bit Map
and all the SVDs in the regular Video Data Block(s) support
YCbCr 4:2:0 sampling mode.

Change-Id: I6d0be6465d361c74ff72c79ef6f120910e2a74ff
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
This commit is contained in:
Zheng Yang
2016-04-18 15:09:34 +08:00
committed by Huang, Tao
parent 3883030a24
commit b4c2f5e3e2
1 changed files with 16 additions and 7 deletions
Download Patch File Download Diff File Expand all files Collapse all files

23
drivers/video/rockchip/hdmi/rockchip-hdmi-edid.c
View File

@@ -341,14 +341,23 @@ static void hdmi_edid_parse_yuv420cmdb(unsigned char *buf, int count,
struct display_modelist *modelist;
int i, j, yuv420_mask = 0, vic;
for (i = 0; i < count - 1; i++) {
EDBG("vic which support yuv420 mode is %x\n", buf[i]);
yuv420_mask |= buf[i] << (8 * i);
}
for (i = 0; i < 32; i++) {
if (yuv420_mask & (1 << i)) {
if (count == 1) {
list_for_each(pos, head) {
modelist =
list_entry(pos, struct display_modelist, list);
vic = modelist->vic | HDMI_VIDEO_YUV420;
hdmi_add_vic(vic, head);
}
} else {
for (i = 0; i < count - 1; i++) {
EDBG("vic which support yuv420 mode is %x\n", buf[i]);
yuv420_mask |= buf[i] << (8 * i);
}
for (i = 0; i < 32; i++) {
if (!(yuv420_mask & (1 << i)))
continue;
j = 0;
for (pos = head->next; pos != (head); pos = pos->next) {
list_for_each(pos, head) {
if (j++ == i) {
modelist =
list_entry(pos, struct display_modelist, list);