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rockchip: clk: rk3399: add clk_testout2 ID

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Change-Id: If5d94896e8e5ce565738064ab8273dbf7242881e
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
This commit is contained in:
Elaine Zhang
2016-10-26 18:04:43 +08:00
committed by Huang, Tao
parent 15eb71dce0
commit b4c719c129
2 changed files with 2 additions and 1 deletions
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2
drivers/clk/rockchip/clk-rk3399.c
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@@ -1096,7 +1096,7 @@ static struct rockchip_clk_branch rk3399_clk_branches[] __initdata = {
MUX(0, "clk_testout2_pll_src", mux_pll_src_cpll_gpll_npll_p, 0,
RK3399_CLKSEL_CON(38), 14, 2, MFLAGS),
COMPOSITE(0, "clk_testout2", mux_clk_testout2_p, 0,
COMPOSITE(SCLK_TESTOUT2, "clk_testout2", mux_clk_testout2_p, 0,
RK3399_CLKSEL_CON(38), 13, 1, MFLAGS, 8, 5, DFLAGS,
RK3399_CLKGATE_CON(13), 15, GFLAGS),

1
include/dt-bindings/clock/rk3399-cru.h
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@@ -134,6 +134,7 @@
#define SCLK_USBPHY0_480M_SRC 168
#define SCLK_USBPHY1_480M_SRC 169
#define SCLK_DDRCLK 170
#define SCLK_TESTOUT2 171
#define DCLK_VOP0 180
#define DCLK_VOP1 181