shinys000114/linux
1
0
Fork 0
mirror of https://github.com/hardkernel/linux.git synced 2026-06-08 20:07:46 +09:00
Code Issues Packages Projects Releases Wiki Activity

clk : rockchip: rk1808: add CLK_OPS_PARENT_ENABLE flag for clk npu

Browse Source 
Change-Id: I82a1cf3077c275644b9f293f53774e6bcace8e0f
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
This commit is contained in:
Elaine Zhang
2019-03-29 18:00:53 +08:00
committed by Tao Huang
parent f6692b2cea
commit b5b0d5415d
1 changed files with 2 additions and 2 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
drivers/clk/rockchip/clk-rk1808.c
View File

@@ -337,9 +337,9 @@ static struct rockchip_clk_branch rk1808_clk_branches[] __initdata = {
/*
* Clock-Architecture Diagram 4
*/
COMPOSITE_NOGATE(0, "clk_npu_div", mux_gpll_cpll_p, CLK_KEEP_REQ_RATE,
COMPOSITE_NOGATE(0, "clk_npu_div", mux_gpll_cpll_p, CLK_KEEP_REQ_RATE | CLK_OPS_PARENT_ENABLE,
RK1808_CLKSEL_CON(1), 8, 2, MFLAGS, 0, 4, DFLAGS),
COMPOSITE_NOGATE_HALFDIV(0, "clk_npu_np5", mux_gpll_cpll_p, CLK_KEEP_REQ_RATE,
COMPOSITE_NOGATE_HALFDIV(0, "clk_npu_np5", mux_gpll_cpll_p, CLK_KEEP_REQ_RATE | CLK_OPS_PARENT_ENABLE,
RK1808_CLKSEL_CON(1), 10, 2, MFLAGS, 4, 4, DFLAGS),
MUX(0, "clk_npu_pre", mux_npu_p, CLK_SET_RATE_PARENT,
RK1808_CLKSEL_CON(1), 15, 1, MFLAGS),