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power: add the usb & pcie power domain control [1/1]

Browse Source 
PD#SWPL-17633

Problem:
add usb & pcie power domain control for TM2 and SM1.

Solution:
add usb & pcie power domain control for TM2 and SM1.

Verify:
T962E2

Change-Id: Ic433074c7d64365a644c78d3cb4804f0df379860
Signed-off-by: Yue Wang <yue.wang@amlogic.com>
This commit is contained in:
Yue Wang
2019-12-09 17:31:04 +08:00
committed by Chris
parent f5a8c3f2a4
commit b5c9b6efc3
8 changed files with 43 additions and 414 deletions
Download Patch File Download Diff File Expand all files Collapse all files

12
arch/arm/boot/dts/amlogic/mesonsm1.dtsi
View File

@@ -402,10 +402,6 @@
pll-setting-8 = <0xe000c>;
version = <2>;
pwr-ctl = <1>;
u2-ctrl-sleep-shift = <17>;
u2-hhi-mem-pd-shift = <30>;
u2-hhi-mem-pd-mask = <0x3>;
u2-ctrl-iso-shift = <17>;
};
usb3_phy_v2: usb3phy@ffe09080 {
@@ -421,10 +417,6 @@
clocks = <&clkc CLKID_PCIE_PLL>;
clock-names = "pcie_refpll";
pwr-ctl = <1>;
u3-ctrl-sleep-shift = <18>;
u3-hhi-mem-pd-shift = <26>;
u3-hhi-mem-pd-mask = <0xf>;
u3-ctrl-iso-shift = <18>;
};
dwc2_a: dwc2_a@ff400000 {
@@ -1140,10 +1132,6 @@
pcie-phy-rst-bit = <14>;
pcie-ctrl-a-rst-bit = <12>;
pwr-ctl = <1>;
pcie-ctrl-sleep-shift = <18>;
pcie-hhi-mem-pd-shift = <26>;
pcie-hhi-mem-pd-mask = <0xf>;
pcie-ctrl-iso-shift = <18>;
status = "disabled";
};

24
arch/arm/boot/dts/amlogic/mesontm2.dtsi
View File

@@ -446,10 +446,6 @@
pll-setting-8 = <0xe000c>;
version = <2>;
pwr-ctl = <1>;
u2-ctrl-sleep-shift = <17>;
u2-hhi-mem-pd-shift = <30>;
u2-hhi-mem-pd-mask = <0x3>;
u2-ctrl-iso-shift = <17>;
};
usb3_phy_v2: usb3phy@ffe09080 {
@@ -469,16 +465,6 @@
"pcie_refpll",
"pcie1_gate";
pwr-ctl = <1>;
u30-ctrl-sleep-shift = <18>;
u30-hhi-mem-pd-shift = <26>;
u30-hhi-mem-pd-mask = <0xf>;
u30-ctrl-iso-shift = <18>;
usb30-ctrl-a-rst-bit = <12>;
u31-ctrl-sleep-shift = <20>;
u31-hhi-mem-pd-shift = <4>;
u31-hhi-mem-pd-mask = <0xf>;
u31-ctrl-iso-shift = <20>;
usb31-ctrl-a-rst-bit = <28>;
};
usb_otg: usbotg@ffe09080 {
@@ -1337,10 +1323,6 @@
pcie-phy-rst-bit = <14>;
pcie-ctrl-a-rst-bit = <12>;
pwr-ctl = <1>;
pcie-ctrl-sleep-shift = <18>;
pcie-hhi-mem-pd-shift = <26>;
pcie-hhi-mem-pd-mask = <0xf>;
pcie-ctrl-iso-shift = <18>;
status = "disabled";
};
@@ -1366,7 +1348,7 @@
0x82000000 0xfA700000 0x0 0xfA700000 0 0x1900000>;
/* non-prefetchable memory */
num-lanes = <1>;
pcie-num = <1>;
pcie-num = <2>;
clocks = <&clkc CLKID_PCIE1_GATE
&clkc CLKID_PCIE1
@@ -1380,10 +1362,6 @@
pcie-phy-rst-bit = <29>;
pcie-ctrl-a-rst-bit = <28>;
pwr-ctl = <1>;
pcie-ctrl-sleep-shift = <20>;
pcie-hhi-mem-pd-shift = <4>;
pcie-hhi-mem-pd-mask = <0xf>;
pcie-ctrl-iso-shift = <20>;
status = "disabled";
};
galcore {

12
arch/arm64/boot/dts/amlogic/mesonsm1.dtsi
View File

@@ -402,10 +402,6 @@
pll-setting-8 = <0xe000c>;
version = <2>;
pwr-ctl = <1>;
u2-ctrl-sleep-shift = <17>;
u2-hhi-mem-pd-shift = <30>;
u2-hhi-mem-pd-mask = <0x3>;
u2-ctrl-iso-shift = <17>;
};
usb3_phy_v2: usb3phy@ffe09080 {
@@ -421,10 +417,6 @@
clocks = <&clkc CLKID_PCIE_PLL>;
clock-names = "pcie_refpll";
pwr-ctl = <1>;
u3-ctrl-sleep-shift = <18>;
u3-hhi-mem-pd-shift = <26>;
u3-hhi-mem-pd-mask = <0xf>;
u3-ctrl-iso-shift = <18>;
};
dwc2_a: dwc2_a@ff400000 {
@@ -1139,10 +1131,6 @@
pcie-phy-rst-bit = <14>;
pcie-ctrl-a-rst-bit = <12>;
pwr-ctl = <1>;
pcie-ctrl-sleep-shift = <18>;
pcie-hhi-mem-pd-shift = <26>;
pcie-hhi-mem-pd-mask = <0xf>;
pcie-ctrl-iso-shift = <18>;
status = "disabled";
};

24
arch/arm64/boot/dts/amlogic/mesontm2.dtsi
View File

@@ -445,10 +445,6 @@
pll-setting-8 = <0xe000c>;
version = <2>;
pwr-ctl = <1>;
u2-ctrl-sleep-shift = <17>;
u2-hhi-mem-pd-shift = <30>;
u2-hhi-mem-pd-mask = <0x3>;
u2-ctrl-iso-shift = <17>;
};
usb3_phy_v2: usb3phy@ffe09080 {
@@ -468,16 +464,6 @@
"pcie_refpll",
"pcie1_gate";
pwr-ctl = <1>;
u30-ctrl-sleep-shift = <18>;
u30-hhi-mem-pd-shift = <26>;
u30-hhi-mem-pd-mask = <0xf>;
u30-ctrl-iso-shift = <18>;
usb30-ctrl-a-rst-bit = <12>;
u31-ctrl-sleep-shift = <20>;
u31-hhi-mem-pd-shift = <4>;
u31-hhi-mem-pd-mask = <0xf>;
u31-ctrl-iso-shift = <20>;
usb31-ctrl-a-rst-bit = <28>;
};
usb_otg: usbotg@ffe09080 {
@@ -1336,10 +1322,6 @@
pcie-phy-rst-bit = <14>;
pcie-ctrl-a-rst-bit = <12>;
pwr-ctl = <1>;
pcie-ctrl-sleep-shift = <18>;
pcie-hhi-mem-pd-shift = <26>;
pcie-hhi-mem-pd-mask = <0xf>;
pcie-ctrl-iso-shift = <18>;
status = "disabled";
};
@@ -1365,7 +1347,7 @@
0x82000000 0 0xfA700000 0x0 0xfA700000 0 0x1900000>;
/* non-prefetchable memory */
num-lanes = <1>;
pcie-num = <1>;
pcie-num = <2>;
clocks = <&clkc CLKID_PCIE1_GATE
&clkc CLKID_PCIE1
@@ -1379,10 +1361,6 @@
pcie-phy-rst-bit = <29>;
pcie-ctrl-a-rst-bit = <28>;
pwr-ctl = <1>;
pcie-ctrl-sleep-shift = <20>;
pcie-hhi-mem-pd-shift = <4>;
pcie-hhi-mem-pd-mask = <0xf>;
pcie-ctrl-iso-shift = <20>;
status = "disabled";
};
galcore {

66
drivers/amlogic/pci/pcie-amlogic-v2.c
View File

@@ -28,7 +28,8 @@
#include <linux/signal.h>
#include <linux/types.h>
#include <linux/module.h>
#include <linux/amlogic/power_ctrl.h>
#include <linux/amlogic/power_domain.h>
#include <dt-bindings/power/amlogic,pd.h>
#include "../drivers/pci/host/pcie-designware.h"
#include "pcie-amlogic.h"
@@ -697,30 +698,14 @@ static int __init amlogic_add_pcie_port(struct amlogic_pcie *amlogic_pcie,
return 0;
}
static void power_switch_to_pcie(struct pcie_phy *phy)
static void power_switch_to_pcie(struct amlogic_pcie *amlogic_pcie)
{
u32 val;
power_ctrl_sleep(1, phy->pcie_ctrl_sleep_shift);
power_ctrl_mempd0(1, phy->pcie_hhi_mem_pd_mask,
phy->pcie_hhi_mem_pd_shift);
udelay(100);
val = readl((void __iomem *)(unsigned long)phy->reset_base);
writel((val & (~(0x1<<phy->pcie_ctrl_a_rst_bit))),
(void __iomem *)(unsigned long)phy->reset_base);
udelay(100);
power_ctrl_iso(1, phy->pcie_ctrl_iso_shift);
val = readl((void __iomem *)(unsigned long)phy->reset_base);
writel((val | (0x1<<phy->pcie_ctrl_a_rst_bit)),
(void __iomem *)(unsigned long)phy->reset_base);
udelay(100);
if (amlogic_pcie->pcie_num == 1)
power_domain_switch(PM_PCIE0, PWR_ON);
else if (amlogic_pcie->pcie_num == 2)
power_domain_switch(PM_PCIE1, PWR_ON);
}
static int __init amlogic_pcie_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
@@ -746,7 +731,6 @@ static int __init amlogic_pcie_probe(struct platform_device *pdev)
int pcie_phy_rst_bit = 0;
int pcie_ctrl_a_rst_bit = 0;
u32 pwr_ctl = 0;
const void *prop;
dev_info(&pdev->dev, "amlogic_pcie_probe!\n");
@@ -806,40 +790,6 @@ static int __init amlogic_pcie_probe(struct platform_device *pdev)
else
amlogic_pcie->pwr_ctl = pwr_ctl;
if (pwr_ctl) {
prop = of_get_property(dev->of_node,
"pcie-ctrl-sleep-shift", NULL);
if (prop)
amlogic_pcie->phy->pcie_ctrl_sleep_shift =
of_read_ulong(prop, 1);
else
pwr_ctl = 0;
prop = of_get_property(dev->of_node,
"pcie-hhi-mem-pd-shift", NULL);
if (prop)
amlogic_pcie->phy->pcie_hhi_mem_pd_shift =
of_read_ulong(prop, 1);
else
pwr_ctl = 0;
prop = of_get_property(dev->of_node,
"pcie-hhi-mem-pd-mask", NULL);
if (prop)
amlogic_pcie->phy->pcie_hhi_mem_pd_mask =
of_read_ulong(prop, 1);
else
pwr_ctl = 0;
prop = of_get_property(dev->of_node,
"pcie-ctrl-iso-shift", NULL);
if (prop)
amlogic_pcie->phy->pcie_ctrl_iso_shift =
of_read_ulong(prop, 1);
else
pwr_ctl = 0;
}
if (!amlogic_pcie->phy->reset_base) {
reset_base = platform_get_resource_byname(
pdev, IORESOURCE_MEM, "reset");
@@ -852,7 +802,7 @@ static int __init amlogic_pcie_probe(struct platform_device *pdev)
}
if (pwr_ctl)
power_switch_to_pcie(amlogic_pcie->phy);
power_switch_to_pcie(amlogic_pcie);
if (!amlogic_pcie->phy->phy_base) {
phy_base = platform_get_resource_byname(

72
drivers/amlogic/usb/phy/phy-aml-new-usb2-v2.c
View File

@@ -28,7 +28,8 @@
#include <linux/usb/phy.h>
#include <linux/amlogic/usb-v2.h>
#include <linux/amlogic/cpu_version.h>
#include <linux/amlogic/power_ctrl.h>
#include <linux/amlogic/power_domain.h>
#include <dt-bindings/power/amlogic,pd.h>
#include "phy-aml-new-usb-v2.h"
struct amlogic_usb_v2 *g_phy2_v2;
@@ -265,24 +266,6 @@ static void amlogic_new_usb2phy_shutdown(struct usb_phy *x)
phy->suspend_flag = 1;
}
void power_switch_to_usb(struct amlogic_usb_v2 *phy)
{
/* Powerup usb_comb */
power_ctrl_sleep(1, phy->u2_ctrl_sleep_shift);
power_ctrl_mempd0(1, phy->u2_hhi_mem_pd_mask, phy->u2_hhi_mem_pd_shift);
udelay(100);
writel((readl(phy->reset_regs + (0x21 * 4 - 0x8)) & ~(0x1 << 2)),
phy->reset_regs + (0x21 * 4 - 0x8));
udelay(100);
power_ctrl_iso(1, phy->u2_ctrl_iso_shift);
writel((readl(phy->reset_regs + (0x21 * 4 - 0x8)) | (0x1 << 2)),
phy->reset_regs + (0x21 * 4 - 0x8));
udelay(100);
}
static int amlogic_new_usb2_probe(struct platform_device *pdev)
{
struct amlogic_usb_v2 *phy;
@@ -300,10 +283,14 @@ static int amlogic_new_usb2_probe(struct platform_device *pdev)
int retval;
u32 pll_setting[8];
u32 pwr_ctl = 0;
u32 u2_ctrl_sleep_shift = 0;
u32 u2_hhi_mem_pd_shift = 0;
u32 u2_hhi_mem_pd_mask = 0;
u32 u2_ctrl_iso_shift = 0;
gpio_name = of_get_property(dev->of_node, "gpio-vbus-power", NULL);
if (gpio_name) {
usb_gd = gpiod_get_index(&pdev->dev,
NULL, 0, GPIOD_OUT_LOW);
if (IS_ERR(usb_gd))
return -1;
gpiod_direction_output(usb_gd, 1);
}
prop = of_get_property(dev->of_node, "portnum", NULL);
if (prop)
@@ -355,36 +342,6 @@ static int amlogic_new_usb2_probe(struct platform_device *pdev)
else
pwr_ctl = 0;
if (pwr_ctl) {
prop = of_get_property(dev->of_node,
"u2-ctrl-sleep-shift", NULL);
if (prop)
u2_ctrl_sleep_shift = of_read_ulong(prop, 1);
else
pwr_ctl = 0;
prop = of_get_property(dev->of_node,
"u2-hhi-mem-pd-shift", NULL);
if (prop)
u2_hhi_mem_pd_shift = of_read_ulong(prop, 1);
else
pwr_ctl = 0;
prop = of_get_property(dev->of_node,
"u2-hhi-mem-pd-mask", NULL);
if (prop)
u2_hhi_mem_pd_mask = of_read_ulong(prop, 1);
else
pwr_ctl = 0;
prop = of_get_property(dev->of_node,
"u2-ctrl-iso-shift", NULL);
if (prop)
u2_ctrl_iso_shift = of_read_ulong(prop, 1);
else
pwr_ctl = 0;
}
phy = devm_kzalloc(&pdev->dev, sizeof(*phy), GFP_KERNEL);
if (!phy)
return -ENOMEM;
@@ -459,13 +416,8 @@ static int amlogic_new_usb2_probe(struct platform_device *pdev)
phy->phy_cfg_state[i] = 1;
}
if (pwr_ctl) {
phy->u2_ctrl_sleep_shift = u2_ctrl_sleep_shift;
phy->u2_hhi_mem_pd_shift = u2_hhi_mem_pd_shift;
phy->u2_hhi_mem_pd_mask = u2_hhi_mem_pd_mask;
phy->u2_ctrl_iso_shift = u2_ctrl_iso_shift;
power_switch_to_usb(phy);
}
if (pwr_ctl)
power_domain_switch(PM_USB, PWR_ON);
usb_add_phy_dev(&phy->phy);

72
drivers/amlogic/usb/phy/phy-aml-new-usb3-v2.c
View File

@@ -32,7 +32,8 @@
#include <linux/workqueue.h>
#include <linux/notifier.h>
#include <linux/amlogic/usbtype.h>
#include <linux/amlogic/power_ctrl.h>
#include <linux/amlogic/power_domain.h>
#include <dt-bindings/power/amlogic,pd.h>
#include "phy-aml-new-usb-v2.h"
#define HOST_MODE 0
@@ -483,36 +484,11 @@ static bool device_is_available(const struct device_node *device)
return false;
}
static void power_switch_to_pcie(struct amlogic_usb_v2 *phy)
{
u32 val;
power_ctrl_sleep(1, phy->u30_ctrl_sleep_shift);
power_ctrl_mempd0(1, phy->u30_hhi_mem_pd_mask,
phy->u30_hhi_mem_pd_shift);
udelay(100);
val = readl((void __iomem *)
((unsigned long)phy->reset_regs + (0x20 * 4 - 0x8)));
writel((val & (~(0x1<<12))), (void __iomem *)
((unsigned long)phy->reset_regs + (0x20 * 4 - 0x8)));
udelay(100);
power_ctrl_iso(1, phy->u30_ctrl_iso_shift);
val = readl((void __iomem *)
((unsigned long)phy->reset_regs + (0x20 * 4 - 0x8)));
writel((val | (0x1<<12)), (void __iomem *)
((unsigned long)phy->reset_regs + (0x20 * 4 - 0x8)));
udelay(100);
}
static int amlogic_new_usb3_v2_probe(struct platform_device *pdev)
{
struct amlogic_usb_v2 *phy;
struct device *dev = &pdev->dev;
struct resource *phy_mem;
struct resource *reset_mem;
void __iomem *phy_base;
void __iomem *phy3_base;
void __iomem *reset_base = NULL;
@@ -622,44 +598,6 @@ static int amlogic_new_usb3_v2_probe(struct platform_device *pdev)
else
pwr_ctl = 0;
if (pwr_ctl) {
reset_mem = platform_get_resource(pdev, IORESOURCE_MEM, 1);
if (reset_mem) {
reset_base = ioremap(reset_mem->start,
resource_size(reset_mem));
if (IS_ERR(reset_base))
return PTR_ERR(reset_base);
}
prop = of_get_property(dev->of_node,
"u3-ctrl-sleep-shift", NULL);
if (prop)
u3_ctrl_sleep_shift = of_read_ulong(prop, 1);
else
pwr_ctl = 0;
prop = of_get_property(dev->of_node,
"u3-hhi-mem-pd-shift", NULL);
if (prop)
u3_hhi_mem_pd_shift = of_read_ulong(prop, 1);
else
pwr_ctl = 0;
prop = of_get_property(dev->of_node,
"u3-hhi-mem-pd-mask", NULL);
if (prop)
u3_hhi_mem_pd_mask = of_read_ulong(prop, 1);
else
pwr_ctl = 0;
prop = of_get_property(dev->of_node,
"u3-ctrl-iso-shift", NULL);
if (prop)
u3_ctrl_iso_shift = of_read_ulong(prop, 1);
else
pwr_ctl = 0;
}
retval = of_property_read_u32
(dev->of_node, "usb2-phy-reg", &usb2_phy_mem);
if (retval < 0)
@@ -726,12 +664,8 @@ static int amlogic_new_usb3_v2_probe(struct platform_device *pdev)
/* set the phy from pcie to usb3 */
if (phy->portnum > 0) {
if (phy->pwr_ctl) {
phy->u30_ctrl_sleep_shift = u3_ctrl_sleep_shift;
phy->u30_hhi_mem_pd_shift = u3_hhi_mem_pd_shift;
phy->u30_hhi_mem_pd_mask = u3_hhi_mem_pd_mask;
phy->u30_ctrl_iso_shift = u3_ctrl_iso_shift;
power_domain_switch(PM_PCIE0, PWR_ON);
phy->reset_regs = reset_base;
power_switch_to_pcie(phy);
}
writel((readl(phy->phy3_cfg) | (3<<5)), phy->phy3_cfg);
udelay(100);

175
drivers/amlogic/usb/phy/phy-aml-new-usb3-v3.c
View File

@@ -32,7 +32,8 @@
#include <linux/workqueue.h>
#include <linux/notifier.h>
#include <linux/amlogic/usbtype.h>
#include <linux/amlogic/power_ctrl.h>
#include <linux/amlogic/power_domain.h>
#include <dt-bindings/power/amlogic,pd.h>
#include "phy-aml-new-usb-v2.h"
#define HOST_MODE 0
@@ -518,59 +519,12 @@ static int amlogic_new_usb3_init_v3(struct usb_phy *x)
static void power_switch_to_pcie(struct amlogic_usb_v2 *phy)
{
u32 val;
if (phy->portconfig_30)
power_domain_switch(PM_PCIE0, PWR_ON);
if (phy->portconfig_30) {
power_ctrl_sleep(1, phy->u30_ctrl_sleep_shift);
power_ctrl_mempd0(1, phy->u30_hhi_mem_pd_mask,
phy->u30_hhi_mem_pd_shift);
udelay(100);
if (phy->portconfig_31)
power_domain_switch(PM_PCIE1, PWR_ON);
val = readl((void __iomem *)
((unsigned long)phy->reset_regs + (0x20 * 4 - 0x8)));
writel((val & (~(0x1 << phy->usb30_ctrl_rst_bit))),
(void __iomem *)((unsigned long)phy->reset_regs +
(0x20 * 4 - 0x8)));
udelay(100);
power_ctrl_iso(1, phy->u30_ctrl_iso_shift);
val = readl((void __iomem *)
((unsigned long)phy->reset_regs + (0x20 * 4 - 0x8)));
writel((val | (0x1 << phy->usb30_ctrl_rst_bit)),
(void __iomem *)((unsigned long)phy->reset_regs +
(0x20 * 4 - 0x8)));
udelay(100);
}
if (phy->portconfig_31) {
power_ctrl_sleep(1, phy->u31_ctrl_sleep_shift);
power_ctrl_mempd0(1, phy->u31_hhi_mem_pd_mask,
phy->u31_hhi_mem_pd_shift);
udelay(100);
val = readl((void __iomem *)
((unsigned long)phy->reset_regs + (0x20 * 4 - 0x8)));
writel((val & (~(0x1 << phy->usb31_ctrl_rst_bit))),
(void __iomem *)((unsigned long)phy->reset_regs +
(0x20 * 4 - 0x8)));
udelay(100);
power_ctrl_iso(1, phy->u31_ctrl_iso_shift);
val = readl((void __iomem *)
((unsigned long)phy->reset_regs + (0x20 * 4 - 0x8)));
writel((val | (0x1 << phy->usb31_ctrl_rst_bit)),
(void __iomem *)((unsigned long)phy->reset_regs +
(0x20 * 4 - 0x8)));
udelay(100);
}
}
static int amlogic_new_usb3_v3_probe(struct platform_device *pdev)
@@ -594,16 +548,6 @@ static int amlogic_new_usb3_v3_probe(struct platform_device *pdev)
int retval;
int ret;
u32 pwr_ctl = 0;
u32 u30_ctrl_sleep_shift = 0;
u32 u30_hhi_mem_pd_shift = 0;
u32 u30_hhi_mem_pd_mask = 0;
u32 u30_ctrl_iso_shift = 0;
u32 usb30_ctrl_rst_bit = 0;
u32 u31_ctrl_sleep_shift = 0;
u32 u31_hhi_mem_pd_shift = 0;
u32 u31_hhi_mem_pd_mask = 0;
u32 u31_ctrl_iso_shift = 0;
u32 usb31_ctrl_rst_bit = 0;
u32 portconfig_30 = 0;
u32 portconfig_31 = 0;
unsigned long rate;
@@ -659,94 +603,21 @@ static int amlogic_new_usb3_v3_probe(struct platform_device *pdev)
else
pwr_ctl = 0;
if (pwr_ctl) {
retval = of_property_read_u32(dev->of_node,
"reset-reg", &reset_mem);
if (retval < 0)
return -EINVAL;
retval = of_property_read_u32(dev->of_node, "reset-reg", &reset_mem);
if (retval < 0)
return -EINVAL;
retval = of_property_read_u32
(dev->of_node, "reset-reg-size",
&reset_mem_size);
if (retval < 0)
return -EINVAL;
retval = of_property_read_u32
(dev->of_node, "reset-reg-size",
&reset_mem_size);
if (retval < 0)
return -EINVAL;
reset_base = devm_ioremap_nocache
reset_base = devm_ioremap_nocache
(&(pdev->dev), (resource_size_t)reset_mem,
(unsigned long)reset_mem_size);
if (!reset_base)
return -ENOMEM;
prop = of_get_property(dev->of_node,
"u30-ctrl-sleep-shift", NULL);
if (prop)
u30_ctrl_sleep_shift = of_read_ulong(prop, 1);
else
pwr_ctl = 0;
prop = of_get_property(dev->of_node,
"u30-hhi-mem-pd-shift", NULL);
if (prop)
u30_hhi_mem_pd_shift = of_read_ulong(prop, 1);
else
pwr_ctl = 0;
prop = of_get_property(dev->of_node,
"u30-hhi-mem-pd-mask", NULL);
if (prop)
u30_hhi_mem_pd_mask = of_read_ulong(prop, 1);
else
pwr_ctl = 0;
prop = of_get_property(dev->of_node,
"u30-ctrl-iso-shift", NULL);
if (prop)
u30_ctrl_iso_shift = of_read_ulong(prop, 1);
else
pwr_ctl = 0;
prop = of_get_property(dev->of_node,
"usb30-ctrl-a-rst-bit", NULL);
if (prop)
usb30_ctrl_rst_bit = of_read_ulong(prop, 1);
else
pwr_ctl = 0;
prop = of_get_property(dev->of_node,
"u31-ctrl-sleep-shift", NULL);
if (prop)
u31_ctrl_sleep_shift = of_read_ulong(prop, 1);
else
pwr_ctl = 0;
prop = of_get_property(dev->of_node,
"u31-hhi-mem-pd-shift", NULL);
if (prop)
u31_hhi_mem_pd_shift = of_read_ulong(prop, 1);
else
pwr_ctl = 0;
prop = of_get_property(dev->of_node,
"u31-hhi-mem-pd-mask", NULL);
if (prop)
u31_hhi_mem_pd_mask = of_read_ulong(prop, 1);
else
pwr_ctl = 0;
prop = of_get_property(dev->of_node,
"u31-ctrl-iso-shift", NULL);
if (prop)
u31_ctrl_iso_shift = of_read_ulong(prop, 1);
else
pwr_ctl = 0;
prop = of_get_property(dev->of_node,
"usb31-ctrl-a-rst-bit", NULL);
if (prop)
usb31_ctrl_rst_bit = of_read_ulong(prop, 1);
else
pwr_ctl = 0;
}
if (!reset_base)
return -ENOMEM;
prop = of_get_property(dev->of_node,
"portconfig-30", NULL);
@@ -797,21 +668,11 @@ static int amlogic_new_usb3_v3_probe(struct platform_device *pdev)
phy->phy.type = USB_PHY_TYPE_USB3;
phy->phy.flags = AML_USB3_PHY_DISABLE;
phy->pwr_ctl = pwr_ctl;
phy->reset_regs = reset_base;
/* set the phy from pcie to usb3 */
if (phy->portnum > 0) {
if (phy->pwr_ctl) {
phy->u30_ctrl_sleep_shift = u30_ctrl_sleep_shift;
phy->u30_hhi_mem_pd_shift = u30_hhi_mem_pd_shift;
phy->u30_hhi_mem_pd_mask = u30_hhi_mem_pd_mask;
phy->u30_ctrl_iso_shift = u30_ctrl_iso_shift;
phy->reset_regs = reset_base;
phy->usb30_ctrl_rst_bit = usb30_ctrl_rst_bit;
phy->u31_ctrl_sleep_shift = u31_ctrl_sleep_shift;
phy->u31_hhi_mem_pd_shift = u31_hhi_mem_pd_shift;
phy->u31_hhi_mem_pd_mask = u31_hhi_mem_pd_mask;
phy->u31_ctrl_iso_shift = u31_ctrl_iso_shift;
phy->usb31_ctrl_rst_bit = usb31_ctrl_rst_bit;
power_switch_to_pcie(phy);
udelay(100);
}