ODROID-M1S: arm64/dts: 3.5" LCD + LCD connector board (dsi-1lane,RGB888)

Change-Id: Ic4adc6e3019d78c6364fdba3515c49ff80b7d885
This commit is contained in:
ckkim
2023-09-13 18:13:36 +09:00
committed by Dongjin Kim
parent 3e2f2dbd73
commit b5ce0291bd
2 changed files with 209 additions and 0 deletions

View File

@@ -3,6 +3,7 @@
dtbo-$(CONFIG_ARCH_ROCKCHIP_ODROIDM1) += \
blueled_off.dtbo \
dht11.dtbo \
display_3_5.dtbo \
display_vu8s.dtbo \
hktft32.dtbo \
i2c0.dtbo \

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@@ -0,0 +1,208 @@
/dts-v1/;
/plugin/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/rockchip.h>
#include <dt-bindings/display/drm_mipi_dsi.h>
#include <dt-bindings/display/rockchip_vop.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
/{
fragment@0 {
target = <&backlight>;
__overlay__ {
status = "okay";
pwms = <&pwm5 0 25000 0>;
};
};
fragment@1 {
target = <&pwm5>;
__overlay__ {
status = "okay";
};
};
fragment@2 {
target = <&dsi0>;
__overlay__ {
status = "okay";
};
};
fragment@3 {
target = <&dsi0_panel>;
__overlay__ {
status = "okay";
compatible = "simple-panel-dsi";
prepare-delay-ms = <2>;
reset-delay-ms = <1>;
init-delay-ms = <20>;
enable-delay-ms = <120>;
disable-delay-ms = <50>;
unprepare-delay-ms = <20>;
/* LCD size */
width-mm = <42>;
height-mm = <82>;
dsi,flags = <(MIPI_DSI_MODE_VIDEO |
MIPI_DSI_MODE_VIDEO_BURST |
MIPI_DSI_MODE_LPM |
MIPI_DSI_MODE_EOT_PACKET)>;
dsi,format = <MIPI_DSI_FMT_RGB888>;
dsi,lanes = <1>;
panel-init-sequence = [
05 fa 01 11
39 00 10 E0 00 13 18 04 0F 06 3A 56
4D 03 0A 06 30 3E 0F
39 00 10 E1 00 13 18 01 11 06 38 34
4D 06 0D 0B 31 37 0F
15 00 03 C0 18 17
15 00 02 C1 41
39 00 04 C5 00 1A 80
15 00 02 36 48
15 00 02 3A 55
15 00 02 B0 00
15 00 02 B1 A0
15 00 02 B4 02
15 00 03 B6 20 02
15 00 02 E9 00
39 00 05 F7 A9 51 2C 82
05 00 01 21
05 32 01 29
];
/* 28: DisplayOff */
/* 10: SleepIn */
panel-exit-sequence = [
05 00 01 28
05 00 01 10
];
display-timings {
native-mode = <&timing0>;
timing0: timing0 {
clock-frequency = <17000000>;
hactive = <320>;
vactive = <480>;
hfront-porch = <130>;
hsync-len = <4>;
hback-porch = <130>;
vfront-porch = <2>;
vsync-len = <1>;
vback-porch = <2>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <0>;
pixelclk-active = <0>;
};
};
};
};
fragment@4 {
target = <&dsi0_in_vp0>;
__overlay__ {
status = "disabled";
};
};
fragment@5 {
target = <&dsi0_in_vp1>;
__overlay__ {
status = "okay";
};
};
fragment@6 {
target = <&route_hdmi>;
__overlay__ {
status = "disabled";
connect = <&vp0_out_hdmi>;
};
};
fragment@7 {
target = <&route_dsi0>;
__overlay__ {
status = "okay";
connect = <&vp1_out_dsi0>;
};
};
fragment@8 {
target = <&video_phy0>;
__overlay__ {
status = "okay";
};
};
fragment@9 {
target = <&video_phy1>;
__overlay__ {
status = "disabled";
};
};
fragment@10 {
target = <&vp0>;
__overlay__ {
rockchip,plane-mask = <(1 << ROCKCHIP_VOP2_CLUSTER1
| 1 << ROCKCHIP_VOP2_ESMART1
| 1 << ROCKCHIP_VOP2_SMART1)>;
rockchip,primary-plane = <ROCKCHIP_VOP2_SMART1>;
};
};
fragment@11 {
target = <&vp1>;
__overlay__ {
rockchip,plane-mask = <(1 << ROCKCHIP_VOP2_CLUSTER0
| 1 << ROCKCHIP_VOP2_ESMART0
| 1 << ROCKCHIP_VOP2_SMART0)>;
rockchip,primary-plane = <ROCKCHIP_VOP2_SMART0>;
};
};
fragment@12 {
target = <&hdmi>;
__overlay__ {
status = "disabled";
};
};
fragment@13 {
target = <&hdmi_in_vp0>;
__overlay__ {
status = "disabled";
};
};
fragment@14 {
target = <&hdmi_sound>;
__overlay__ {
status = "disabled";
};
};
};