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rk3066b: emmc force even div

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chenxing
2013-06-01 10:45:43 +08:00
parent 5565c0d242
commit b61557f352
1 changed files with 1 additions and 1 deletions
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arch/arm/mach-rk30/clock_data-rk3066b.c
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@@ -2220,7 +2220,7 @@ static struct clk clk_emmc = {
.parent = &hclk_periph,
.mode = gate_mode,
.recalc = clksel_recalc_div,
.set_rate = clksel_set_rate_freediv,
.set_rate = clksel_set_rate_even,
.gate_idx = CLK_GATE_EMMC_SRC,
.clksel_con = CRU_CLKSELS_CON(12),
CRU_DIV_SET(0x3f, 8, 64),