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UPSTREAM: ARM: dts: rockchip: add rk3288 displayport controller node

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Add the rk3288 edp node and its hooks into the display-subsystem.

Change-Id: I1bd7617203e9c36c426bd69fd23f99c1e10a8c99
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Tested-by: Douglas Anderson <dianders@chromium.org>
(cherry pick from commit 6df7ec6186)
This commit is contained in:
Heiko Stuebner
2015-10-28 10:55:19 +01:00
committed by Huang, Tao
parent 125cec433e
commit b6a7c5c710
1 changed files with 44 additions and 0 deletions
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44
arch/arm/boot/dts/rk3288.dtsi
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@@ -815,6 +815,12 @@
reg = <0>;
remote-endpoint = <&hdmi_in_vopb>;
};
vopb_out_edp: endpoint@1 {
reg = <1>;
remote-endpoint = <&edp_in_vopb>;
};
vopb_out_mipi: endpoint@2 {
reg = <2>;
remote-endpoint = <&mipi_in_vopb>;
@@ -852,6 +858,12 @@
reg = <0>;
remote-endpoint = <&hdmi_in_vopl>;
};
vopl_out_edp: endpoint@1 {
reg = <1>;
remote-endpoint = <&edp_in_vopl>;
};
vopl_out_mipi: endpoint@2 {
reg = <2>;
remote-endpoint = <&mipi_in_vopl>;
@@ -900,6 +912,38 @@
};
};
edp: dp@ff970000 {
compatible = "rockchip,rk3288-dp";
reg = <0xff970000 0x4000>;
interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru SCLK_EDP>, <&cru PCLK_EDP_CTRL>;
clock-names = "dp", "pclk";
phys = <&edp_phy>;
phy-names = "dp";
resets = <&cru SRST_EDP>;
reset-names = "dp";
rockchip,grf = <&grf>;
status = "disabled";
ports {
#address-cells = <1>;
#size-cells = <0>;
edp_in: port@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <0>;
edp_in_vopb: endpoint@0 {
reg = <0>;
remote-endpoint = <&vopb_out_edp>;
};
edp_in_vopl: endpoint@1 {
reg = <1>;
remote-endpoint = <&vopl_out_edp>;
};
};
};
};
hdmi: hdmi@ff980000 {
compatible = "rockchip,rk3288-dw-hdmi";
reg = <0xff980000 0x20000>;