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arm64: dts: renesas: rzv2mevk2: Add uSD card and eMMC support
The RZ/V2M EVK comes with a slot for a uSD card, and an eMMC. Add support for the both of them. Please note that the pinctrl driver for RZ/V2M doesn't support interrupts yet, therefore the card detect pin has been connected to the SDHI IP directly in this patch. We'll connect the card detect pin to its corresponding GPIO when we'll have driver support for interrupts in the RZ/V2M pinctrl driver. Signed-off-by: Fabrizio Castro <fabrizio.castro.jz@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20230130191152.182826-1-fabrizio.castro.jz@renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
This commit is contained in:
committed by
Geert Uytterhoeven
parent
548b277111
commit
b6c0be722b
@@ -7,6 +7,7 @@
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/dts-v1/;
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#include "r9a09g011.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/pinctrl/rzv2m-pinctrl.h>
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/ {
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@@ -60,6 +61,36 @@
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device_type = "memory";
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reg = <0x1 0x80000000 0x0 0x80000000>;
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};
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reg_1v8: regulator-1v8 {
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compatible = "regulator-fixed";
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regulator-name = "fixed-1.8V";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-boot-on;
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regulator-always-on;
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};
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reg_3v3: regulator-3v3 {
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compatible = "regulator-fixed";
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regulator-name = "fixed-3.3V";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-boot-on;
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regulator-always-on;
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};
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vccq_sdhi0: regulator-vccq-sdhi0 {
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compatible = "regulator-gpio";
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regulator-name = "SDHI0 VccQ";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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gpios = <&pwc 0 GPIO_ACTIVE_HIGH>;
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gpios-states = <1>;
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states = <3300000 0>, <1800000 1>;
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};
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};
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&avb {
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@@ -75,6 +106,23 @@
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};
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};
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&emmc {
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pinctrl-0 = <&emmc_pins>;
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pinctrl-1 = <&emmc_pins>;
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pinctrl-names = "default", "state_uhs";
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vmmc-supply = <®_3v3>;
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vqmmc-supply = <®_1v8>;
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bus-width = <8>;
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mmc-hs200-1_8v;
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no-sd;
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no-sdio;
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non-removable;
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fixed-emmc-driver-type = <1>;
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max-frequency = <200000000>;
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status = "okay";
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};
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&extal_clk {
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clock-frequency = <48000000>;
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};
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@@ -118,6 +166,26 @@
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};
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&pinctrl {
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emmc_pins: emmc {
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data {
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pinmux = <RZV2M_PORT_PINMUX(0, 0, 2)>, /* MMDAT0 */
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<RZV2M_PORT_PINMUX(0, 1, 2)>, /* MMDAT1 */
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<RZV2M_PORT_PINMUX(0, 2, 2)>, /* MMDAT2 */
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<RZV2M_PORT_PINMUX(0, 3, 2)>, /* MMDAT3 */
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<RZV2M_PORT_PINMUX(0, 4, 2)>, /* MMDAT4 */
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<RZV2M_PORT_PINMUX(0, 5, 2)>, /* MMDAT5 */
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<RZV2M_PORT_PINMUX(0, 6, 2)>, /* MMDAT6 */
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<RZV2M_PORT_PINMUX(0, 7, 2)>; /* MMDAT7 */
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power-source = <1800>;
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};
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ctrl {
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pinmux = <RZV2M_PORT_PINMUX(0, 10, 2)>, /* MMCMD */
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<RZV2M_PORT_PINMUX(0, 11, 2)>; /* MMCLK */
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power-source = <1800>;
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};
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};
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i2c0_pins: i2c0 {
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pinmux = <RZV2M_PORT_PINMUX(5, 0, 2)>, /* SDA */
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<RZV2M_PORT_PINMUX(5, 1, 2)>; /* SCL */
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@@ -127,6 +195,48 @@
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pinmux = <RZV2M_PORT_PINMUX(3, 8, 2)>, /* SDA */
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<RZV2M_PORT_PINMUX(3, 9, 2)>; /* SCL */
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};
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sdhi0_pins: sd0 {
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data {
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pinmux = <RZV2M_PORT_PINMUX(8, 2, 1)>, /* SD0DAT0 */
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<RZV2M_PORT_PINMUX(8, 3, 1)>, /* SD0DAT1 */
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<RZV2M_PORT_PINMUX(8, 4, 1)>, /* SD0DAT2 */
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<RZV2M_PORT_PINMUX(8, 5, 1)>; /* SD0DAT3 */
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power-source = <3300>;
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};
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ctrl {
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pinmux = <RZV2M_PORT_PINMUX(8, 0, 1)>, /* SD0CMD */
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<RZV2M_PORT_PINMUX(8, 1, 1)>; /* SD0CLK */
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power-source = <3300>;
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};
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cd {
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pinmux = <RZV2M_PORT_PINMUX(8, 7, 1)>; /* SD0CD */
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power-source = <3300>;
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};
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};
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sdhi0_pins_uhs: sd0-uhs {
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data {
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pinmux = <RZV2M_PORT_PINMUX(8, 2, 1)>, /* SD0DAT0 */
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<RZV2M_PORT_PINMUX(8, 3, 1)>, /* SD0DAT1 */
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<RZV2M_PORT_PINMUX(8, 4, 1)>, /* SD0DAT2 */
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<RZV2M_PORT_PINMUX(8, 5, 1)>; /* SD0DAT3 */
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power-source = <1800>;
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};
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ctrl {
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pinmux = <RZV2M_PORT_PINMUX(8, 0, 1)>, /* SD0CMD */
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<RZV2M_PORT_PINMUX(8, 1, 1)>; /* SD0CLK */
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power-source = <1800>;
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};
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cd {
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pinmux = <RZV2M_PORT_PINMUX(8, 7, 1)>; /* SD0CD */
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power-source = <1800>;
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};
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};
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};
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&pwc {
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@@ -134,6 +244,19 @@
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status = "okay";
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};
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&sdhi0 {
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pinctrl-0 = <&sdhi0_pins>;
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pinctrl-1 = <&sdhi0_pins_uhs>;
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pinctrl-names = "default", "state_uhs";
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vmmc-supply = <®_3v3>;
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vqmmc-supply = <&vccq_sdhi0>;
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bus-width = <4>;
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sd-uhs-sdr50;
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sd-uhs-sdr104;
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status = "okay";
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};
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&uart0 {
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status = "okay";
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};
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