Merge commit '164e2cba5dadb8482395d71181683a0a504027b2'

* commit '164e2cba5dadb8482395d71181683a0a504027b2': drm/rockchip: vop2: reset axi clk before disable vop ASoC: rockchip: sai: Simplify the Fsync Lost Threshold ASoC: rockchip: sai: Fix Fsync Error Detect Revert "phy: add combo phy driver for Rockchip SoCs" media: i2c: rk628: force EQ if hdmi2.0 media: i2c: rk628: check if phy is locked media: i2c: rk628: fix cec i2c error when hdmirx reset arm64: dts: rockchip: rk3399-evb: Fix device tree warnings for I2C unit address format arm64: dts: rockchip: rk3399-evb-ind-lpddr4-linux: assigned clock parents for vop Change-Id: I2962812f81ac728bde0e209ffcb0afb4d9743d9b
2026-06-07 03:15:31 +09:00 · 2024-11-13 19:57:45 +08:00
parent 8413811a93 164e2cba5d
commit b8be875e79
21 changed files with 113 additions and 1088 deletions
--- a/arch/arm64/boot/dts/rockchip/rk3399-evb-ind-lpddr4-android-avb.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3399-evb-ind-lpddr4-android-avb.dts
@@ -141,7 +141,7 @@
 		};
 	};

-	vm149c: vm149c@0c {
+	vm149c: vm149c@c {
 		compatible = "silicon touch,vm149c";
 		status = "okay";
 		reg = <0x0c>;
@@ -254,9 +254,9 @@
 		};
 	};

-	/delete-node/ tc358749x@0f;
+	/delete-node/ tc358749x@f;

-	tc35874x: tc35874x@0f {
+	tc35874x: tc35874x@f {
 		status = "disabled";
 		reg = <0x0f>;
 		compatible = "toshiba,tc358749";
--- a/arch/arm64/boot/dts/rockchip/rk3399-evb-ind-lpddr4-linux.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3399-evb-ind-lpddr4-linux.dts
@@ -137,7 +137,7 @@
 &i2c1 {
 	status = "okay";

-	vm149c: vm149c@0c {
+	vm149c: vm149c@c {
 		compatible = "silicon touch,vm149c";
 		status = "okay";
 		reg = <0x0c>;
@@ -335,6 +335,9 @@

 &vopb {
 	status = "okay";
+	assigned-clocks = <&cru DCLK_VOP0_DIV>;
+	/* The dclk parent for VOP->HDMI must from VPLL */
+	assigned-clock-parents = <&cru PLL_VPLL>;
 };

 &vopb_mmu {
@@ -343,6 +346,8 @@

 &vopl {
 	status = "okay";
+	assigned-clocks = <&cru DCLK_VOP1_DIV>;
+	assigned-clock-parents = <&cru PLL_CPLL>;
 };

 &vopl_mmu {
--- a/arch/arm64/boot/dts/rockchip/rk3399-evb-ind-lpddr4-v13-android-avb.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3399-evb-ind-lpddr4-v13-android-avb.dts
@@ -127,7 +127,7 @@
 &i2c1 {
 	status = "okay";

-	vm149c: vm149c@0c {
+	vm149c: vm149c@c {
 		compatible = "silicon touch,vm149c";
 		status = "okay";
 		reg = <0x0c>;
@@ -216,7 +216,7 @@
 		};
 	};

-	/delete-node/ tc358749x@0f;
+	/delete-node/ tc358749x@f;

 	tc35874x: tc35874x@0f {
 		status = "disabled";
--- a/arch/arm64/boot/dts/rockchip/rk3399-evb-ind.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399-evb-ind.dtsi
@@ -793,7 +793,7 @@
 		rst_gpio_number = <&gpio1 1 GPIO_ACTIVE_HIGH>;
 	};

-	tc358749x: tc358749x@0f {
+	tc358749x: tc358749x@f {
 		#sound-dai-cells = <0>;
 		compatible = "toshiba,tc358749x";
 		reg = <0x0f>;
@@ -914,7 +914,7 @@
 		};
 	};

-	sensor@0d {
+	sensor@d {
 		status = "okay";
 		compatible = "ak8963";
 		pinctrl-names = "default";
--- a/arch/arm64/boot/dts/rockchip/rk3399-mid-818-android.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3399-mid-818-android.dts
@@ -705,7 +705,7 @@
 		mpu-debug = <1>;
 	};

-	sensor@0d {
+	sensor@d {
 		status = "okay";
 		compatible = "ak8963";
 		pinctrl-names = "default";
--- a/arch/arm64/boot/dts/rockchip/rk3399-sapphire-excavator-linux-for-rk1808-cascade.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3399-sapphire-excavator-linux-for-rk1808-cascade.dts
@@ -400,7 +400,7 @@
 		};
 	};

-	vm149c: vm149c@0c {
+	vm149c: vm149c@c {
 		compatible = "silicon touch,vm149c";
 		status = "okay";
 		reg = <0x0c>;
--- a/arch/arm64/boot/dts/rockchip/rk3399-sapphire-excavator-linux.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3399-sapphire-excavator-linux.dts
@@ -355,7 +355,7 @@
 		};
 	};

-	vm149c: vm149c@0c {
+	vm149c: vm149c@c {
 		compatible = "silicon touch,vm149c";
 		status = "okay";
 		reg = <0x0c>;
--- a/arch/arm64/boot/dts/rockchip/rk3399-tve1030g-avb.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3399-tve1030g-avb.dts
@@ -13,7 +13,7 @@
 &i2c1 {
 	status = "okay";

-	vm149c: vm149c@0c {
+	vm149c: vm149c@c {
 		compatible = "silicon touch,vm149c";
 		status = "okay";
 		reg = <0x0c>;
--- a/arch/arm64/boot/dts/rockchip/rk3399pro-evb-v10-linux.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3399pro-evb-v10-linux.dts
@@ -705,7 +705,7 @@
 		layout = <3>;
 	};

-	vm149c: vm149c@0c {
+	vm149c: vm149c@c {
 		compatible = "silicon touch,vm149c";
 		status = "okay";
 		reg = <0x0c>;
--- a/arch/arm64/boot/dts/rockchip/rk3399pro-evb-v11-linux.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3399pro-evb-v11-linux.dts
@@ -725,7 +725,7 @@
 		layout = <3>;
 	};

-	vm149c: vm149c@0c {
+	vm149c: vm149c@c {
 		compatible = "silicon touch,vm149c";
 		status = "okay";
 		reg = <0x0c>;
--- a/arch/arm64/boot/dts/rockchip/rk3399pro-evb-v14-linux.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3399pro-evb-v14-linux.dts
@@ -60,7 +60,7 @@
 	i2c-scl-rising-time-ns = <345>;
 	i2c-scl-falling-time-ns = <11>;

-	vm149c: vm149c@0c {
+	vm149c: vm149c@c {
 		compatible = "silicon touch,vm149c";
 		status = "okay";
 		reg = <0x0c>;
--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c
@@ -4705,6 +4705,12 @@ static void vop2_disable(struct drm_crtc *crtc)
 	if (--vop2->enable_count > 0)
 		return;

+	/*
+	 * Reset AXI to get a clean state, which is conducive to recovering
+	 * from exceptions when enable at next time(such as iommu page fault)
+	 */
+	vop2_clk_reset(vop2->axi_rst);
+
 	if (vop2->is_iommu_enabled) {
 		/*
 		 * vop2 standby complete, so iommu detach is safe.
--- a/drivers/media/i2c/rk628/rk628_bt1120_v4l2.c
+++ b/drivers/media/i2c/rk628/rk628_bt1120_v4l2.c
@@ -627,7 +627,8 @@ static void enable_stream(struct v4l2_subdev *sd, bool en)
 	if (en) {
 		if (bt1120->rk628->version >= RK628F_VERSION) {
 			rk628_i2c_read(bt1120->rk628, HDMI_RX_SCDC_REGS2, &val);
-			if (rk628_hdmirx_scdc_ced_err(bt1120->rk628)) {
+			if (rk628_hdmirx_scdc_ced_err(bt1120->rk628) ||
+			    !rk628_hdmirx_is_locked(bt1120->rk628)) {
 				rk628_hdmirx_plugout(sd);
 				schedule_delayed_work(&bt1120->delayed_work_enable_hotplug,
 						      msecs_to_jiffies(800));
--- a/drivers/media/i2c/rk628/rk628_csi_v4l2.c
+++ b/drivers/media/i2c/rk628/rk628_csi_v4l2.c
@@ -939,7 +939,8 @@ static void enable_stream(struct v4l2_subdev *sd, bool en)
 			return;
 		}

-		if (rk628_hdmirx_scdc_ced_err(csi->rk628)) {
+		if (rk628_hdmirx_scdc_ced_err(csi->rk628) ||
+		    !rk628_hdmirx_is_locked(csi->rk628)) {
 			rk628_hdmirx_plugout(sd);
 			schedule_delayed_work(&csi->delayed_work_enable_hotplug,
 					      msecs_to_jiffies(800));
--- a/drivers/media/i2c/rk628/rk628_hdmirx.c
+++ b/drivers/media/i2c/rk628/rk628_hdmirx.c
@@ -1079,6 +1079,10 @@ static __maybe_unused u32 hdmirxphy_read(struct rk628 *rk628, u32 offset)

 static void rk628_hdmirxphy_enable(struct rk628 *rk628, bool is_hdmi2, bool scramble_en)
 {
+	hdmirxphy_write(rk628, 0x3e, 0x0);
+	hdmirxphy_write(rk628, 0x5e, 0x0);
+	hdmirxphy_write(rk628, 0x7e, 0x0);
+
 	hdmirxphy_write(rk628, 0x02, 0x1860);
 	hdmirxphy_write(rk628, 0x03, 0x0060);
 	if (!is_hdmi2 && scramble_en)
@@ -1093,10 +1097,14 @@ static void rk628_hdmirxphy_enable(struct rk628 *rk628, bool is_hdmi2, bool scra
 	hdmirxphy_write(rk628, 0x2d, 0x008c);
 	hdmirxphy_write(rk628, 0x2e, 0x0001);

-	if (is_hdmi2)
+	if (is_hdmi2) {
 		hdmirxphy_write(rk628, 0x0e, 0x0108);
-	else
+		hdmirxphy_write(rk628, 0x3e, 0x610);
+		hdmirxphy_write(rk628, 0x5e, 0x610);
+		hdmirxphy_write(rk628, 0x7e, 0x610);
+	} else {
 		hdmirxphy_write(rk628, 0x0e, 0x0008);
+	}

 }

@@ -1118,8 +1126,10 @@ static int rk628_hdmirx_cec_log_addr(struct cec_adapter *adap, u8 logical_addr)
 	else
 		cec->addresses |= BIT(logical_addr) | BIT(15);

+	mutex_lock(&rk628->rst_lock);
 	rk628_i2c_write(rk628, HDMI_RX_CEC_ADDR_L, cec->addresses & 0xff);
 	rk628_i2c_write(rk628, HDMI_RX_CEC_ADDR_H, (cec->addresses >> 8) & 0xff);
+	mutex_unlock(&rk628->rst_lock);

 	return 0;
 }
@@ -1129,13 +1139,13 @@ static int rk628_hdmirx_cec_enable(struct cec_adapter *adap, bool enable)
 	struct rk628_hdmirx_cec *cec = cec_get_drvdata(adap);
 	struct rk628 *rk628 = cec->rk628;

+	mutex_lock(&rk628->rst_lock);
 	if (!enable) {
 		rk628_i2c_write(rk628, HDMI_RX_AUD_CEC_IEN_CLR, ~0);
 		rk628_i2c_update_bits(rk628, HDMI_RX_DMI_DISABLE_IF, CEC_ENABLE_MASK, 0);
 	} else {
 		unsigned int irqs;

-		rk628_hdmirx_cec_log_addr(cec->adap, CEC_LOG_ADDR_INVALID);
 		rk628_i2c_update_bits(rk628, HDMI_RX_DMI_DISABLE_IF, CEC_ENABLE_MASK,
 				      CEC_ENABLE_MASK);

@@ -1146,6 +1156,7 @@ static int rk628_hdmirx_cec_enable(struct cec_adapter *adap, bool enable)
 		irqs = ERROR_INIT_ENSET | NACK_ENSET | EOM_ENSET | DONE_ENSET;
 		rk628_i2c_write(rk628, HDMI_RX_AUD_CEC_IEN_SET, irqs);
 	}
+	mutex_unlock(&rk628->rst_lock);

 	return 0;
 }
@@ -1177,11 +1188,13 @@ static int rk628_hdmirx_cec_transmit(struct cec_adapter *adap, u8 attempts,
 	if (msg_len <= 0)
 		return 0;

+	mutex_lock(&rk628->rst_lock);
 	for (i = 0; i < msg_len; i++)
 		rk628_i2c_write(rk628, HDMI_RX_CEC_TX_DATA_0 + i * 4, msg->msg[i]);

 	rk628_i2c_write(rk628, HDMI_RX_CEC_TX_CNT, msg_len);
 	rk628_i2c_write(rk628, HDMI_RX_CEC_CTRL, ctrl | CEC_SEND);
+	mutex_unlock(&rk628->rst_lock);

 	return 0;
 }
@@ -1880,6 +1893,24 @@ bool rk628_hdmirx_scdc_ced_err(struct rk628 *rk628)
 }
 EXPORT_SYMBOL(rk628_hdmirx_scdc_ced_err);

+bool rk628_hdmirx_is_locked(struct rk628 *rk628)
+{
+	u32 val;
+
+	rk628_i2c_read(rk628, HDMI_RX_SCDC_REGS1, &val);
+	if (!(val & 0x100))
+		return false;
+	if (!(val & 0x200))
+		return false;
+	if (!(val & 0x400))
+		return false;
+	if (!(val & 0x800))
+		return false;
+
+	return true;
+}
+EXPORT_SYMBOL(rk628_hdmirx_is_locked);
+
 bool rk628_hdmirx_is_signal_change_ists(struct rk628 *rk628, u32 md_ints, u32 pdec_ints)
 {
 	u32 md_mask, pded_madk;
--- a/drivers/media/i2c/rk628/rk628_hdmirx.h
+++ b/drivers/media/i2c/rk628/rk628_hdmirx.h
@@ -547,6 +547,7 @@ u8 rk628_hdmirx_get_color_space(struct rk628 *rk628);
 int rk628_hdmirx_get_hdcp_enc_status(struct rk628 *rk628);
 void rk628_hdmirx_controller_reset(struct rk628 *rk628);
 bool rk628_hdmirx_scdc_ced_err(struct rk628 *rk628);
+bool rk628_hdmirx_is_locked(struct rk628 *rk628);
 bool rk628_hdmirx_is_signal_change_ists(struct rk628 *rk628, u32 md_ints, u32 pdec_ints);

 void rk628_hdmirx_cec_irq(struct rk628 *rk628, struct rk628_hdmirx_cec *cec);
--- a/drivers/phy/rockchip/Kconfig
+++ b/drivers/phy/rockchip/Kconfig
@@ -39,14 +39,6 @@ config PHY_ROCKCHIP_EMMC
 	help
 	  Enable this to support the Rockchip EMMC PHY.

-config PHY_ROCKCHIP_INNO_COMBPHY
-	tristate "Rockchip INNO USB 3.0 and PCIe COMBPHY Driver"
-	depends on (ARCH_ROCKCHIP && OF) || COMPILE_TEST
-	select GENERIC_PHY
-	help
-	  Enable this to support the Rockchip SoCs COMBPHY.
-	  If unsure, say N.
-
 config PHY_ROCKCHIP_INNO_HDMI
 	tristate "Rockchip INNO HDMI PHY Driver"
 	depends on (ARCH_ROCKCHIP || COMPILE_TEST) && OF
--- a/drivers/phy/rockchip/Makefile
+++ b/drivers/phy/rockchip/Makefile
@@ -4,7 +4,6 @@ obj-$(CONFIG_PHY_ROCKCHIP_CSI2_DPHY)	+= phy-rockchip-csi2-dphy-hw.o \
 obj-$(CONFIG_PHY_ROCKCHIP_DP)		+= phy-rockchip-dp.o
 obj-$(CONFIG_PHY_ROCKCHIP_DPHY_RX0)     += phy-rockchip-dphy-rx0.o
 obj-$(CONFIG_PHY_ROCKCHIP_EMMC)		+= phy-rockchip-emmc.o
-obj-$(CONFIG_PHY_ROCKCHIP_INNO_COMBPHY)	+= phy-rockchip-inno-combphy.o
 obj-$(CONFIG_PHY_ROCKCHIP_INNO_CSIDPHY)	+= phy-rockchip-inno-csidphy.o
 obj-$(CONFIG_PHY_ROCKCHIP_INNO_DSIDPHY)	+= phy-rockchip-inno-dsidphy.o
 obj-$(CONFIG_PHY_ROCKCHIP_INNO_HDMI)	+= phy-rockchip-inno-hdmi-phy.o
--- a/drivers/phy/rockchip/phy-rockchip-inno-combphy.c
+++ b/drivers/phy/rockchip/phy-rockchip-inno-combphy.c
--- a/sound/soc/rockchip/rockchip_sai.c
+++ b/sound/soc/rockchip/rockchip_sai.c
@@ -106,29 +106,42 @@ static bool rockchip_sai_stream_valid(struct snd_pcm_substream *substream,
 	return false;
 }

-static int rockchip_sai_fsync_lost_detect(struct rk_sai_dev *sai, bool en)
+static int rockchip_sai_fsync_lost_threshold_cfg(struct rk_sai_dev *sai,
+						 unsigned int sample_rate)
 {
-	unsigned int fw, cnt;
+	unsigned int div, cnt, mclk_rate;

 	if (sai->is_master_mode || sai->version < SAI_VER_2311)
 		return 0;

-	regmap_read(sai->regmap, SAI_FSCR, &fw);
-	cnt = SAI_FSCR_FW_V(fw) << 1; /* two fsync lost */
+	regmap_read(sai->regmap, SAI_CKR, &div);
+	div = SAI_CKR_MDIV_V(div);
+	mclk_rate = clk_get_rate(sai->mclk) / div;
+
+	cnt = (mclk_rate + sample_rate - 1) / sample_rate;
+	cnt = cnt << 1; /* two fsync lost */
+
+	/* the cnt is cycles of SCLK from cru, not external SCLK */
+	regmap_update_bits(sai->regmap, SAI_FS_TIMEOUT,
+			   SAI_FS_TIMEOUT_VAL_MASK,
+			   SAI_FS_TIMEOUT_VAL(cnt));
+
+	return 0;
+}
+
+static int rockchip_sai_fsync_lost_detect(struct rk_sai_dev *sai, bool en)
+{
+	if (sai->is_master_mode || sai->version < SAI_VER_2311)
+		return 0;

 	regmap_update_bits(sai->regmap, SAI_INTCR,
 			   SAI_INTCR_FSLOSTC, SAI_INTCR_FSLOSTC);
 	regmap_update_bits(sai->regmap, SAI_INTCR,
 			   SAI_INTCR_FSLOST_MASK,
 			   SAI_INTCR_FSLOST(en));
-	/*
-	 * the cnt is cycles of SCLK from cru, not external SCLK.
-	 * so, suggest to set SCLK freq equal to external SCLK
-	 * in SLAVE mode.
-	 */
 	regmap_update_bits(sai->regmap, SAI_FS_TIMEOUT,
-			   SAI_FS_TIMEOUT_VAL_MASK | SAI_FS_TIMEOUT_EN_MASK,
-			   SAI_FS_TIMEOUT_VAL(cnt) | SAI_FS_TIMEOUT_EN(en));
+			   SAI_FS_TIMEOUT_EN_MASK,
+			   SAI_FS_TIMEOUT_EN(en));

 	return 0;
 }
@@ -201,12 +214,11 @@ static int rockchip_sai_runtime_suspend(struct device *dev)
 	rockchip_sai_fsync_lost_detect(sai, 0);
 	rockchip_sai_fsync_err_detect(sai, 0);

-	if (sai->is_master_mode)
-		regmap_update_bits(sai->regmap, SAI_XFER,
-				   SAI_XFER_CLK_MASK |
-				   SAI_XFER_FSS_MASK,
-				   SAI_XFER_CLK_DIS |
-				   SAI_XFER_FSS_DIS);
+	regmap_update_bits(sai->regmap, SAI_XFER,
+			   SAI_XFER_CLK_MASK |
+			   SAI_XFER_FSS_MASK,
+			   SAI_XFER_CLK_DIS |
+			   SAI_XFER_FSS_DIS);

 	rockchip_sai_poll_clk_idle(sai);

@@ -642,6 +654,8 @@ static int rockchip_sai_hw_params(struct snd_pcm_substream *substream,
 				   SAI_CKR_MDIV(div_bclk));
 	}

+	rockchip_sai_fsync_lost_threshold_cfg(sai, params_rate(params));
+
 	rockchip_utils_get_performance(substream, params, dai, fifo);

 	return 0;
@@ -666,24 +680,22 @@ static int rockchip_sai_prepare(struct snd_pcm_substream *substream,
 	if (!rockchip_sai_stream_valid(substream, dai))
 		return 0;

-	if (sai->is_master_mode) {
-		/*
-		 * Should wait for one BCLK ready after DIV and then ungate
-		 * output clk to achieve the clean clk.
-		 *
-		 * The best way is to use delay per samplerate, but, the max time
-		 * is quite a tiny value, so, let's make it simple to use the max
-		 * time.
-		 *
-		 * The max BCLK cycle time is: 15.6us @ 8K-8Bit (64K BCLK)
-		 */
-		udelay(20);
-		regmap_update_bits(sai->regmap, SAI_XFER,
-				   SAI_XFER_CLK_MASK |
-				   SAI_XFER_FSS_MASK,
-				   SAI_XFER_CLK_EN |
-				   SAI_XFER_FSS_EN);
-	}
+	/*
+	 * Should wait for one BCLK ready after DIV and then ungate
+	 * output clk to achieve the clean clk.
+	 *
+	 * The best way is to use delay per samplerate, but, the max time
+	 * is quite a tiny value, so, let's make it simple to use the max
+	 * time.
+	 *
+	 * The max BCLK cycle time is: 15.6us @ 8K-8Bit (64K BCLK)
+	 */
+	udelay(20);
+	regmap_update_bits(sai->regmap, SAI_XFER,
+			   SAI_XFER_CLK_MASK |
+			   SAI_XFER_FSS_MASK,
+			   SAI_XFER_CLK_EN |
+			   SAI_XFER_FSS_EN);

 	rockchip_sai_fsync_lost_detect(sai, 1);
 	rockchip_sai_fsync_err_detect(sai, 1);
--- a/sound/soc/rockchip/rockchip_sai.h
+++ b/sound/soc/rockchip/rockchip_sai.h
@@ -95,6 +95,7 @@
 /* CKR Clock Generation Register */
 #define SAI_CKR_MDIV_MASK		GENMASK(14, 3)
 #define SAI_CKR_MDIV(x)			((x - 1) << 3)
+#define SAI_CKR_MDIV_V(v)		((((v) & SAI_CKR_MDIV_MASK) >> 3) + 1)
 #define SAI_CKR_MSS_MASK		BIT(2)
 #define SAI_CKR_MSS_SLAVE		BIT(2)
 #define SAI_CKR_MSS_MASTER		0