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ge2d: sm1: add ge2d power control [1/1]

Browse Source 
PD#SWPL-6186

Problem:
add ge2d power control

Solution:
add ge2d power control

Verify:
SM1-AC200 board

Change-Id: I3ea08c4d800f78e5187b6ae334849db02309ce0e
Signed-off-by: Jian Cao <jian.cao@amlogic.com>
This commit is contained in:
Jian Cao
2019-03-28 17:42:39 +08:00
committed by Jianxiong Pan
parent 79f0daf1ee
commit bad9d8cf88
4 changed files with 73 additions and 45 deletions
Download Patch File Download Diff File Expand all files Collapse all files

14
drivers/amlogic/media/common/ge2d/ge2d_io.h
View File

@@ -22,6 +22,7 @@
#include <linux/amlogic/iomap.h>
#include <linux/amlogic/cpu_version.h>
#include <linux/amlogic/media/registers/regs/ao_regs.h>
#include <linux/amlogic/power_ctrl.h>
#include "ge2d_log.h"
@@ -154,11 +155,11 @@ static void ge2d_c_setb(unsigned int _reg, unsigned int _value,
(((_value)&((1L<<(_len))-1)) << (_start))));
}
static inline void ge2d_set_bus_bits(unsigned int bus_type,
static inline void ge2d_set_pwr_tbl_bits(unsigned int table_type,
unsigned int reg, unsigned int val,
unsigned int start, unsigned int len)
{
switch (bus_type) {
switch (table_type) {
case CBUS_BASE:
ge2d_c_setb(reg, val, start, len);
break;
@@ -168,6 +169,15 @@ static inline void ge2d_set_bus_bits(unsigned int bus_type,
case HIUBUS_BASE:
ge2d_hiu_setb(reg, val, start, len);
break;
case GEN_PWR_SLEEP0:
power_ctrl_sleep(val ? 0 : 1, start);
break;
case GEN_PWR_ISO0:
power_ctrl_iso(val ? 0 : 1, start);
break;
case MEM_PD_REG0:
power_ctrl_mempd0(val ? 0 : 1, 0xFF, start);
break;
default:
ge2d_log_err("unsupported bus type\n");
break;

25
drivers/amlogic/media/common/ge2d/ge2d_main.c
View File

@@ -54,6 +54,7 @@
#define GE2D_CLASS_NAME "ge2d"
#define MAX_GE2D_CLK 500000000
#define HHI_MEM_PD_REG0 0x40
#define RESET2_LEVEL 0x422
struct ge2d_device_s {
char name[20];
@@ -1036,23 +1037,29 @@ static int ge2d_release(struct inode *inode, struct file *file)
static struct ge2d_ctrl_s default_poweron_ctrl[] = {
/* power up ge2d */
{AOBUS_BASE, AO_RTI_GEN_PWR_SLEEP0, 0, 19, 1, 0},
{GEN_PWR_SLEEP0, AO_RTI_GEN_PWR_SLEEP0, 0, 19, 1, 0},
/* Power up memory */
{HIUBUS_BASE, HHI_MEM_PD_REG0, 0, 18, 8, 100},
{MEM_PD_REG0, HHI_MEM_PD_REG0, 0, 18, 8, 100},
/* reset */
{CBUS_BASE, RESET2_LEVEL, 0, 6, 1, 0},
/* remove isolation */
{AOBUS_BASE, AO_RTI_GEN_PWR_ISO0, 0, 19, 1, 0}
{GEN_PWR_ISO0, AO_RTI_GEN_PWR_ISO0, 0, 19, 1, 0},
/* pull up reset */
{CBUS_BASE, RESET2_LEVEL, 1, 6, 1, 0}
};
static struct ge2d_ctrl_s default_poweroff_ctrl[] = {
/* reset */
{CBUS_BASE, RESET2_LEVEL, 0, 6, 1, 0},
/* add isolation */
{AOBUS_BASE, AO_RTI_GEN_PWR_ISO0, 1, 19, 1, 0},
{GEN_PWR_ISO0, AO_RTI_GEN_PWR_ISO0, 1, 19, 1, 0},
/* Power down memory */
{HIUBUS_BASE, HHI_MEM_PD_REG0, 0xff, 18, 8, 0},
{MEM_PD_REG0, HHI_MEM_PD_REG0, 0xFF, 18, 8, 0},
/* power down ge2d */
{AOBUS_BASE, AO_RTI_GEN_PWR_SLEEP0, 1, 19, 1, 0}
{GEN_PWR_SLEEP0, AO_RTI_GEN_PWR_SLEEP0, 1, 19, 1, 0}
};
struct ge2d_power_table_s default_poweron_table = {3, default_poweron_ctrl};
struct ge2d_power_table_s default_poweroff_table = {3, default_poweroff_ctrl};
struct ge2d_power_table_s default_poweron_table = {5, default_poweron_ctrl};
struct ge2d_power_table_s default_poweroff_table = {4, default_poweroff_ctrl};
static struct ge2d_device_data_s ge2d_gxl = {
.ge2d_rate = 400000000,
@@ -1215,7 +1222,6 @@ static int ge2d_probe(struct platform_device *pdev)
goto failed1;
}
ge2d_log_info("clock clk_ge2d source %p\n", clk);
ge2d_pwr_config(true);
clk_prepare_enable(clk);
clk_vapb0 = devm_clk_get(&pdev->dev, "clk_vapb_0");
@@ -1285,7 +1291,6 @@ static int ge2d_remove(struct platform_device *pdev)
ge2d_log_info("%s\n", __func__);
ge2d_wq_deinit();
remove_ge2d_device();
ge2d_pwr_config(false);
return 0;
}

72
drivers/amlogic/media/common/ge2d/ge2d_wq.c
View File

@@ -120,6 +120,37 @@ static const int default_ge2d_color_lut[] = {
GE2D_FORMAT_S32_ARGB,/* BPP_TYPE_32_ARGB=32, */
};
static void ge2d_pre_init(void)
{
struct ge2d_gen_s ge2d_gen_cfg;
ge2d_gen_cfg.interrupt_ctrl = 0x02;
ge2d_gen_cfg.dp_on_cnt = 0;
ge2d_gen_cfg.dp_off_cnt = 0;
ge2d_gen_cfg.dp_onoff_mode = 0;
ge2d_gen_cfg.vfmt_onoff_en = 0;
/* fifo size control, 00: 512, 01: 256, 10: 128 11: 96 */
ge2d_gen_cfg.fifo_size = 0;
/* fifo burst control, 00: 24x64, 01: 32x64
* 10: 48x64, 11:64x64
*/
ge2d_gen_cfg.burst_ctrl = 0;
ge2d_set_gen(&ge2d_gen_cfg);
}
static int ge2d_clk_config(bool enable)
{
if (ge2d_clk == NULL)
return -1;
if (enable)
clk_prepare_enable(ge2d_clk);
else
clk_disable_unprepare(ge2d_clk);
return 0;
}
void ge2d_pwr_config(bool enable)
{
int i, table_size;
@@ -128,34 +159,29 @@ void ge2d_pwr_config(bool enable)
if (ge2d_meson_dev.has_self_pwr) {
if (enable) {
power_table = ge2d_meson_dev.poweron_table->power_btale;
power_table = ge2d_meson_dev.poweron_table->power_table;
table_size = ge2d_meson_dev.poweron_table->table_size;
} else {
power_table =
ge2d_meson_dev.poweroff_table->power_btale;
ge2d_meson_dev.poweroff_table->power_table;
table_size = ge2d_meson_dev.poweroff_table->table_size;
}
for (i = 0; i < table_size; i++) {
tmp = power_table[i];
ge2d_set_bus_bits(tmp.bus_type, tmp.reg, tmp.val,
ge2d_set_pwr_tbl_bits(tmp.table_type, tmp.reg, tmp.val,
tmp.start, tmp.len);
if (tmp.udelay > 0)
udelay(tmp.udelay);
}
}
}
static int ge2d_clk_config(bool enable)
{
if (ge2d_clk == NULL)
return -1;
ge2d_clk_config(enable);
if (enable) {
clk_prepare_enable(ge2d_clk);
} else {
clk_disable_unprepare(ge2d_clk);
ge2d_soft_rst();
ge2d_pre_init();
}
return 0;
}
static int get_queue_member_count(struct list_head *head)
@@ -533,12 +559,12 @@ static int ge2d_monitor_thread(void *data)
/* setup current_wq here. */
while (ge2d_manager.process_queue_state != GE2D_PROCESS_QUEUE_STOP) {
ret = down_interruptible(&manager->event.cmd_in_sem);
ge2d_clk_config(true);
ge2d_pwr_config(true);
while ((manager->current_wq =
get_next_work_queue(manager)) != NULL)
ge2d_process_work_queue(manager->current_wq);
if (!ge2d_dump_reg_enable)
ge2d_clk_config(false);
ge2d_pwr_config(false);
}
ge2d_log_info("exit ge2d_monitor_thread\n");
return 0;
@@ -2641,8 +2667,6 @@ EXPORT_SYMBOL(destroy_ge2d_work_queue);
int ge2d_wq_init(struct platform_device *pdev,
int irq, struct clk *clk)
{
struct ge2d_gen_s ge2d_gen_cfg;
ge2d_manager.pdev = pdev;
ge2d_irq = irq;
ge2d_clk = clk;
@@ -2671,21 +2695,7 @@ int ge2d_wq_init(struct platform_device *pdev,
ge2d_manager.buffer = ge2d_dma_buffer_create();
if (!ge2d_manager.buffer)
return -1;
ge2d_clk_config(true);
ge2d_soft_rst();
ge2d_gen_cfg.interrupt_ctrl = 0x02;
ge2d_gen_cfg.dp_on_cnt = 0;
ge2d_gen_cfg.dp_off_cnt = 0;
ge2d_gen_cfg.dp_onoff_mode = 0;
ge2d_gen_cfg.vfmt_onoff_en = 0;
/* fifo size control, 00: 512, 01: 256, 10: 128 11: 96 */
ge2d_gen_cfg.fifo_size = 0;
/* fifo burst control, 00: 24x64, 01: 32x64
* 10: 48x64, 11:64x64
*/
ge2d_gen_cfg.burst_ctrl = 0;
ge2d_set_gen(&ge2d_gen_cfg);
ge2d_clk_config(false);
if (ge2d_start_monitor()) {
ge2d_log_err("ge2d create thread error\n");
return -1;

7
include/linux/amlogic/media/ge2d/ge2d.h
View File

@@ -1036,10 +1036,13 @@ enum {
CBUS_BASE,
AOBUS_BASE,
HIUBUS_BASE,
GEN_PWR_SLEEP0,
GEN_PWR_ISO0,
MEM_PD_REG0,
};
struct ge2d_ctrl_s {
unsigned int bus_type;
unsigned int table_type;
unsigned int reg;
unsigned int val;
unsigned int start;
@@ -1049,7 +1052,7 @@ struct ge2d_ctrl_s {
struct ge2d_power_table_s {
unsigned int table_size;
struct ge2d_ctrl_s *power_btale;
struct ge2d_ctrl_s *power_table;
};
struct ge2d_device_data_s {