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synced 2026-06-09 04:10:18 +09:00
edit ft_test.c for ft test
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@@ -52,41 +52,31 @@ REVISION 0.01
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#include <linux/io.h>
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#include <linux/gpio.h>
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//#include <mach/ddr.h>
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#if 0
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#include "rk_pm_tests.h"
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#include "clk_rate.h"
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#include "clk_volt.h"
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#include "maxfreq.h"
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#include "freq_limit.h"
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#include "cpu_usage.h"
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#include "rk_suspend_test.h"
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#include "clk_auto_volt.h"
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#include "delayline.h"
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#endif
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#define ft_printk(fmt, arg...) \
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printk(KERN_EMERG fmt, ##arg)
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//KERN_DEBUG
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#define ft_printk_dbg(fmt, arg...) \
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printk(KERN_EMERG fmt, ##arg)
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printk(KERN_WARNING fmt, ##arg)
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//KERN_DEBUG
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#define ft_printk_info(fmt, arg...) \
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printk(KERN_EMERG fmt, ##arg)
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printk(KERN_WARNING fmt, ##arg)
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static unsigned long arm_setup2_rate=1608*1000*1000;
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static unsigned long arm_setup2_rate=1608*1000*1000;//1608*1000*1000;
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static int setup2_flag=0;
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//0-15 :test setup1
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#define CPU_TST_L1 (1<<0)
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#define CPU_TST_L2 (1<<1)
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#define CPU_TST_SETUP1_MSK (0xffff)
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//16-31 :test setup2
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#define CPU_TST_L1_STP2 (1<<16)
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#define CPU_TST_L2_STP2 (1<<17)
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#define CPU_TST_SETUP2_MSK (0xffff0000)
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static DEFINE_PER_CPU(int, cpu_tst_flags)=(CPU_TST_L1|CPU_TST_L2|CPU_TST_L1_STP2|CPU_TST_L2_STP2);
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@@ -110,9 +100,6 @@ void ft_cpu_l1_test(u32 cnt)
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u32 cpu = smp_processor_id();
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int test_array[100];
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int i;
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ft_printk_dbg("l1_test cpu=%d start\n",cpu);
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for(i=0;i<cnt;i++)
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{
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test_cpus_l1(&test_array[0]);
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@@ -125,9 +112,7 @@ void ft_cpu_l1_test(u32 cnt)
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barrier();
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}
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ft_printk_dbg("l1_test cpu=%d end\n",cpu);
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}
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@@ -141,6 +126,9 @@ int test_cpus_l2(char *data_s,char *data_e,u32 data);
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#define BUF_SIZE (l1_DCACHE_SIZE_M*4)// tst buf size
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#define BUF_SIZE_M (l1_DCACHE_SIZE_M*4)// tst buf size
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static char memtest_buf0[BUF_SIZE] __attribute__((aligned(4096)));
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#if (NR_CPUS>=2)
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static char memtest_buf1[BUF_SIZE] __attribute__((aligned(4096)));
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@@ -175,6 +163,11 @@ static char *l2_test_buf[NR_CPUS]=
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};
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static char *l2_test_mbuf[NR_CPUS]=
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{
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NULL,
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};
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int ft_test_cpus_l2(char *data_s,u32 buf_size,u32 cnt)
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{
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int i,j;
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@@ -187,13 +180,82 @@ int ft_test_cpus_l2(char *data_s,u32 buf_size,u32 cnt)
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ret=test_cpus_l2(data_s+i,data_s+i+test_size,0xffffffff);
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if(ret)
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return -1;
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{
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return 0xff;
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}
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ret=test_cpus_l2(data_s+i,data_s+i+test_size,0);
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if(ret)
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return -1;
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{
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return 0x1;
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}
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ret=test_cpus_l2(data_s+i,data_s+i+test_size,0xaaaaaaaa);
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if(ret)
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return -1;
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{
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return 0xaa;
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}
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i+=test_size;
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if((i+test_size)>buf_size)
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break;
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}
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}
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return 0;
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}
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int test_cpus_l2_m(char *data_s,char *data_d,int size,char data)
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{
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char *start;
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char *data_end=data_s+size;
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for(start=data_s;start<data_end;start++)
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{
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*start=data;
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barrier();
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}
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memcpy(data_d,data_s,size);
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data_end=data_d+size;
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for(start=data_d;start<data_end;start++)
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{
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if(*start!=data)
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{
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barrier();
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return -1;
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}
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}
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return 0;
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}
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int ft_test_cpus_l2_m(char *data_s,char *data_d,u32 buf_size,u32 cnt)
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{
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int i,j;
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int ret=0;
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int test_size=l1_DCACHE_SIZE;
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for(j=0;j<cnt;j++)
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{
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for(i=0;i<buf_size;)
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{
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ret=test_cpus_l2_m(data_s+i,data_d+i,test_size,0xff);
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if(ret)
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{
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return 0xff;
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}
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ret=test_cpus_l2_m(data_s+i,data_d+i,test_size,0);
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if(ret)
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{
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return 0x1;
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}
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ret=test_cpus_l2_m(data_s+i,data_d+i,test_size,0xaa);
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if(ret)
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{
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return 0xaa;
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}
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i+=test_size;
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@@ -212,39 +274,72 @@ void ft_cpu_test_step1(void)
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{
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u32 temp=-1;
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u32 cpu = smp_processor_id();
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int i;
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ft_printk_dbg("test step1 cpu=%d start\n",cpu);
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//arm rate init
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ft_cpu_l1_test(10);
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ft_cpu_l1_test(15);
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per_cpu(cpu_tst_flags, cpu)&=~CPU_TST_L1;
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temp=ft_test_cpus_l2(l2_test_buf[cpu],sizeof(char)*BUF_SIZE,18);
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temp=ft_test_cpus_l2(l2_test_buf[cpu],sizeof(char)*BUF_SIZE,20);
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if(!temp)
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per_cpu(cpu_tst_flags, cpu)&=~CPU_TST_L2;
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ft_printk_dbg("test step1 cpu=%d end\n",cpu);
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up(&sem);
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}
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/*************************************hight rate tst case**************************************/
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void ft_cpu_test_step2(void)
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{
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u32 temp=-1;
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u32 cpu = smp_processor_id();
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int i;
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ft_printk_dbg("test step2 cpu=%d start\n",cpu);
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//arm rate init
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ft_cpu_l1_test(10*2);
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ft_cpu_l1_test(10*1);
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per_cpu(cpu_tst_flags, cpu)&=~CPU_TST_L1_STP2;
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temp=ft_test_cpus_l2(l2_test_buf[cpu],sizeof(char)*BUF_SIZE,20*2);
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ft_printk_dbg("ft test cpus l2 begin\n");
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ft_printk(".");
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temp=ft_test_cpus_l2(l2_test_buf[cpu],sizeof(char)*BUF_SIZE,10*1);
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if(temp)
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ft_printk_info("******cpu=%d,l2,ret=%x\n",cpu,temp);
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if(l2_test_mbuf[cpu])
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{
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temp|=ft_test_cpus_l2_m(l2_test_mbuf[cpu],l2_test_buf[cpu],sizeof(char)*BUF_SIZE_M,12*1);
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if(temp)
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ft_printk_info("******cpu=%d,l2m,ret=%x\n",cpu,temp);
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}
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if(!temp)
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per_cpu(cpu_tst_flags, cpu)&=~CPU_TST_L2_STP2;
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up(&sem_step2);
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ft_printk(".");
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for(i=0;i<1500;i++)
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{
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usleep_range(200, 200);//200
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if( i%500 == 0)
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ft_printk(".");
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}
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ft_printk(".");
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ft_printk_dbg("test step2 cpu=%d end\n",cpu);
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up(&sem_step2);
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}
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// tst thread callback for per cpu
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static int ft_cpu_test(void *data)
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{
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@@ -253,7 +348,7 @@ static int ft_cpu_test(void *data)
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ft_cpu_test_step1();
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//arm hight rate
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wait_event_freezable(per_cpu(wait_rate, cpu), (clk_get_rate(arm_clk)==arm_setup2_rate)||kthread_should_stop());
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wait_event_freezable(per_cpu(wait_rate, cpu), /*(clk_get_rate(arm_clk)==arm_setup2_rate)*/(setup2_flag==1)||kthread_should_stop());
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ft_cpu_test_step2();
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@@ -265,10 +360,22 @@ static int __init rk_ft_tests_init(void)
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{
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int cpu, ret = 0;
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struct sched_param param = { .sched_priority = 0 };
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char *buf;
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arm_clk=clk_get(NULL, "cpu");
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if (IS_ERR(arm_clk))
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arm_setup2_rate=0;
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for (cpu = 0; cpu < NR_CPUS; cpu++) {
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l2_test_mbuf[cpu]=NULL;
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buf = kmalloc(BUF_SIZE_M, GFP_KERNEL);
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if (buf)
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{
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l2_test_mbuf[cpu]=buf;
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//printk("xdbg but=%x\n",(void*)buf);
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}
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}
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for (cpu = 0; cpu < NR_CPUS; cpu++) {
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init_waitqueue_head(&per_cpu(wait_rate, cpu));
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}
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@@ -293,24 +400,31 @@ static int rk_ft_tests_over(void)
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for (cpu = 0; cpu < NR_CPUS; cpu++)
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down(&sem);
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ft_printk_info("arm=%lu,ddr=%lu\n",clk_get_rate(arm_clk),clk_get_rate(clk_get(NULL, "ddr")));
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ft_printk("setup1 arm rate=%lu,ddr=%lu\n",clk_get_rate(arm_clk),clk_get_rate(clk_get(NULL, "ddr")));
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ret=per_cpu(cpu_tst_flags, 0)|per_cpu(cpu_tst_flags, 1)|per_cpu(cpu_tst_flags, 2)|per_cpu(cpu_tst_flags, 3);
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ret&=0xffff;// test setup1
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ft_printk_dbg("per cpu setup1=%x\n",ret);
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ret=0;
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for (cpu = 0; cpu < NR_CPUS; cpu++)
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{
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ret|=per_cpu(cpu_tst_flags, cpu);
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ft_printk_dbg("per cpu setup1,cpu%d=%x,\n",cpu,per_cpu(cpu_tst_flags, cpu)&CPU_TST_SETUP1_MSK);
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}
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ret&=CPU_TST_SETUP1_MSK;// test setup1
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if(ret)
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{
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ft_printk("#R01KERNEL*\n");
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while(1);
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}
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else
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ft_printk("#R00KERNEL*\n");
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if(arm_setup2_rate)
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{
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{
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setup2_flag=1;
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ft_printk("#SHSPEED*\n");
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#if 0
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#if 1
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// send msg to ctr board to up the volt
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gpio_direction_output(FT_CLIENT_READY_PIN, GPIO_HIGH);
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gpio_direction_input(FT_CLIENT_IDLE_PIN);
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@@ -331,12 +445,19 @@ static int rk_ft_tests_over(void)
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for (cpu = 0; cpu < NR_CPUS; cpu++)
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down(&sem_step2);
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ft_printk_info("arm=%lu,ddr=%lu\n",clk_get_rate(arm_clk),clk_get_rate(clk_get(NULL, "ddr")));
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ft_printk("setup2 arm=%lu,ddr=%lu\n",clk_get_rate(arm_clk),clk_get_rate(clk_get(NULL, "ddr")));
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ret=per_cpu(cpu_tst_flags, 0)|per_cpu(cpu_tst_flags, 1)|per_cpu(cpu_tst_flags, 2)|per_cpu(cpu_tst_flags, 3);
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ret&=(0xffff<<16);// test setup1
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ret=0;
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for (cpu = 0; cpu < NR_CPUS; cpu++)
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{
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ret|=per_cpu(cpu_tst_flags, cpu);
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ft_printk_dbg("per cpu setup2,cpu%d=%x,\n",cpu,per_cpu(cpu_tst_flags, cpu)&CPU_TST_SETUP2_MSK);
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}
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ft_printk_dbg("per cpu setup2=%x\n",ret);
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ret&=CPU_TST_SETUP2_MSK;// test setup2
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ft_printk_dbg("per cpu setup2=%x,cpu0=%x,cpu1=%x,cpu2=%x,cpu3=%x\n",ret,per_cpu(cpu_tst_flags, 0),
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per_cpu(cpu_tst_flags, 1),per_cpu(cpu_tst_flags, 2),per_cpu(cpu_tst_flags, 3));
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if(ret)
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ft_printk("#R01HSPEED*\n");
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