dvb: sm1 bringup add one asyncfifo [2/2]

PD#SWPL-5403

Problem:
demux add one asyncfifo, need compatile

Solution:
demux compatile with previous code.

Verify:
verify at sm1

Change-Id: Iea0b7b5f69d3200062b9e757f2712b98926fb3b9
Signed-off-by: Chuangcheng Peng <chuangcheng.peng@amlogic.com>
Signed-off-by: Luan Yuan <luan.yuan@amlogic.com>
This commit is contained in:
Chuangcheng Peng
2019-03-22 18:08:48 +08:00
committed by Luan Yuan
parent 4c4f748a0f
commit bbc4309101
7 changed files with 185 additions and 3 deletions

View File

@@ -235,7 +235,7 @@
#size-cells=<1>;
ranges;
io_cbus_base {
reg = <0xffd00000 0x26000>;
reg = <0xffd00000 0x26fff>;
};
io_apb_base {
reg = <0xffe01000 0x7f000>;

View File

@@ -718,6 +718,48 @@
status = "disabled";
};
/* Audio Related end */
dvb {
compatible = "amlogic, dvb";
dev_name = "dvb";
status = "okay";
// fe0_mode = "internal";
// fe0_tuner = <&tuner>;
/*"parallel","serial","disable"*/
// ts2 = "parallel";
// ts2_control = <0>;
// ts2_invert = <0>;
interrupts = <0 23 1
0 5 1
0 53 1
0 19 1
0 25 1
0 18 1
0 24 1>;
interrupt-names = "demux0_irq",
"demux1_irq",
"demux2_irq",
"dvr0_irq",
"dvr1_irq",
"dvrfill0_fill",
"dvrfill1_flush";
clocks = <&clkc CLKID_DEMUX
&clkc CLKID_AHB_ARB0
&clkc CLKID_DOS_PARSER>;
clock-names = "demux", "ahbarb0", "uparsertop";
};
tuner: tuner {
compatible = "amlogic, tuner";
status = "okay";
tuner_name = "mxl661_tuner";
tuner_i2c_adap = <&i2c1>;
tuner_i2c_addr = <0x60>;
tuner_xtal = <0>; /* 0: 16MHz, 1: 24MHz */
tuner_xtal_mode = <0>;
/* NO_SHARE_XTAL(0)
* SLAVE_XTAL_SHARE(1)
*/
tuner_xtal_cap = <30>; /* when tuner_xtal_mode = 1, set 25 */
};
p_tsensor: p_tsensor@ff634800 {
compatible = "amlogic, r1p1-tsensor";

View File

@@ -718,6 +718,48 @@
status = "disabled";
};
/* Audio Related end */
dvb {
compatible = "amlogic, dvb";
dev_name = "dvb";
status = "okay";
// fe0_mode = "internal";
// fe0_tuner = <&tuner>;
/*"parallel","serial","disable"*/
// ts2 = "parallel";
// ts2_control = <0>;
// ts2_invert = <0>;
interrupts = <0 23 1
0 5 1
0 53 1
0 19 1
0 25 1
0 18 1
0 24 1>;
interrupt-names = "demux0_irq",
"demux1_irq",
"demux2_irq",
"dvr0_irq",
"dvr1_irq",
"dvrfill0_fill",
"dvrfill1_flush";
clocks = <&clkc CLKID_DEMUX
&clkc CLKID_AHB_ARB0
&clkc CLKID_DOS_PARSER>;
clock-names = "demux", "ahbarb0", "uparsertop";
};
tuner: tuner {
compatible = "amlogic, tuner";
status = "okay";
tuner_name = "mxl661_tuner";
tuner_i2c_adap = <&i2c1>;
tuner_i2c_addr = <0x60>;
tuner_xtal = <0>; /* 0: 16MHz, 1: 24MHz */
tuner_xtal_mode = <0>;
/* NO_SHARE_XTAL(0)
* SLAVE_XTAL_SHARE(1)
*/
tuner_xtal_cap = <30>; /* when tuner_xtal_mode = 1, set 25 */
};
p_tsensor: p_tsensor@ff634800 {
compatible = "amlogic, r1p1-tsensor";

View File

@@ -235,7 +235,7 @@
#size-cells=<2>;
ranges;
io_cbus_base {
reg = <0x0 0xffd00000 0x0 0x26000>;
reg = <0x0 0xffd00000 0x0 0x26fff>;
};
io_apb_base {
reg = <0x0 0xffe01000 0x0 0x7f000>;

View File

@@ -716,6 +716,48 @@
status = "disabled";
};
/* Audio Related end */
dvb {
compatible = "amlogic, dvb";
dev_name = "dvb";
status = "okay";
// fe0_mode = "internal";
// fe0_tuner = <&tuner>;
/*"parallel","serial","disable"*/
// ts2 = "parallel";
// ts2_control = <0>;
// ts2_invert = <0>;
interrupts = <0 23 1
0 5 1
0 53 1
0 19 1
0 25 1
0 18 1
0 24 1>;
interrupt-names = "demux0_irq",
"demux1_irq",
"demux2_irq",
"dvr0_irq",
"dvr1_irq",
"dvrfill0_fill",
"dvrfill1_flush";
clocks = <&clkc CLKID_DEMUX
&clkc CLKID_AHB_ARB0
&clkc CLKID_DOS_PARSER>;
clock-names = "demux", "ahbarb0", "uparsertop";
};
tuner: tuner {
compatible = "amlogic, tuner";
status = "okay";
tuner_name = "mxl661_tuner";
tuner_i2c_adap = <&i2c1>;
tuner_i2c_addr = <0x60>;
tuner_xtal = <0>; /* 0: 16MHz, 1: 24MHz */
tuner_xtal_mode = <0>;
/* NO_SHARE_XTAL(0)
* SLAVE_XTAL_SHARE(1)
*/
tuner_xtal_cap = <30>; /* when tuner_xtal_mode = 1, set 25 */
};
p_tsensor: p_tsensor@ff634800 {

View File

@@ -716,6 +716,48 @@
status = "disabled";
};
/* Audio Related end */
dvb {
compatible = "amlogic, dvb";
dev_name = "dvb";
status = "okay";
// fe0_mode = "internal";
// fe0_tuner = <&tuner>;
/*"parallel","serial","disable"*/
// ts2 = "parallel";
// ts2_control = <0>;
// ts2_invert = <0>;
interrupts = <0 23 1
0 5 1
0 53 1
0 19 1
0 25 1
0 18 1
0 24 1>;
interrupt-names = "demux0_irq",
"demux1_irq",
"demux2_irq",
"dvr0_irq",
"dvr1_irq",
"dvrfill0_fill",
"dvrfill1_flush";
clocks = <&clkc CLKID_DEMUX
&clkc CLKID_AHB_ARB0
&clkc CLKID_DOS_PARSER>;
clock-names = "demux", "ahbarb0", "uparsertop";
};
tuner: tuner {
compatible = "amlogic, tuner";
status = "okay";
tuner_name = "mxl661_tuner";
tuner_i2c_adap = <&i2c1>;
tuner_i2c_addr = <0x60>;
tuner_xtal = <0>; /* 0: 16MHz, 1: 24MHz */
tuner_xtal_mode = <0>;
/* NO_SHARE_XTAL(0)
* SLAVE_XTAL_SHARE(1)
*/
tuner_xtal_cap = <30>; /* when tuner_xtal_mode = 1, set 25 */
};
p_tsensor: p_tsensor@ff634800 {
compatible = "amlogic, r1p1-tsensor";

View File

@@ -82,12 +82,26 @@ enum ca_cw_type {
CA_CW_AES_EVEN,
CA_CW_AES_ODD,
CA_CW_AES_EVEN_IV,
CA_CW_AES_ODD_IV
CA_CW_AES_ODD_IV,
CA_CW_DES_EVEN,
CA_CW_DES_ODD,
CA_CW_SM4_EVEN,
CA_CW_SM4_ODD,
CA_CW_SM4_EVEN_IV,
CA_CW_SM4_ODD_IV,
CA_CW_TYPE_MAX
};
enum ca_dsc_mode {
CA_DSC_CBC = 1,
CA_DSC_ECB,
CA_DSC_IDSA
};
struct ca_descr_ex {
unsigned int index;
enum ca_cw_type type;
enum ca_dsc_mode mode;
int flags;
#define CA_CW_FROM_KL 1
unsigned char cw[16];