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ARM: dts: at91: sama7g5: add nodes for video capture
Add node for the XISC (eXtended Image Sensor Controller) and CSI2DC (csi2 demux controller). These nodes represent the top level of the video capture hardware pipeline and are directly connected in hardware. Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com> Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/20220503095127.48710-4-eugen.hristev@microchip.com
This commit is contained in:
committed by
Claudiu Beznea
parent
1b929c02af
commit
bbc9db2da8
@@ -516,6 +516,57 @@
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status = "disabled";
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};
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csi2dc: csi2dc@e1404000 {
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compatible = "microchip,sama7g5-csi2dc";
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reg = <0xe1404000 0x500>;
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clocks = <&pmc PMC_TYPE_PERIPHERAL 34>, <&xisc>;
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clock-names = "pclk", "scck";
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assigned-clocks = <&xisc>;
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assigned-clock-rates = <266000000>;
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status = "disabled";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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csi2dc_in: endpoint {
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};
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};
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port@1 {
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reg = <1>;
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csi2dc_out: endpoint {
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bus-width = <14>;
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hsync-active = <1>;
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vsync-active = <1>;
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remote-endpoint = <&xisc_in>;
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};
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};
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};
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};
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xisc: xisc@e1408000 {
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compatible = "microchip,sama7g5-isc";
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reg = <0xe1408000 0x2000>;
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interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&pmc PMC_TYPE_PERIPHERAL 56>;
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clock-names = "hclock";
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#clock-cells = <0>;
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clock-output-names = "isc-mck";
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status = "disabled";
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port {
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xisc_in: endpoint {
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bus-type = <5>; /* Parallel */
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bus-width = <14>;
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hsync-active = <1>;
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vsync-active = <1>;
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remote-endpoint = <&csi2dc_out>;
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};
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};
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};
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pwm: pwm@e1604000 {
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compatible = "microchip,sama7g5-pwm", "atmel,sama5d2-pwm";
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reg = <0xe1604000 0x4000>;
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