osd: osd suspend fail issue

PD#164508: osd: suspend fail issue

Change-Id: I673a907bea2abf37d09967ef0e0a924806ce6fae
Signed-off-by: pengcheng chen <pengcheng.chen@amlogic.com>
This commit is contained in:
pengcheng chen
2018-05-02 13:19:31 +08:00
committed by Yixun Lan
parent caa103fec4
commit bc0b7dbd2f
3 changed files with 28 additions and 0 deletions

View File

@@ -642,10 +642,12 @@ struct hw_para_s {
u32 color_key[HW_OSD_COUNT];
u32 color_key_enable[HW_OSD_COUNT];
u32 enable[HW_OSD_COUNT];
u32 enable_save[HW_OSD_COUNT];
u32 powered[HW_OSD_COUNT];
u32 reg_status_save;
u32 reg_status_save1;
u32 reg_status_save2;
u32 reg_status_save3;
#ifdef FIQ_VSYNC
bridge_item_t fiq_handle_item;
#endif

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@@ -7412,15 +7412,29 @@ void osd_suspend_hw(void)
osd_reg_clr_mask(VPP_MISC, OSD_RELATIVE_BITS);
/* VSYNCOSD_CLR_MPEG_REG_MASK(VPP_MISC, OSD_RELATIVE_BITS); */
} else {
int i = 0;
for (i = 0; i < osd_hw.osd_meson_dev.osd_count; i++) {
if (osd_hw.enable[i]) {
osd_hw.enable_save[i] = ENABLE;
osd_hw.enable[i] = DISABLE;
osd_hw.reg[OSD_ENABLE]
.update_func(i);
} else
osd_hw.enable_save[i] = DISABLE;
}
osd_hw.reg_status_save =
osd_reg_read(VIU_OSD_BLEND_CTRL);
osd_hw.reg_status_save1 =
osd_reg_read(OSD1_BLEND_SRC_CTRL);
osd_hw.reg_status_save2 =
osd_reg_read(OSD2_BLEND_SRC_CTRL);
osd_hw.reg_status_save3 =
osd_reg_read(VPP_RDARB_REQEN_SLV);
osd_reg_clr_mask(VIU_OSD_BLEND_CTRL, 0xf0000);
osd_reg_clr_mask(OSD1_BLEND_SRC_CTRL, 0xf0f);
osd_reg_clr_mask(OSD2_BLEND_SRC_CTRL, 0xf0f);
osd_reg_clr_mask(VPP_RDARB_REQEN_SLV, 0xffff);
}
osd_log_info("osd_suspended\n");
@@ -7454,12 +7468,23 @@ void osd_resume_hw(void)
}
notify_to_amvideo();
} else {
int i = 0;
for (i = 0; i < osd_hw.osd_meson_dev.osd_count; i++) {
if (osd_hw.enable_save[i]) {
osd_hw.enable[i] = ENABLE;
osd_hw.reg[OSD_ENABLE]
.update_func(i);
}
}
osd_reg_set_mask(VIU_OSD_BLEND_CTRL,
osd_hw.reg_status_save);
osd_reg_set_mask(OSD1_BLEND_SRC_CTRL,
osd_hw.reg_status_save1);
osd_reg_set_mask(OSD2_BLEND_SRC_CTRL,
osd_hw.reg_status_save2);
osd_reg_set_mask(VPP_RDARB_REQEN_SLV,
osd_hw.reg_status_save3);
}
osd_log_info("osd_resumed\n");
}

View File

@@ -1414,5 +1414,6 @@
#define VPP_POST_BLEND_BLEND_DUMMY_DATA 0x3968
#define VPP_POST_BLEND_DUMMY_ALPHA 0x3969
#define VPP_RDARB_MODE 0x3978
#define VPP_RDARB_REQEN_SLV 0x3979
#define VPU_RDARB_MODE_L2C1 0x279d
#endif