arm64: dts: rockchip: add dis_u2_susphy_quirk for RK3566 OTG

The RK3566 OTG port supports USB 2.0 only, and make the internal
2.0 utmi clock to be routed as the 3.0 (pipe) clock. We find
that if the ACLK_PIPE is set to 400MHz, the DWC3 controller may
suspend the USB 2.0 PHY due to some unknown reason during usb
enumeration, and the utmi clock will be gated off, it makes the
DWC3 controller to work abnormally.

This patch adds dis_u2_susphy_quirk for RK3566 OTG to avoid USB
2.0 PHY enter suspend mode if the suspend conditions of DWC3
controller are valid. And the USB 2.0 PHY suspend mode can be
controlled in the PHY driver.

Change-Id: I5b00e8da8e5865d78cd706fe00476773aef8f8d5
Signed-off-by: William Wu <william.wu@rock-chips.com>

arch/arm64/boot/dts/rockchip/rk3566.dtsi

@@ -53,6 +53,7 @@
 	phy-names = "usb2-phy";
 	extcon = <&usb2phy0>;
 	maximum-speed = "high-speed";
+	snps,dis_u2_susphy_quirk;
 };
 
 /delete-node/ &gmac0_clkin;