mirror of
https://github.com/hardkernel/linux.git
synced 2026-06-06 19:08:57 +09:00
arm64: dts: rockchip: add rk3588/rk3588s evb Board
Change-Id: I32134b86f3b8219e7422e8367073d34d424e6811 Signed-off-by: Wu Liangqing <wlq@rock-chips.com>
This commit is contained in:
Wu Liangqing
@@ -85,4 +85,13 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-nvr-demo-v10-linux.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-nvr-demo-v10-linux-spi-nand.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-nvr-demo-v12-linux.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-nvr-demo-v12-linux-spi-nand.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-evb1-lp4-v10.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-evb2-lp4-v10.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-evb3-lp5-v10.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-evb4-lp4-v10.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-evb5-lp4-v10.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-evb6-lp4-v10.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-evb1-lp4x-v10.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-evb2-lp5-v10.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-evb3-lp4x-v10.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-evb4-lp4x-v10.dtb
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37
arch/arm64/boot/dts/rockchip/rk3588-android.dtsi
Normal file
37
arch/arm64/boot/dts/rockchip/rk3588-android.dtsi
Normal file
@@ -0,0 +1,37 @@
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2021 Rockchip Electronics Co., Ltd.
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*
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*/
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/ {
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chosen: chosen {
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bootargs = "earlycon=uart8250,mmio32,0xfe660000 console=ttyFIQ0";
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};
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fiq-debugger {
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compatible = "rockchip,fiq-debugger";
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rockchip,serial-id = <2>;
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rockchip,wake-irq = <0>;
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/* If enable uart uses irq instead of fiq */
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rockchip,irq-mode-enable = <1>;
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rockchip,baudrate = <1500000>; /* Only 115200 and 1500000 */
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interrupts = <GIC_SPI 252 IRQ_TYPE_LEVEL_LOW>;
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pinctrl-names = "default";
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pinctrl-0 = <&uart2m0_xfer>;
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status = "okay";
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};
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debug: debug@81004000 {
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compatible = "rockchip,debug";
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reg = <0x0 0x81004000 0x0 0x1000>,
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<0x0 0x81005000 0x0 0x1000>,
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<0x0 0x81006000 0x0 0x1000>,
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<0x0 0x81007000 0x0 0x1000>,
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<0x0 0x81024000 0x0 0x1000>,
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<0x0 0x81025000 0x0 0x1000>,
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<0x0 0x81026000 0x0 0x1000>,
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<0x0 0x81027000 0x0 0x1000>;
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};
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};
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39
arch/arm64/boot/dts/rockchip/rk3588-evb.dtsi
Normal file
39
arch/arm64/boot/dts/rockchip/rk3588-evb.dtsi
Normal file
@@ -0,0 +1,39 @@
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2021 Rockchip Electronics Co., Ltd.
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*
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*/
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#include "rk3588s-evb.dtsi"
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&u2phy1 {
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status = "okay";
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};
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&u2phy1_otg {
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status = "okay";
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};
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&usb_host1_ehci {
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status = "okay";
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};
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&usbdp_phy1 {
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status = "okay";
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};
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&usbdp_phy1_dp {
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status = "okay";
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};
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&usbdp_phy1_u3 {
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status = "okay";
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};
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&usbdrd3_1 {
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status = "okay";
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};
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&usbdrd_dwc3_1 {
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status = "okay";
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};
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15
arch/arm64/boot/dts/rockchip/rk3588-evb1-lp4-v10.dts
Normal file
15
arch/arm64/boot/dts/rockchip/rk3588-evb1-lp4-v10.dts
Normal file
@@ -0,0 +1,15 @@
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2021 Rockchip Electronics Co., Ltd.
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*
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*/
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/dts-v1/;
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#include "rk3588-evb1-lp4.dtsi"
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#include "rk3588-android.dtsi"
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/ {
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model = "Rockchip RK3588 EVB1 LP4 V10 Board";
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compatible = "rockchip,rk3588-evb1-lp4-v10", "rockchip,rk3588";
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};
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109
arch/arm64/boot/dts/rockchip/rk3588-evb1-lp4.dtsi
Normal file
109
arch/arm64/boot/dts/rockchip/rk3588-evb1-lp4.dtsi
Normal file
@@ -0,0 +1,109 @@
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2021 Rockchip Electronics Co., Ltd.
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*
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*/
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#include "dt-bindings/usb/pd.h"
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#include "rk3588.dtsi"
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#include "rk3588-evb.dtsi"
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/ {
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vbus5v0_typec: vbus-typec-regulator {
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compatible = "regulator-fixed";
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regulator-name = "vbus5v0_typec";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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enable-active-high;
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gpio = <&gpio4 RK_PD0 GPIO_ACTIVE_HIGH>;
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vin-supply = <&vcc5v0_usb>;
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pinctrl-names = "default";
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pinctrl-0 = <&typec5v_pwren>;
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};
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};
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&i2c2 {
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status = "okay";
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usbc0: fusb302@22 {
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compatible = "fcs,fusb302";
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reg = <0x22>;
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interrupt-parent = <&gpio3>;
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interrupts = <RK_PB4 IRQ_TYPE_LEVEL_LOW>;
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vbus-supply = <&vbus5v0_typec>;
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status = "okay";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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usbc0_role_sw: endpoint@0 {
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remote-endpoint = <&dwc3_0_role_switch>;
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};
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};
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};
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usb_con: connector {
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compatible = "usb-c-connector";
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label = "USB-C";
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data-role = "dual";
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power-role = "dual";
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try-power-role = "sink";
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op-sink-microwatt = <1000000>;
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sink-pdos =
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<PDO_FIXED(5000, 1000, PDO_FIXED_USB_COMM)>;
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source-pdos =
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<PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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usbc0_orien_sw: endpoint {
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remote-endpoint = <&usbdp_phy0_orientation_switch>;
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};
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};
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};
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};
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};
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};
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&pinctrl {
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usb-typec {
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usbc0_int: usbc0-int {
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rockchip,pins = <3 RK_PB4 RK_FUNC_GPIO &pcfg_pull_up>;
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};
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typec5v_pwren: typec5v-pwren {
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rockchip,pins = <4 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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};
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};
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&usbdp_phy0 {
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orientation-switch;
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port {
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#address-cells = <1>;
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#size-cells = <0>;
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usbdp_phy0_orientation_switch: endpoint@0 {
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reg = <0>;
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remote-endpoint = <&usbc0_orien_sw>;
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};
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};
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};
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&usbdrd_dwc3_0 {
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usb-role-switch;
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port {
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#address-cells = <1>;
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#size-cells = <0>;
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dwc3_0_role_switch: endpoint@0 {
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reg = <0>;
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remote-endpoint = <&usbc0_role_sw>;
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};
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};
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};
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@@ -6,7 +6,8 @@
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/dts-v1/;
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#include "rk3588.dtsi"
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#include "rk3588-evb2-lp4.dtsi"
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#include "rk3588-android.dtsi"
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/ {
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model = "Rockchip RK3588 EVB2 LP4 V10 Board";
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9
arch/arm64/boot/dts/rockchip/rk3588-evb2-lp4.dtsi
Normal file
9
arch/arm64/boot/dts/rockchip/rk3588-evb2-lp4.dtsi
Normal file
@@ -0,0 +1,9 @@
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2021 Rockchip Electronics Co., Ltd.
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*
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*/
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#include "rk3588.dtsi"
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#include "rk3588-evb.dtsi"
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15
arch/arm64/boot/dts/rockchip/rk3588-evb3-lp5-v10.dts
Normal file
15
arch/arm64/boot/dts/rockchip/rk3588-evb3-lp5-v10.dts
Normal file
@@ -0,0 +1,15 @@
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2021 Rockchip Electronics Co., Ltd.
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*
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*/
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/dts-v1/;
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#include "rk3588-evb3-lp5.dtsi"
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#include "rk3588-android.dtsi"
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/ {
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model = "Rockchip RK3588 EVB3 LP5 V10 Board";
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compatible = "rockchip,rk3588-evb3-lp5-v10", "rockchip,rk3588";
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};
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9
arch/arm64/boot/dts/rockchip/rk3588-evb3-lp5.dtsi
Normal file
9
arch/arm64/boot/dts/rockchip/rk3588-evb3-lp5.dtsi
Normal file
@@ -0,0 +1,9 @@
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2021 Rockchip Electronics Co., Ltd.
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*
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*/
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#include "rk3588.dtsi"
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#include "rk3588-evb.dtsi"
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15
arch/arm64/boot/dts/rockchip/rk3588-evb4-lp4-v10.dts
Normal file
15
arch/arm64/boot/dts/rockchip/rk3588-evb4-lp4-v10.dts
Normal file
@@ -0,0 +1,15 @@
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2021 Rockchip Electronics Co., Ltd.
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*
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*/
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/dts-v1/;
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#include "rk3588-evb4-lp4.dtsi"
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#include "rk3588-android.dtsi"
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/ {
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model = "Rockchip RK3588 EVB4 LP4 V10 Board";
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compatible = "rockchip,rk3588-evb4-lp4-v10", "rockchip,rk3588";
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};
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9
arch/arm64/boot/dts/rockchip/rk3588-evb4-lp4.dtsi
Normal file
9
arch/arm64/boot/dts/rockchip/rk3588-evb4-lp4.dtsi
Normal file
@@ -0,0 +1,9 @@
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2021 Rockchip Electronics Co., Ltd.
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*
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*/
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#include "rk3588.dtsi"
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#include "rk3588-evb.dtsi"
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15
arch/arm64/boot/dts/rockchip/rk3588-evb5-lp4-v10.dts
Normal file
15
arch/arm64/boot/dts/rockchip/rk3588-evb5-lp4-v10.dts
Normal file
@@ -0,0 +1,15 @@
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2021 Rockchip Electronics Co., Ltd.
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*
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*/
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/dts-v1/;
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#include "rk3588-evb5-lp4.dtsi"
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#include "rk3588-android.dtsi"
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/ {
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model = "Rockchip RK3588 EVB4 LP4 V10 Board";
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compatible = "rockchip,rk3588-evb4-lp4-v10", "rockchip,rk3588";
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};
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9
arch/arm64/boot/dts/rockchip/rk3588-evb5-lp4.dtsi
Normal file
9
arch/arm64/boot/dts/rockchip/rk3588-evb5-lp4.dtsi
Normal file
@@ -0,0 +1,9 @@
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
|
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* Copyright (c) 2021 Rockchip Electronics Co., Ltd.
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*
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*/
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#include "rk3588.dtsi"
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#include "rk3588-evb.dtsi"
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15
arch/arm64/boot/dts/rockchip/rk3588-evb6-lp4-v10.dts
Normal file
15
arch/arm64/boot/dts/rockchip/rk3588-evb6-lp4-v10.dts
Normal file
@@ -0,0 +1,15 @@
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
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/*
|
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* Copyright (c) 2021 Rockchip Electronics Co., Ltd.
|
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*
|
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*/
|
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/dts-v1/;
|
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#include "rk3588-evb6-lp4.dtsi"
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#include "rk3588-android.dtsi"
|
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/ {
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model = "Rockchip RK3588 EVB6 LP4 V10 Board";
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compatible = "rockchip,rk3588-evb6-lp4-v10", "rockchip,rk3588";
|
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};
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9
arch/arm64/boot/dts/rockchip/rk3588-evb6-lp4.dtsi
Normal file
9
arch/arm64/boot/dts/rockchip/rk3588-evb6-lp4.dtsi
Normal file
@@ -0,0 +1,9 @@
|
||||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
/*
|
||||
* Copyright (c) 2021 Rockchip Electronics Co., Ltd.
|
||||
*
|
||||
*/
|
||||
|
||||
#include "rk3588.dtsi"
|
||||
#include "rk3588-evb.dtsi"
|
||||
|
||||
926
arch/arm64/boot/dts/rockchip/rk3588s-evb.dtsi
Normal file
926
arch/arm64/boot/dts/rockchip/rk3588s-evb.dtsi
Normal file
@@ -0,0 +1,926 @@
|
||||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
/*
|
||||
* Copyright (c) 2021 Rockchip Electronics Co., Ltd.
|
||||
*
|
||||
*/
|
||||
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/pwm/pwm.h>
|
||||
#include <dt-bindings/pinctrl/rockchip.h>
|
||||
#include <dt-bindings/input/rk-input.h>
|
||||
#include <dt-bindings/display/drm_mipi_dsi.h>
|
||||
#include <dt-bindings/sensor-dev.h>
|
||||
|
||||
/ {
|
||||
adc_keys: adc-keys {
|
||||
compatible = "adc-keys";
|
||||
io-channels = <&saradc 0>;
|
||||
io-channel-names = "buttons";
|
||||
keyup-threshold-microvolt = <1800000>;
|
||||
poll-interval = <100>;
|
||||
|
||||
vol-up-key {
|
||||
label = "volume up";
|
||||
linux,code = <KEY_VOLUMEUP>;
|
||||
press-threshold-microvolt = <1750>;
|
||||
};
|
||||
|
||||
vol-down-key {
|
||||
label = "volume down";
|
||||
linux,code = <KEY_VOLUMEDOWN>;
|
||||
press-threshold-microvolt = <297500>;
|
||||
};
|
||||
|
||||
menu-key {
|
||||
label = "menu";
|
||||
linux,code = <KEY_MENU>;
|
||||
press-threshold-microvolt = <980000>;
|
||||
};
|
||||
|
||||
back-key {
|
||||
label = "back";
|
||||
linux,code = <KEY_BACK>;
|
||||
press-threshold-microvolt = <1305500>;
|
||||
};
|
||||
};
|
||||
|
||||
leds: leds {
|
||||
compatible = "gpio-leds";
|
||||
work_led: work {
|
||||
gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "heartbeat";
|
||||
};
|
||||
};
|
||||
|
||||
test-power {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
rk_headset {
|
||||
status = "disabled";
|
||||
compatible = "rockchip_headset";
|
||||
headset_gpio = <&gpio1 RK_PD5 GPIO_ACTIVE_LOW>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&hp_det>;
|
||||
io-channels = <&saradc 3>;
|
||||
};
|
||||
|
||||
es8388_sound: es8388-sound {
|
||||
status = "okay";
|
||||
simple-audio-card,format = "i2s";
|
||||
simple-audio-card,name = "rockchip,es8388-codec";
|
||||
simple-audio-card,dai-link@0 {
|
||||
format = "i2s";
|
||||
cpu {
|
||||
sound-dai = <&i2s0_8ch>;
|
||||
};
|
||||
codec {
|
||||
sound-dai = <&es8388>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
vcc12v_dcin: vcc12v-dcin {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vcc12v_dcin";
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <12000000>;
|
||||
regulator-max-microvolt = <12000000>;
|
||||
};
|
||||
|
||||
vcc5v0_sys: vcc5v0-sys {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vcc5v0_sys";
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
vin-supply = <&vcc12v_dcin>;
|
||||
};
|
||||
|
||||
vcc5v0_usbdcin: vcc5v0-usbdcin {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vcc5v0_usbdcin";
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
vin-supply = <&vcc12v_dcin>;
|
||||
};
|
||||
|
||||
vcc5v0_usb: vcc5v0-usb {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vcc5v0_usb";
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
vin-supply = <&vcc5v0_usbdcin>;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c2 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&i2c3 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&i2c4 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c4m3_xfer>;
|
||||
};
|
||||
|
||||
&i2c5 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&i2c6 {
|
||||
status = "okay";
|
||||
gt1x: gt1x@14 {
|
||||
compatible = "goodix,gt1x";
|
||||
reg = <0x14>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&touch_gpio>;
|
||||
goodix,rst-gpio = <&gpio0 RK_PD2 GPIO_ACTIVE_HIGH>;
|
||||
goodix,irq-gpio = <&gpio0 RK_PD3 IRQ_TYPE_LEVEL_LOW>;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c7 {
|
||||
status = "okay";
|
||||
es8388: es8388@10 {
|
||||
status = "okay";
|
||||
#sound-dai-cells = <0>;
|
||||
compatible = "everest,es8388";
|
||||
reg = <0x10>;
|
||||
clocks = <&cru I2S0_8CH_MCLKOUT>;
|
||||
clock-names = "mclk";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2s0_mclk>;
|
||||
spk-con-gpio = <&gpio1 RK_PD3 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
};
|
||||
|
||||
&i2s0_8ch {
|
||||
status = "okay";
|
||||
pinctrl-0 = <&i2s0_lrck_tx
|
||||
&i2s0_sclk_tx
|
||||
&i2s0_sdi0
|
||||
&i2s0_sdo0>;
|
||||
};
|
||||
|
||||
&pinctrl {
|
||||
headphone {
|
||||
hp_det: hp-det {
|
||||
rockchip,pins = <1 RK_PD5 RK_FUNC_GPIO &pcfg_pull_down>;
|
||||
};
|
||||
};
|
||||
|
||||
touch {
|
||||
touch_gpio: touch-gpio {
|
||||
rockchip,pins =
|
||||
<0 RK_PD2 RK_FUNC_GPIO &pcfg_pull_up>,
|
||||
<0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&spi2 {
|
||||
status = "okay";
|
||||
assigned-clocks = <&cru CLK_SPI2>;
|
||||
assigned-clock-rates = <200000000>;
|
||||
num-cs = <2>;
|
||||
|
||||
rk806master@0 {
|
||||
compatible = "rockchip,rk806";
|
||||
spi-max-frequency = <1000000>;
|
||||
reg = <0x0>;
|
||||
|
||||
interrupt-parent = <&gpio0>;
|
||||
interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
|
||||
|
||||
pinctrl-names = "pmic-sleep", "pmic-power-off", "pmic-reset";
|
||||
pinctrl-0 = <&rk806_dvs1_null>, <&rk806_dvs2_null>, <&rk806_dvs3_null>;
|
||||
pinctrl-1 = <&rk806_dvs1_slp>, <&rk806_dvs2_null>, <&rk806_dvs3_null>;
|
||||
pinctrl-2 = <&rk806_dvs1_pwrdn>, <&rk806_dvs2_null>, <&rk806_dvs3_null>;
|
||||
pinctrl-3 = <&rk806_dvs1_rst>, <&rk806_dvs2_null>, <&rk806_dvs3_null>;
|
||||
|
||||
/* 2800mv-3500mv */
|
||||
low_voltage_threshold = <3000>;
|
||||
/* 2700mv-3400mv */
|
||||
shutdown_voltage_threshold = <2700>;
|
||||
/* 140 160 */
|
||||
shutdown_temperture_threshold = <160>;
|
||||
hotdie_temperture_threshold = <115>;
|
||||
|
||||
vcc1-supply = <&vcc5v0_sys>;
|
||||
vcc2-supply = <&vcc5v0_sys>;
|
||||
vcc3-supply = <&vcc5v0_sys>;
|
||||
vcc4-supply = <&vcc5v0_sys>;
|
||||
vcc5-supply = <&vcc5v0_sys>;
|
||||
vcc6-supply = <&vcc5v0_sys>;
|
||||
vcc7-supply = <&vcc5v0_sys>;
|
||||
vcc8-supply = <&vcc5v0_sys>;
|
||||
vcc9-supply = <&vcc5v0_sys>;
|
||||
vcc10-supply = <&vcc5v0_sys>;
|
||||
vcc11-supply = <&vcc_2v0_pldo_s3>;
|
||||
vcc12-supply = <&vcc5v0_sys>;
|
||||
vcc13-supply = <&vcc5v0_sys>;
|
||||
vcc14-supply = <&vcc_1v1_nldo_s3>;
|
||||
vcca-supply = <&vcc5v0_sys>;
|
||||
|
||||
pinctrl_rk806: pinctrl_rk806 {
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
|
||||
rk806_dvs1_null: rk806_dvs1_null {
|
||||
pins = "gpio_pwrctrl2";
|
||||
function = "pin_fun0";
|
||||
};
|
||||
|
||||
rk806_dvs1_slp: rk806_dvs1_slp {
|
||||
pins = "gpio_pwrctrl1";
|
||||
function = "pin_fun1";
|
||||
};
|
||||
|
||||
rk806_dvs1_pwrdn: rk806_dvs1_pwrdn {
|
||||
pins = "gpio_pwrctrl1";
|
||||
function = "pin_fun2";
|
||||
};
|
||||
|
||||
rk806_dvs1_rst: rk806_dvs1_rst {
|
||||
pins = "gpio_pwrctrl1";
|
||||
function = "pin_fun3";
|
||||
};
|
||||
|
||||
rk806_dvs2_null: rk806_dvs2_null {
|
||||
pins = "gpio_pwrctrl2";
|
||||
function = "pin_fun0";
|
||||
};
|
||||
|
||||
rk806_dvs2_slp: rk806_dvs2_slp {
|
||||
pins = "gpio_pwrctrl2";
|
||||
function = "pin_fun1";
|
||||
};
|
||||
|
||||
rk806_dvs2_pwrdn: rk806_dvs2_pwrdn {
|
||||
pins = "gpio_pwrctrl2";
|
||||
function = "pin_fun2";
|
||||
};
|
||||
|
||||
rk806_dvs2_rst: rk806_dvs2_rst {
|
||||
pins = "gpio_pwrctrl2";
|
||||
function = "pin_fun3";
|
||||
};
|
||||
|
||||
rk806_dvs2_dvs: rk806_dvs2_dvs {
|
||||
pins = "gpio_pwrctrl2";
|
||||
function = "pin_fun4";
|
||||
};
|
||||
|
||||
rk806_dvs2_gpio: rk806_dvs2_gpio {
|
||||
pins = "gpio_pwrctrl2";
|
||||
function = "pin_fun5";
|
||||
};
|
||||
|
||||
rk806_dvs3_null: rk806_dvs3_null {
|
||||
pins = "gpio_pwrctrl3";
|
||||
function = "pin_fun0";
|
||||
};
|
||||
|
||||
rk806_dvs3_slp: rk806_dvs3_slp {
|
||||
pins = "gpio_pwrctrl3";
|
||||
function = "pin_fun1";
|
||||
};
|
||||
|
||||
rk806_dvs3_pwrdn: rk806_dvs3_pwrdn {
|
||||
pins = "gpio_pwrctrl3";
|
||||
function = "pin_fun2";
|
||||
};
|
||||
|
||||
rk806_dvs3_rst: rk806_dvs3_rst {
|
||||
pins = "gpio_pwrctrl3";
|
||||
function = "pin_fun3";
|
||||
};
|
||||
|
||||
rk806_dvs3_dvs: rk806_dvs3_dvs {
|
||||
pins = "gpio_pwrctrl3";
|
||||
function = "pin_fun4";
|
||||
};
|
||||
|
||||
rk806_dvs3_gpio: rk806_dvs3_gpio {
|
||||
pins = "gpio_pwrctrl3";
|
||||
function = "pin_fun5";
|
||||
};
|
||||
};
|
||||
|
||||
regulators {
|
||||
vdd_gpu_s0: DCDC_REG1 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <550000>;
|
||||
regulator-max-microvolt = <950000>;
|
||||
regulator-ramp-delay = <12500>;
|
||||
regulator-name = "vdd_gpu_s0";
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
vdd_npu_s0: DCDC_REG2 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <550000>;
|
||||
regulator-max-microvolt = <950000>;
|
||||
regulator-ramp-delay = <12500>;
|
||||
regulator-name = "vdd_npu_s0";
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
vdd_log_s0: DCDC_REG3 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <750000>;
|
||||
regulator-max-microvolt = <750000>;
|
||||
regulator-ramp-delay = <12500>;
|
||||
regulator-name = "vdd_log_s0";
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
vdd_vdenc_s0: DCDC_REG4 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <550000>;
|
||||
regulator-max-microvolt = <950000>;
|
||||
regulator-ramp-delay = <12500>;
|
||||
regulator-name = "vdd_vdenc_s0";
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
vdd_gpu_mem_s0: DCDC_REG5 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <675000>;
|
||||
regulator-max-microvolt = <950000>;
|
||||
regulator-ramp-delay = <12500>;
|
||||
regulator-name = "vdd_gpu_mem_s0";
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
vdd_npu_mem_s0: DCDC_REG6 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <675000>;
|
||||
regulator-max-microvolt = <950000>;
|
||||
regulator-ramp-delay = <12500>;
|
||||
regulator-name = "vdd_npu_mem_s0";
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
vcc_2v0_pldo_s3: DCDC_REG7 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <2000000>;
|
||||
regulator-max-microvolt = <2000000>;
|
||||
regulator-ramp-delay = <12500>;
|
||||
regulator-name = "vdd_2v0_pldo_s3";
|
||||
regulator-state-mem {
|
||||
regulator-on-in-suspend;
|
||||
regulator-suspend-microvolt = <2000000>;
|
||||
};
|
||||
};
|
||||
|
||||
vdd_vdenc_mem_s0: DCDC_REG8 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <675000>;
|
||||
regulator-max-microvolt = <950000>;
|
||||
regulator-ramp-delay = <12500>;
|
||||
regulator-name = "vdd_vdenc_mem_s0";
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
vdd2_ddr_s3: DCDC_REG9 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-name = "vdd2_ddr_s0";
|
||||
regulator-state-mem {
|
||||
regulator-on-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
vcc_1v1_nldo_s3: DCDC_REG10 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <1100000>;
|
||||
regulator-max-microvolt = <1100000>;
|
||||
regulator-ramp-delay = <12500>;
|
||||
regulator-name = "vcc_1v1_nldo_s3";
|
||||
regulator-state-mem {
|
||||
regulator-on-in-suspend;
|
||||
regulator-suspend-microvolt = <1100000>;
|
||||
};
|
||||
};
|
||||
|
||||
avcc_1v8_s0: PLDO_REG1 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-ramp-delay = <12500>;
|
||||
regulator-name = "avcc_1v8_s0";
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
vdd1_1v8_ddr_s3: PLDO_REG2 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-ramp-delay = <12500>;
|
||||
regulator-name = "vdd1_1v8_ddr_s3";
|
||||
regulator-state-mem {
|
||||
regulator-on-in-suspend;
|
||||
regulator-suspend-microvolt = <1800000>;
|
||||
};
|
||||
};
|
||||
|
||||
avcc_1v8_codec_s0: PLDO_REG3 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-ramp-delay = <12500>;
|
||||
regulator-name = "avcc_1v8_codec_s0";
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
vcc_3v3_s3: PLDO_REG4 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-ramp-delay = <12500>;
|
||||
regulator-name = "vcc_3v3_s3";
|
||||
regulator-state-mem {
|
||||
regulator-on-in-suspend;
|
||||
regulator-suspend-microvolt = <3300000>;
|
||||
};
|
||||
};
|
||||
|
||||
vccio_sd_s0: PLDO_REG5 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-ramp-delay = <12500>;
|
||||
regulator-name = "vccio_sd_s0";
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
vccio_1v8_s3: PLDO_REG6 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-ramp-delay = <12500>;
|
||||
regulator-name = "vccio_1v8_s3";
|
||||
regulator-state-mem {
|
||||
regulator-on-in-suspend;
|
||||
regulator-suspend-microvolt = <1800000>;
|
||||
};
|
||||
};
|
||||
|
||||
vdd_0v75_s3: NLDO_REG1 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <750000>;
|
||||
regulator-max-microvolt = <750000>;
|
||||
regulator-ramp-delay = <12500>;
|
||||
regulator-name = "vdd_0v75_s3";
|
||||
regulator-state-mem {
|
||||
regulator-on-in-suspend;
|
||||
regulator-suspend-microvolt = <750000>;
|
||||
};
|
||||
};
|
||||
|
||||
vdd2l_0v9_ddr_s3: NLDO_REG2 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <900000>;
|
||||
regulator-max-microvolt = <900000>;
|
||||
regulator-name = "vdd2l_0v9_ddr_s3";
|
||||
regulator-state-mem {
|
||||
regulator-on-in-suspend;
|
||||
regulator-suspend-microvolt = <900000>;
|
||||
};
|
||||
};
|
||||
|
||||
vdd_0v75_hdmi_edp_s0: NLDO_REG3 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <750000>;
|
||||
regulator-max-microvolt = <750000>;
|
||||
regulator-name = "vdd_0v75_hdmi_edp_s0";
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
vdd_0v75_s0: NLDO_REG4 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <750000>;
|
||||
regulator-max-microvolt = <750000>;
|
||||
regulator-name = "vdd_0v75_s0";
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
vdd_0v85_s0: NLDO_REG5 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <850000>;
|
||||
regulator-max-microvolt = <850000>;
|
||||
regulator-name = "vdd_0v85_s0";
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
rk806slave@1 {
|
||||
compatible = "rockchip,rk806";
|
||||
spi-max-frequency = <1000000>;
|
||||
reg = <0x01>;
|
||||
|
||||
interrupt-parent = <&gpio0>;
|
||||
interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
|
||||
|
||||
pinctrl-names = "pmic-sleep", "pmic-power-off";
|
||||
pinctrl-0 = <&rk806_dvs1_null>, <&rk806_dvs2_null>;//, <&rk806_dvs3_null>;
|
||||
pinctrl-1 = <&rk806_dvs1_slp>, <&rk806_dvs2_null>;//, <&rk806_dvs3_null>;
|
||||
pinctrl-2 = <&rk806_dvs1_pwrdn>, <&rk806_dvs2_null>;//, <&rk806_dvs3_null>;
|
||||
pinctrl-3 = <&rk806_dvs1_rst>, <&rk806_dvs2_null>;//, <&rk806_dvs3_null>;
|
||||
|
||||
vcc1-supply = <&vcc5v0_sys>;
|
||||
vcc2-supply = <&vcc5v0_sys>;
|
||||
vcc3-supply = <&vcc5v0_sys>;
|
||||
vcc4-supply = <&vcc5v0_sys>;
|
||||
vcc5-supply = <&vcc5v0_sys>;
|
||||
vcc6-supply = <&vcc5v0_sys>;
|
||||
vcc7-supply = <&vcc5v0_sys>;
|
||||
vcc8-supply = <&vcc5v0_sys>;
|
||||
vcc9-supply = <&vcc5v0_sys>;
|
||||
vcc10-supply = <&vcc5v0_sys>;
|
||||
vcc11-supply = <&vcc_2v0_pldo_s3>;
|
||||
vcc12-supply = <&vcc5v0_sys>;
|
||||
vcc13-supply = <&vcc_1v1_nldo_s3>;
|
||||
vcc14-supply = <&vcc_2v0_pldo_s3>;
|
||||
vcca-supply = <&vcc5v0_sys>;
|
||||
|
||||
regulators {
|
||||
vdd_cpu_big1_s0: DCDC_REG1 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <550000>;
|
||||
regulator-max-microvolt = <950000>;
|
||||
regulator-ramp-delay = <12500>;
|
||||
regulator-name = "vdd_cpu_big1_s0";
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
vdd_cpu_big0_s0: DCDC_REG2 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <550000>;
|
||||
regulator-max-microvolt = <950000>;
|
||||
regulator-ramp-delay = <12500>;
|
||||
regulator-name = "vdd_cpu_big0_s0";
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
vdd_cpu_lit_s0: DCDC_REG3 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <550000>;
|
||||
regulator-max-microvolt = <950000>;
|
||||
regulator-ramp-delay = <12500>;
|
||||
regulator-name = "vdd_cpu_lit_s0";
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
vcc_3v3_s0: DCDC_REG4 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-ramp-delay = <12500>;
|
||||
regulator-name = "vcc_3v3_s0";
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
vdd_cpu_big1_mem_s0: DCDC_REG5 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <675000>;
|
||||
regulator-max-microvolt = <950000>;
|
||||
regulator-ramp-delay = <12500>;
|
||||
regulator-name = "vdd_cpu_big1_mem_s0";
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
|
||||
vdd_cpu_big0_mem_s0: DCDC_REG6 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <675000>;
|
||||
regulator-max-microvolt = <950000>;
|
||||
regulator-ramp-delay = <12500>;
|
||||
regulator-name = "vdd_cpu_big0_mem_s0";
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
vcc_1v8_s0: DCDC_REG7 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-ramp-delay = <12500>;
|
||||
regulator-name = "vcc_1v8_s0";
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
vdd_cpu_lit_mem_s0: DCDC_REG8 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <675000>;
|
||||
regulator-max-microvolt = <950000>;
|
||||
regulator-ramp-delay = <12500>;
|
||||
regulator-name = "vdd_cpu_lit_mem_s0";
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
vddq_ddr_s0: DCDC_REG9 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-name = "vddq_ddr_s0";
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
vdd_ddr_s0: DCDC_REG10 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <850000>;
|
||||
regulator-max-microvolt = <850000>;
|
||||
regulator-ramp-delay = <12500>;
|
||||
regulator-name = "vdd_ddr_s0";
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
vcc_1v8_cam_s0: PLDO_REG1 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-ramp-delay = <12500>;
|
||||
regulator-name = "vcc_1v8_cam_s0";
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
avdd1v8_ddr_pll_s0: PLDO_REG2 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-ramp-delay = <12500>;
|
||||
regulator-name = "avdd1v8_ddr_pll_s0";
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
vdd_1v8_pll_s0: PLDO_REG3 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-ramp-delay = <12500>;
|
||||
regulator-name = "vdd1v8_pll_s0";
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
vcc_3v3_sd_s0: PLDO_REG4 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-ramp-delay = <12500>;
|
||||
regulator-name = "vcc_3v3_sd_s0";
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
vcc_2v8_cam_s0: PLDO_REG5 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <2800000>;
|
||||
regulator-max-microvolt = <2800000>;
|
||||
regulator-ramp-delay = <12500>;
|
||||
regulator-name = "vcc_2v8_cam_s0";
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
pldo6_s3: PLDO_REG6 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-name = "pldo6_s3";
|
||||
regulator-state-mem {
|
||||
regulator-on-in-suspend;
|
||||
regulator-suspend-microvolt = <1800000>;
|
||||
};
|
||||
};
|
||||
|
||||
vdd_0v75_pll_s0: NLDO_REG1 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <750000>;
|
||||
regulator-max-microvolt = <750000>;
|
||||
regulator-ramp-delay = <12500>;
|
||||
regulator-name = "vdd_0v75_pll_s0";
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
vdd_ddr_pll_s0: NLDO_REG2 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <850000>;
|
||||
regulator-max-microvolt = <850000>;
|
||||
regulator-name = "vdd_ddr_pll_s0";
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
avdd_0v85_s0: NLDO_REG3 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <850000>;
|
||||
regulator-max-microvolt = <850000>;
|
||||
regulator-ramp-delay = <12500>;
|
||||
regulator-name = "avdd_0v85_s0";
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
avdd_1v2_cam_s0: NLDO_REG4 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <1200000>;
|
||||
regulator-max-microvolt = <1200000>;
|
||||
regulator-ramp-delay = <12500>;
|
||||
regulator-name = "avdd_1v2_cam_s0";
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
avdd_1v2_s0: NLDO_REG5 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <1200000>;
|
||||
regulator-max-microvolt = <1200000>;
|
||||
regulator-ramp-delay = <12500>;
|
||||
regulator-name = "avdd_1v2_s0";
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&u2phy0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&u2phy2 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&u2phy3 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&u2phy0_otg {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&u2phy2_host {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&u2phy3_host {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb_host0_ehci {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb_host0_ohci {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb_host1_ehci {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb_host1_ohci {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usbdp_phy0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usbdp_phy0_dp {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usbdp_phy0_u3 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usbdrd3_0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usbdrd_dwc3_0 {
|
||||
dr_mode = "peripheral";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usbhost3_0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usbhost_dwc3_0 {
|
||||
status = "okay";
|
||||
};
|
||||
15
arch/arm64/boot/dts/rockchip/rk3588s-evb1-lp4x-v10.dts
Normal file
15
arch/arm64/boot/dts/rockchip/rk3588s-evb1-lp4x-v10.dts
Normal file
@@ -0,0 +1,15 @@
|
||||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
/*
|
||||
* Copyright (c) 2021 Rockchip Electronics Co., Ltd.
|
||||
*
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include "rk3588s-evb1-lp4x.dtsi"
|
||||
#include "rk3588-android.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Rockchip RK3588S EVB1 LP4X V10 Board";
|
||||
compatible = "rockchip,rk3588s-evb1-lp4x-v10", "rockchip,rk3588";
|
||||
};
|
||||
153
arch/arm64/boot/dts/rockchip/rk3588s-evb1-lp4x.dtsi
Normal file
153
arch/arm64/boot/dts/rockchip/rk3588s-evb1-lp4x.dtsi
Normal file
@@ -0,0 +1,153 @@
|
||||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
/*
|
||||
* Copyright (c) 2021 Rockchip Electronics Co., Ltd.
|
||||
*
|
||||
*/
|
||||
|
||||
#include "dt-bindings/usb/pd.h"
|
||||
#include "rk3588s.dtsi"
|
||||
#include "rk3588s-evb.dtsi"
|
||||
|
||||
/ {
|
||||
vbus5v0_typec: vbus-typec-regulator {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vbus5v0_typec";
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
enable-active-high;
|
||||
gpio = <&gpio1 RK_PA1 GPIO_ACTIVE_HIGH>;
|
||||
vin-supply = <&vcc5v0_usb>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&typec5v_pwren>;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c5 {
|
||||
status = "okay";
|
||||
|
||||
mpu6500@68 {
|
||||
status = "disabled";
|
||||
compatible = "invensense,mpu6500";
|
||||
reg = <0x68>;
|
||||
irq-gpio = <&gpio3 RK_PB4 IRQ_TYPE_EDGE_RISING>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mpu6500_irq_gpio>;
|
||||
mpu-int_config = <0x10>;
|
||||
mpu-level_shifter = <0>;
|
||||
mpu-orientation = <0 1 0 1 0 0 0 0 1>;
|
||||
orientation-x= <0>;
|
||||
orientation-y= <0>;
|
||||
orientation-z= <0>;
|
||||
mpu-debug = <1>;
|
||||
};
|
||||
|
||||
mpu6500_acc: mpu_acc@68 {
|
||||
compatible = "mpu6500_acc";
|
||||
reg = <0x68>;
|
||||
irq-gpio = <&gpio3 RK_PB4 IRQ_TYPE_EDGE_RISING>;
|
||||
irq_enable = <0>;
|
||||
poll_delay_ms = <30>;
|
||||
type = <SENSOR_TYPE_ACCEL>;
|
||||
layout = <8>;
|
||||
};
|
||||
|
||||
mpu6500_gyro: mpu_gyro@68 {
|
||||
compatible = "mpu6500_gyro";
|
||||
reg = <0x68>;
|
||||
poll_delay_ms = <30>;
|
||||
type = <SENSOR_TYPE_GYROSCOPE>;
|
||||
layout = <8>;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c8 {
|
||||
status = "okay";
|
||||
|
||||
usbc0: fusb302@22 {
|
||||
compatible = "fcs,fusb302";
|
||||
reg = <0x22>;
|
||||
interrupt-parent = <&gpio0>;
|
||||
interrupts = <RK_PD3 IRQ_TYPE_LEVEL_LOW>;
|
||||
vbus-supply = <&vbus5v0_typec>;
|
||||
status = "okay";
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
usbc0_role_sw: endpoint@0 {
|
||||
remote-endpoint = <&dwc3_0_role_switch>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
usb_con: connector {
|
||||
compatible = "usb-c-connector";
|
||||
label = "USB-C";
|
||||
data-role = "dual";
|
||||
power-role = "dual";
|
||||
try-power-role = "sink";
|
||||
op-sink-microwatt = <1000000>;
|
||||
sink-pdos =
|
||||
<PDO_FIXED(5000, 1000, PDO_FIXED_USB_COMM)>;
|
||||
source-pdos =
|
||||
<PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>;
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
usbc0_orien_sw: endpoint {
|
||||
remote-endpoint = <&usbdp_phy0_orientation_switch>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&pinctrl {
|
||||
mpu6500 {
|
||||
mpu6500_irq_gpio: mpu6500-irq-gpio {
|
||||
rockchip,pins = <3 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
};
|
||||
|
||||
usb-typec {
|
||||
usbc0_int: usbc0-int {
|
||||
rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>;
|
||||
};
|
||||
|
||||
typec5v_pwren: typec5v-pwren {
|
||||
rockchip,pins = <1 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&usbdp_phy0 {
|
||||
orientation-switch;
|
||||
port {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
usbdp_phy0_orientation_switch: endpoint@0 {
|
||||
reg = <0>;
|
||||
remote-endpoint = <&usbc0_orien_sw>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&usbdrd_dwc3_0 {
|
||||
usb-role-switch;
|
||||
port {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
dwc3_0_role_switch: endpoint@0 {
|
||||
reg = <0>;
|
||||
remote-endpoint = <&usbc0_role_sw>;
|
||||
};
|
||||
};
|
||||
};
|
||||
15
arch/arm64/boot/dts/rockchip/rk3588s-evb2-lp5-v10.dts
Normal file
15
arch/arm64/boot/dts/rockchip/rk3588s-evb2-lp5-v10.dts
Normal file
@@ -0,0 +1,15 @@
|
||||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
/*
|
||||
* Copyright (c) 2021 Rockchip Electronics Co., Ltd.
|
||||
*
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include "rk3588s-evb2-lp5.dtsi"
|
||||
#include "rk3588-android.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Rockchip RK3588S EVB2 LP5 V10 Board";
|
||||
compatible = "rockchip,rk3588s-evb2-lp5-v10", "rockchip,rk3588";
|
||||
};
|
||||
9
arch/arm64/boot/dts/rockchip/rk3588s-evb2-lp5.dtsi
Normal file
9
arch/arm64/boot/dts/rockchip/rk3588s-evb2-lp5.dtsi
Normal file
@@ -0,0 +1,9 @@
|
||||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
/*
|
||||
* Copyright (c) 2021 Rockchip Electronics Co., Ltd.
|
||||
*
|
||||
*/
|
||||
|
||||
#include "rk3588s.dtsi"
|
||||
#include "rk3588s-evb.dtsi"
|
||||
|
||||
15
arch/arm64/boot/dts/rockchip/rk3588s-evb3-lp4x-v10.dts
Normal file
15
arch/arm64/boot/dts/rockchip/rk3588s-evb3-lp4x-v10.dts
Normal file
@@ -0,0 +1,15 @@
|
||||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
/*
|
||||
* Copyright (c) 2021 Rockchip Electronics Co., Ltd.
|
||||
*
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include "rk3588s-evb3-lp4x.dtsi"
|
||||
#include "rk3588-android.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Rockchip RK3588S EVB3 LP4X V10 Board";
|
||||
compatible = "rockchip,rk3588s-evb3-lp4x-v10", "rockchip,rk3588";
|
||||
};
|
||||
9
arch/arm64/boot/dts/rockchip/rk3588s-evb3-lp4x.dtsi
Normal file
9
arch/arm64/boot/dts/rockchip/rk3588s-evb3-lp4x.dtsi
Normal file
@@ -0,0 +1,9 @@
|
||||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
/*
|
||||
* Copyright (c) 2021 Rockchip Electronics Co., Ltd.
|
||||
*
|
||||
*/
|
||||
|
||||
#include "rk3588s.dtsi"
|
||||
#include "rk3588s-evb.dtsi"
|
||||
|
||||
15
arch/arm64/boot/dts/rockchip/rk3588s-evb4-lp4x-v10.dts
Normal file
15
arch/arm64/boot/dts/rockchip/rk3588s-evb4-lp4x-v10.dts
Normal file
@@ -0,0 +1,15 @@
|
||||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
/*
|
||||
* Copyright (c) 2021 Rockchip Electronics Co., Ltd.
|
||||
*
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include "rk3588s-evb4-lp4x.dtsi"
|
||||
#include "rk3588-android.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Rockchip RK3588S EVB4 LP4X V10 Board";
|
||||
compatible = "rockchip,rk3588s-evb4-lp4x-v10", "rockchip,rk3588";
|
||||
};
|
||||
9
arch/arm64/boot/dts/rockchip/rk3588s-evb4-lp4x.dtsi
Normal file
9
arch/arm64/boot/dts/rockchip/rk3588s-evb4-lp4x.dtsi
Normal file
@@ -0,0 +1,9 @@
|
||||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
/*
|
||||
* Copyright (c) 2021 Rockchip Electronics Co., Ltd.
|
||||
*
|
||||
*/
|
||||
|
||||
#include "rk3588s.dtsi"
|
||||
#include "rk3588s-evb.dtsi"
|
||||
|
||||
Reference in New Issue
Block a user