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arm64: dts: rockchip: rk3588s-evb1: delay some time for each dsi cmd packet
Signed-off-by: Guochun Huang <hero.huang@rock-chips.com> Change-Id: I99ef5b5917f4b273523277ba7d19de528d922a00
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@@ -212,42 +212,42 @@
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29 10 03 f0 a5 a5
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/* Sleep Out */
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05 00 01 11
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05 10 01 11
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/* 4 Common Setting */
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/* 4.1 TE(Vync) ON/OFF */
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15 00 02 35 00
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15 10 02 35 00
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/* 4.2 CASET/PASET Setting */
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39 00 05 2b 00 00 06 17
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39 10 05 2a 00 00 02 cf
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39 10 05 2b 00 00 06 17
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/* 4.3 TSP SYNC Setting */
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39 00 03 f0 5a 5a
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39 00 0a B9 01 c0 3c 0b 00 00 00 11 03
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39 10 0a B9 01 c0 3c 0b 00 00 00 11 03
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39 10 03 f0 a5 a5
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/* FD(Fast Discharge) Setting */
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39 00 03 F0 5A 5A
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15 10 02 b0 45
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15 10 02 b5 48
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39 10 03 F0 A5 A5
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/* 4.6 FFC Setting (MIPI CLK 529MHz) */
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39 00 03 f0 5a 5a
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39 00 03 fc 5a 5a
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15 00 02 b0 1E
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39 10 06 c5 09 10 b4 24 fb
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39 10 03 f0 a5 a5
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39 10 03 fc a5 a5
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/* OSC Spread Setting */
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39 00 03 f0 5a 5a
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15 00 02 b0 37
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39 00 06 c5 04 ff 00 01 64
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39 10 06 c5 04 ff 00 01 64
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39 10 03 f0 a5 a5
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39 10 03 fc a5 a5
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/* Memory access & Image Data Write(2Ch/3Ch) */
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/* Dither IP Setting */
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39 00 03 fc 5a 5a
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15 00 02 b0 b6
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15 00 02 eb 01
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15 10 02 b0 b6
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15 10 02 eb 01
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39 10 03 fc a5 a5
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/* 5 Brightness Control */
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/* 5.1 Dimming Setting */
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39 10 03 f0 5a 5a
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