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arm64: dts: rockchip: rk3588-vehicle-evb: add rgmii phy rtl9010a support
Signed-off-by: Luo Wei <lw@rock-chips.com> Change-Id: I07371f33a0560cbf819dc34f5b277aaa84decc99
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@@ -153,6 +153,27 @@
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status = "okay";
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};
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&gmac0 {
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/* Use rgmii-rxid mode to disable rx delay inside Soc */
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phy-mode = "rgmii-rxid";
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clock_in_out = "output";
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snps,reset-gpio = <&gpio2 RK_PC5 GPIO_ACTIVE_LOW>;
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snps,reset-active-low;
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/* Reset time is 20ms, 100ms for rtl8211f */
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snps,reset-delays-us = <0 20000 100000>;
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pinctrl-names = "phydisb";
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pinctrl-0 = <&gmac0_miim
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&gmac0_tx_bus2
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&gmac0_rx_bus2
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&gmac0_rgmii_clk
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&gmac0_rgmii_bus
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&phydisb>;
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tx_delay = <0x43>;
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//rx_delay = <0x3f>;
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phy-handle = <&rgmii_phy>;
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status = "okay";
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};
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&i2c4 {
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status = "okay";
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pinctrl-0 = <&i2c4m2_xfer>;
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@@ -184,6 +205,13 @@
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&i2s0_sdo3>;
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};
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&mdio0 {
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rgmii_phy: phy@1 {
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compatible = "ethernet-phy-ieee802.3-c22";
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reg = <0x1>;
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};
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};
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&pcie2x1l0 {
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reset-gpios = <&gpio1 RK_PB4 GPIO_ACTIVE_HIGH>;
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rockchip,skip-scan-in-resume;
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@@ -198,6 +226,11 @@
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};
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&pinctrl {
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gmac0 {
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phydisb: phydisb {
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rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_output_high>;
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};
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};
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hym8563 {
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hym8563_int: hym8563-int {
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