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ODROID-M1: arm64/dts: Moved dts to dtsi and separate include.
- rk3568-odroid-m1.dts -> rk3568-odroid-m1.dtsi - rk3568-odroid-m1.dts: include rk3568-linux.dtsi Signed-off-by: xiane <sangch.go@gmail.com> Change-Id: Ia36e83d791e8e5b7631b24460659309d9f2629f5
This commit is contained in:
xiane
@@ -1,381 +1,9 @@
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2021 Hardkernel Co., Ltd.
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* Copyright (c) 2024 Hardkernel Co., Ltd.
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*
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*/
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/dts-v1/;
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#include "rk3568-odroid.dtsi"
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#include "rk3568-odroid-m1.dtsi"
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#include "rk3568-linux.dtsi"
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/ {
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model = "Hardkernel ODROID-M1";
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aliases {
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serial0 = &uart1;
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serial1 = &uart0;
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i2c0 = &i2c3;
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i2c3 = &i2c0;
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};
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backlight: backlight {
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compatible = "pwm-backlight";
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status = "disabled";
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pwms = <&pwm4 0 25000 0>;
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brightness-levels = <
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0 20 20 21 21 22 22 23
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23 24 24 25 25 26 26 27
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27 28 28 29 29 30 30 31
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31 32 32 33 33 34 34 35
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35 36 36 37 37 38 38 39
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40 41 42 43 44 45 46 47
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48 49 50 51 52 53 54 55
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56 57 58 59 60 61 62 63
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64 65 66 67 68 69 70 71
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72 73 74 75 76 77 78 79
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80 81 82 83 84 85 86 87
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88 89 90 91 92 93 94 95
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96 97 98 99 100 101 102 103
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104 105 106 107 108 109 110 111
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112 113 114 115 116 117 118 119
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120 121 122 123 124 125 126 127
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128 129 130 131 132 133 134 135
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136 137 138 139 140 141 142 143
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144 145 146 147 148 149 150 151
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152 153 154 155 156 157 158 159
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160 161 162 163 164 165 166 167
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168 169 170 171 172 173 174 175
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176 177 178 179 180 181 182 183
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184 185 186 187 188 189 190 191
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192 193 194 195 196 197 198 199
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200 201 202 203 204 205 206 207
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208 209 210 211 212 213 214 215
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216 217 218 219 220 221 222 223
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224 225 226 227 228 229 230 231
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232 233 234 235 236 237 238 239
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240 241 242 243 244 245 246 247
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248 249 250 251 252 253 254 255
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>;
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default-brightness-level = <200>;
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};
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lcd_pwren: lcd-pwren {
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compatible = "regulator-fixed";
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enable-active-high;
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gpio = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>;
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pinctrl-0 = <&lcd_pwr_en>;
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pinctrl-names = "default";
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regulator-always-on;
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regulator-boot-on;
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regulator-name = "lcd_pwren";
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vin-supply = <&vcc3v3_sys>;
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};
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pcie30_avdd0v9: pcie30-avdd0v9 {
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compatible = "regulator-fixed";
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regulator-name = "pcie30_avdd0v9";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <900000>;
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regulator-max-microvolt = <900000>;
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vin-supply = <&vcc3v3_sys>;
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};
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pcie30_avdd1v8: pcie30-avdd1v8 {
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compatible = "regulator-fixed";
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regulator-name = "pcie30_avdd1v8";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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vin-supply = <&vcc3v3_sys>;
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};
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vcc3v3_pcie: gpio-regulator {
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compatible = "regulator-fixed";
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regulator-name = "vcc3v3_pcie";
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enable-active-high;
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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gpio = <&gpio4 RK_PA7 GPIO_ACTIVE_HIGH>;
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startup-delay-us = <5000>;
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vin-supply = <&dc_12v>;
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};
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};
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&can0 {
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pinctrl-names = "default";
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pinctrl-0 = <&can0m0_pins>;
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assigned-clocks = <&cru CLK_CAN0>;
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assigned-clock-rates = <200000000>;
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status = "disabled";
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};
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&combphy0_us {
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status = "okay";
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};
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&combphy1_usq {
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status = "okay";
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};
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&combphy2_psq {
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status = "okay";
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};
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&dsi0 {
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status = "disabled";
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connect = <&vp1_out_dsi0>;
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dsi0_panel: panel@0 {
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#address-cells = <1>;
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#size-cells = <0>;
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/delete-property/ disable-delay-ms;
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/delete-property/ enable-delay-ms;
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/delete-property/ panel-exit-sequence;
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/delete-property/ panel-init-sequence;
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/delete-property/ reset-delay-ms;
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/delete-property/ prepare-delay-ms;
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/delete-property/ unprepare-delay-ms;
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status = "disabled";
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reg = <0>;
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backlight = <&backlight>;
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power-supply = <&lcd_pwren>;
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reset-gpios = <&gpio2 RK_PC6 GPIO_ACTIVE_LOW>;
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pinctrl-names = "default";
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pinctrl-0 = <&lcd_rst_gpio>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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panel_in_dsi: endpoint {
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remote-endpoint = <&dsi_out_panel>;
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};
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};
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};
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};
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@1 {
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reg = <1>;
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dsi_out_panel: endpoint {
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remote-endpoint = <&panel_in_dsi>;
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};
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};
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};
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};
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&gpio0 {
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gpio-line-names =
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/* GPIO0_A */
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"", "", "", "", "", "", "", "",
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/* GPIO0_B */
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"", "", "",
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"PIN_28", /* GPIO0_B3 */
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"PIN_27", /* GPIO0_B4 */
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"PIN_33", /* GPIO0_B5 */
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"PIN_7", /* GPIO0_B6 */
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"",
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/* GPIO0_C */
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"PIN_11", /* GPIO0_C0 */
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"PIN_13", /* GPIO0_C1 */
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"", "", "", "", "", "",
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/* GPIO0_D */
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"", "", "", "", "", "", "", "";
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};
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&gpio1 {
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gpio-line-names =
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/* GPIO1_A */
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"", "", "", "", "", "", "", "",
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/* GPIO1_B */
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"", "", "", "", "", "", "", "",
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/* GPIO1_C */
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"", "", "", "", "", "", "", "",
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/* GPIO1_D */
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"", "", "", "", "", "", "", "";
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};
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&gpio2 {
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gpio-line-names =
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/* GPIO2_A */
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"", "", "", "", "", "", "", "",
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/* GPIO2_B */
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"", "", "", "", "", "", "", "",
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/* GPIO2_C */
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"", "", "", "", "", "", "", "",
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/* GPIO2_D */
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"PIN_21", /* GPIO2_D0 */
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"PIN_19", /* GPIO2_D1 */
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"PIN_24", /* GPIO2_D2 */
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"PIN_23", /* GPIO2_D3 */
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"", "", "", "";
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};
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&gpio3 {
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gpio-line-names =
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/* GPIO3_A */
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"", "", "", "", "", "", "", "",
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/* GPIO3_B */
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"", "",
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"PIN_15", /* GPIO3_B2 */
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"", "",
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"PIN_5", /* GPIO3_B5 */
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"PIN_3", /* GPIO3_B6 */
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"",
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/* GPIO3_C */
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"", "", "", "", "", "",
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"PIN_16", /* GPIO3_C6 */
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"PIN_18", /* GPIO3_C7 */
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/* GPIO3_D */
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"PIN_12", /* GPIO3_D0 */
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"PIN_22", /* GPIO3_D1 */
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"PIN_26", /* GPIO3_D2 */
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"PIN_32", /* GPIO3_D3 */
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"PIN_36", /* GPIO3_D4 */
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"PIN_35", /* GPIO3_D5 */
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"PIN_8", /* GPIO3_D6 */
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"PIN_10"; /* GPIO3_D7 */
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};
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&gpio4 {
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gpio-line-names =
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/* GPIO4_A */
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"", "", "", "", "", "", "", "",
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/* GPIO4_B */
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"", "", "", "", "", "",
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"PIN_31", /* GPIO4_B6 */
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"",
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/* GPIO4_C */
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"",
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"PIN_29", /* GPIO4_C1 */
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"", "", "",
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"", "", "",
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/* GPIO4_D */
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"", "", "", "", "", "", "", "";
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};
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&hdmi_sound {
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simple-audio-card,name = "ODROID-M1-HDMI";
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status = "okay";
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};
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&i2c3 {
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status = "disabled";
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pinctrl-names = "default";
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pinctrl-0 = <&i2c3m1_xfer>;
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};
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&i2c4 {
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status = "disabled";
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clock-frequency = <400000>;
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touchscreen: touchscreen {
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status = "disabled";
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pinctrl-names = "default";
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pinctrl-0 = <&touch_gpios>;
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interrupt-parent = <&gpio0>;
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interrupts = <RK_PC4 IRQ_TYPE_LEVEL_LOW>;
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irq-gpios = <&gpio0 RK_PC4 IRQ_TYPE_LEVEL_LOW>;
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reset-gpios = <&gpio4 RK_PB0 GPIO_ACTIVE_LOW>;
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};
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};
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&pcie30phy {
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status = "okay";
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};
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&pcie3x2 {
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reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>;
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vpcie3v3-supply = <&vcc3v3_pcie>;
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status = "okay";
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};
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&pinctrl {
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lcd {
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lcd_pwr_en: lcd-pwr-en {
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rockchip,pins = <0 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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lcd_rst_gpio: lcd-rst-gpio {
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rockchip,pins = <2 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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touch_gpios: touch-gpios {
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rockchip,pins =
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<4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>,
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<0 RK_PC4 RK_FUNC_GPIO &pcfg_pull_up>;
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};
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};
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};
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&pwm1 {
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status = "disabled";
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pinctrl-0 = <&pwm1m1_pins>;
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};
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&pwm2 {
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status = "disabled";
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pinctrl-0 = <&pwm2m1_pins>;
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};
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&reserved_memory {
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pcie3x2@80900000{
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reg = <0x0 0x80900000 0x0 0x100000>;
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};
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};
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&rk809_sound {
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rockchip,card-name = "ODROID-M1-FRONT";
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status = "okay";
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};
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&sata2 {
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status = "okay";
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};
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&sfc {
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status = "okay";
|
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pinctrl-names = "default";
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pinctrl-0 = <&fspi_pins>;
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};
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&spi0 {
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status = "disabled";
|
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pinctrl-0 = <&spi0m1_pins>;
|
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pinctrl-1 = <&spi0m1_pins_hs>;
|
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num_chipselect = <1>;
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|
||||
cs-gpios = <&gpio2 RK_PD2 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
&uart1 {
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||||
status = "disabled";
|
||||
dma-names = "tx", "rx";
|
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/* uart1 uart1-with-ctsrts */
|
||||
pinctrl-0 = <&uart1m1_xfer>;
|
||||
pinctrl-1 = <&uart1m1_xfer &uart1m1_ctsn &uart1m1_rtsn>;
|
||||
};
|
||||
|
||||
380
arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dtsi
Normal file
380
arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dtsi
Normal file
@@ -0,0 +1,380 @@
|
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
/*
|
||||
* Copyright (c) 2021 Hardkernel Co., Ltd.
|
||||
*
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include "rk3568-odroid.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Hardkernel ODROID-M1";
|
||||
|
||||
aliases {
|
||||
serial0 = &uart1;
|
||||
serial1 = &uart0;
|
||||
i2c0 = &i2c3;
|
||||
i2c3 = &i2c0;
|
||||
};
|
||||
|
||||
backlight: backlight {
|
||||
compatible = "pwm-backlight";
|
||||
status = "disabled";
|
||||
|
||||
pwms = <&pwm4 0 25000 0>;
|
||||
brightness-levels = <
|
||||
0 20 20 21 21 22 22 23
|
||||
23 24 24 25 25 26 26 27
|
||||
27 28 28 29 29 30 30 31
|
||||
31 32 32 33 33 34 34 35
|
||||
35 36 36 37 37 38 38 39
|
||||
40 41 42 43 44 45 46 47
|
||||
48 49 50 51 52 53 54 55
|
||||
56 57 58 59 60 61 62 63
|
||||
64 65 66 67 68 69 70 71
|
||||
72 73 74 75 76 77 78 79
|
||||
80 81 82 83 84 85 86 87
|
||||
88 89 90 91 92 93 94 95
|
||||
96 97 98 99 100 101 102 103
|
||||
104 105 106 107 108 109 110 111
|
||||
112 113 114 115 116 117 118 119
|
||||
120 121 122 123 124 125 126 127
|
||||
128 129 130 131 132 133 134 135
|
||||
136 137 138 139 140 141 142 143
|
||||
144 145 146 147 148 149 150 151
|
||||
152 153 154 155 156 157 158 159
|
||||
160 161 162 163 164 165 166 167
|
||||
168 169 170 171 172 173 174 175
|
||||
176 177 178 179 180 181 182 183
|
||||
184 185 186 187 188 189 190 191
|
||||
192 193 194 195 196 197 198 199
|
||||
200 201 202 203 204 205 206 207
|
||||
208 209 210 211 212 213 214 215
|
||||
216 217 218 219 220 221 222 223
|
||||
224 225 226 227 228 229 230 231
|
||||
232 233 234 235 236 237 238 239
|
||||
240 241 242 243 244 245 246 247
|
||||
248 249 250 251 252 253 254 255
|
||||
>;
|
||||
default-brightness-level = <200>;
|
||||
};
|
||||
|
||||
lcd_pwren: lcd-pwren {
|
||||
compatible = "regulator-fixed";
|
||||
enable-active-high;
|
||||
gpio = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>;
|
||||
pinctrl-0 = <&lcd_pwr_en>;
|
||||
pinctrl-names = "default";
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-name = "lcd_pwren";
|
||||
vin-supply = <&vcc3v3_sys>;
|
||||
};
|
||||
|
||||
pcie30_avdd0v9: pcie30-avdd0v9 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "pcie30_avdd0v9";
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <900000>;
|
||||
regulator-max-microvolt = <900000>;
|
||||
vin-supply = <&vcc3v3_sys>;
|
||||
};
|
||||
|
||||
pcie30_avdd1v8: pcie30-avdd1v8 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "pcie30_avdd1v8";
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
vin-supply = <&vcc3v3_sys>;
|
||||
};
|
||||
|
||||
vcc3v3_pcie: gpio-regulator {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vcc3v3_pcie";
|
||||
enable-active-high;
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
gpio = <&gpio4 RK_PA7 GPIO_ACTIVE_HIGH>;
|
||||
startup-delay-us = <5000>;
|
||||
vin-supply = <&dc_12v>;
|
||||
};
|
||||
};
|
||||
|
||||
&can0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&can0m0_pins>;
|
||||
assigned-clocks = <&cru CLK_CAN0>;
|
||||
assigned-clock-rates = <200000000>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&combphy0_us {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&combphy1_usq {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&combphy2_psq {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&dsi0 {
|
||||
status = "disabled";
|
||||
|
||||
connect = <&vp1_out_dsi0>;
|
||||
|
||||
dsi0_panel: panel@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
/delete-property/ disable-delay-ms;
|
||||
/delete-property/ enable-delay-ms;
|
||||
/delete-property/ panel-exit-sequence;
|
||||
/delete-property/ panel-init-sequence;
|
||||
/delete-property/ reset-delay-ms;
|
||||
/delete-property/ prepare-delay-ms;
|
||||
/delete-property/ unprepare-delay-ms;
|
||||
|
||||
status = "disabled";
|
||||
|
||||
reg = <0>;
|
||||
|
||||
backlight = <&backlight>;
|
||||
power-supply = <&lcd_pwren>;
|
||||
|
||||
reset-gpios = <&gpio2 RK_PC6 GPIO_ACTIVE_LOW>;
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&lcd_rst_gpio>;
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
|
||||
panel_in_dsi: endpoint {
|
||||
remote-endpoint = <&dsi_out_panel>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
|
||||
dsi_out_panel: endpoint {
|
||||
remote-endpoint = <&panel_in_dsi>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&gpio0 {
|
||||
gpio-line-names =
|
||||
/* GPIO0_A */
|
||||
"", "", "", "", "", "", "", "",
|
||||
/* GPIO0_B */
|
||||
"", "", "",
|
||||
"PIN_28", /* GPIO0_B3 */
|
||||
"PIN_27", /* GPIO0_B4 */
|
||||
"PIN_33", /* GPIO0_B5 */
|
||||
"PIN_7", /* GPIO0_B6 */
|
||||
"",
|
||||
/* GPIO0_C */
|
||||
"PIN_11", /* GPIO0_C0 */
|
||||
"PIN_13", /* GPIO0_C1 */
|
||||
"", "", "", "", "", "",
|
||||
/* GPIO0_D */
|
||||
"", "", "", "", "", "", "", "";
|
||||
};
|
||||
|
||||
&gpio1 {
|
||||
gpio-line-names =
|
||||
/* GPIO1_A */
|
||||
"", "", "", "", "", "", "", "",
|
||||
/* GPIO1_B */
|
||||
"", "", "", "", "", "", "", "",
|
||||
/* GPIO1_C */
|
||||
"", "", "", "", "", "", "", "",
|
||||
/* GPIO1_D */
|
||||
"", "", "", "", "", "", "", "";
|
||||
};
|
||||
|
||||
&gpio2 {
|
||||
gpio-line-names =
|
||||
/* GPIO2_A */
|
||||
"", "", "", "", "", "", "", "",
|
||||
/* GPIO2_B */
|
||||
"", "", "", "", "", "", "", "",
|
||||
/* GPIO2_C */
|
||||
"", "", "", "", "", "", "", "",
|
||||
/* GPIO2_D */
|
||||
"PIN_21", /* GPIO2_D0 */
|
||||
"PIN_19", /* GPIO2_D1 */
|
||||
"PIN_24", /* GPIO2_D2 */
|
||||
"PIN_23", /* GPIO2_D3 */
|
||||
"", "", "", "";
|
||||
};
|
||||
|
||||
&gpio3 {
|
||||
gpio-line-names =
|
||||
/* GPIO3_A */
|
||||
"", "", "", "", "", "", "", "",
|
||||
/* GPIO3_B */
|
||||
"", "",
|
||||
"PIN_15", /* GPIO3_B2 */
|
||||
"", "",
|
||||
"PIN_5", /* GPIO3_B5 */
|
||||
"PIN_3", /* GPIO3_B6 */
|
||||
"",
|
||||
/* GPIO3_C */
|
||||
"", "", "", "", "", "",
|
||||
"PIN_16", /* GPIO3_C6 */
|
||||
"PIN_18", /* GPIO3_C7 */
|
||||
/* GPIO3_D */
|
||||
"PIN_12", /* GPIO3_D0 */
|
||||
"PIN_22", /* GPIO3_D1 */
|
||||
"PIN_26", /* GPIO3_D2 */
|
||||
"PIN_32", /* GPIO3_D3 */
|
||||
"PIN_36", /* GPIO3_D4 */
|
||||
"PIN_35", /* GPIO3_D5 */
|
||||
"PIN_8", /* GPIO3_D6 */
|
||||
"PIN_10"; /* GPIO3_D7 */
|
||||
};
|
||||
|
||||
&gpio4 {
|
||||
gpio-line-names =
|
||||
/* GPIO4_A */
|
||||
"", "", "", "", "", "", "", "",
|
||||
/* GPIO4_B */
|
||||
"", "", "", "", "", "",
|
||||
"PIN_31", /* GPIO4_B6 */
|
||||
"",
|
||||
/* GPIO4_C */
|
||||
"",
|
||||
"PIN_29", /* GPIO4_C1 */
|
||||
"", "", "",
|
||||
"", "", "",
|
||||
/* GPIO4_D */
|
||||
"", "", "", "", "", "", "", "";
|
||||
};
|
||||
|
||||
&hdmi_sound {
|
||||
simple-audio-card,name = "ODROID-M1-HDMI";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&i2c3 {
|
||||
status = "disabled";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c3m1_xfer>;
|
||||
};
|
||||
|
||||
&i2c4 {
|
||||
status = "disabled";
|
||||
|
||||
clock-frequency = <400000>;
|
||||
|
||||
touchscreen: touchscreen {
|
||||
status = "disabled";
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&touch_gpios>;
|
||||
|
||||
interrupt-parent = <&gpio0>;
|
||||
interrupts = <RK_PC4 IRQ_TYPE_LEVEL_LOW>;
|
||||
|
||||
irq-gpios = <&gpio0 RK_PC4 IRQ_TYPE_LEVEL_LOW>;
|
||||
reset-gpios = <&gpio4 RK_PB0 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
};
|
||||
|
||||
&pcie30phy {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pcie3x2 {
|
||||
reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>;
|
||||
vpcie3v3-supply = <&vcc3v3_pcie>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pinctrl {
|
||||
lcd {
|
||||
lcd_pwr_en: lcd-pwr-en {
|
||||
rockchip,pins = <0 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
|
||||
lcd_rst_gpio: lcd-rst-gpio {
|
||||
rockchip,pins = <2 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
|
||||
touch_gpios: touch-gpios {
|
||||
rockchip,pins =
|
||||
<4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>,
|
||||
<0 RK_PC4 RK_FUNC_GPIO &pcfg_pull_up>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&pwm1 {
|
||||
status = "disabled";
|
||||
pinctrl-0 = <&pwm1m1_pins>;
|
||||
};
|
||||
|
||||
&pwm2 {
|
||||
status = "disabled";
|
||||
pinctrl-0 = <&pwm2m1_pins>;
|
||||
};
|
||||
|
||||
&reserved_memory {
|
||||
pcie3x2@80900000{
|
||||
reg = <0x0 0x80900000 0x0 0x100000>;
|
||||
};
|
||||
};
|
||||
|
||||
&rk809_sound {
|
||||
rockchip,card-name = "ODROID-M1-FRONT";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&sata2 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&sfc {
|
||||
status = "okay";
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&fspi_pins>;
|
||||
};
|
||||
|
||||
&spi0 {
|
||||
status = "disabled";
|
||||
|
||||
pinctrl-0 = <&spi0m1_pins>;
|
||||
pinctrl-1 = <&spi0m1_pins_hs>;
|
||||
num_chipselect = <1>;
|
||||
|
||||
cs-gpios = <&gpio2 RK_PD2 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
&uart1 {
|
||||
status = "disabled";
|
||||
dma-names = "tx", "rx";
|
||||
/* uart1 uart1-with-ctsrts */
|
||||
pinctrl-0 = <&uart1m1_xfer>;
|
||||
pinctrl-1 = <&uart1m1_xfer &uart1m1_ctsn &uart1m1_rtsn>;
|
||||
};
|
||||
Reference in New Issue
Block a user