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deinterlace: add support for tl1 [1/1]

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PD#172587

Problem:
bringup tl1

Solution:
add deinterlace driver support for tl1

Verify:
verified on tl1 x301

Change-Id: I3bf008a4f948cdc2c11f14f81944695d6a185b14
Signed-off-by: wenfeng.guo <wenfeng.guo@amlogic.com>
This commit is contained in:
wenfeng.guo
2018-11-12 10:54:08 +08:00
committed by Bo Yang
parent 19712d403c
commit bf1a301bb7
7 changed files with 152 additions and 19 deletions
Download Patch File Download Diff File Expand all files Collapse all files

40
arch/arm/boot/dts/amlogic/tl1_pxp.dts
View File

@@ -104,6 +104,21 @@
alignment = <0x400000>;
};
/*di CMA pool */
di_cma_reserved:linux,di_cma {
compatible = "shared-dma-pool";
reusable;
/* buffer_size = 3621952(yuv422 8bit)
* | 4736064(yuv422 10bit)
* | 4074560(yuv422 10bit full pack mode)
* 10x3621952=34.6M(0x23) support 8bit
* 10x4736064=45.2M(0x2e) support 12bit
* 10x4074560=40M(0x28) support 10bit
*/
size = <0x02800000>;
alignment = <0x400000>;
};
/* for hdmi rx emp use */
hdmirx_emp_cma_reserved:linux,emp_cma {
compatible = "shared-dma-pool";
@@ -135,6 +150,31 @@
status = "okay";
};
deinterlace {
compatible = "amlogic, deinterlace";
status = "okay";
/* 0:use reserved; 1:use cma; 2:use cma as reserved */
flag_cma = <1>;
//memory-region = <&di_reserved>;
memory-region = <&di_cma_reserved>;
interrupts = <0 46 1
0 40 1>;
interrupt-names = "pre_irq", "post_irq";
clocks = <&clkc CLKID_VPU_CLKB_TMP_COMP>,
<&clkc CLKID_VPU_CLKB_COMP>;
clock-names = "vpu_clkb_tmp_composite",
"vpu_clkb_composite";
clock-range = <334 667>;
/* buffer-size = <3621952>;(yuv422 8bit) */
buffer-size = <4074560>;/*yuv422 fullpack*/
/* reserve-iomap = "true"; */
/* if enable nr10bit, set nr10bit-support to 1 */
post-wr-support = <1>;
nr10bit-support = <1>;
nrds-enable = <1>;
pps-enable = <1>;
};
vout {
compatible = "amlogic, vout";
status = "okay";

40
arch/arm/boot/dts/amlogic/tl1_t962x2_skt.dts
View File

@@ -125,6 +125,21 @@
alloc-ranges = <0x0e000000 0x800000>;
};
/*di CMA pool */
di_cma_reserved:linux,di_cma {
compatible = "shared-dma-pool";
reusable;
/* buffer_size = 3621952(yuv422 8bit)
* | 4736064(yuv422 10bit)
* | 4074560(yuv422 10bit full pack mode)
* 10x3621952=34.6M(0x23) support 8bit
* 10x4736064=45.2M(0x2e) support 12bit
* 10x4074560=40M(0x28) support 10bit
*/
size = <0x02800000>;
alignment = <0x400000>;
};
/* for hdmi rx emp use */
hdmirx_emp_cma_reserved:linux,emp_cma {
compatible = "shared-dma-pool";
@@ -156,6 +171,31 @@
status = "okay";
};
deinterlace {
compatible = "amlogic, deinterlace";
status = "okay";
/* 0:use reserved; 1:use cma; 2:use cma as reserved */
flag_cma = <1>;
//memory-region = <&di_reserved>;
memory-region = <&di_cma_reserved>;
interrupts = <0 46 1
0 40 1>;
interrupt-names = "pre_irq", "post_irq";
clocks = <&clkc CLKID_VPU_CLKB_TMP_COMP>,
<&clkc CLKID_VPU_CLKB_COMP>;
clock-names = "vpu_clkb_tmp_composite",
"vpu_clkb_composite";
clock-range = <334 667>;
/* buffer-size = <3621952>;(yuv422 8bit) */
buffer-size = <4074560>;/*yuv422 fullpack*/
/* reserve-iomap = "true"; */
/* if enable nr10bit, set nr10bit-support to 1 */
post-wr-support = <1>;
nr10bit-support = <1>;
nrds-enable = <1>;
pps-enable = <1>;
};
vout {
compatible = "amlogic, vout";
status = "okay";

41
arch/arm/boot/dts/amlogic/tl1_t962x2_x301.dts
View File

@@ -110,7 +110,6 @@
alignment = <0x400000>;
};
demod_reserved:linux,demod {
compatible = "amlogic, demod-mem";
size = <0x800000>; //8M //100m 0x6400000
@@ -126,6 +125,21 @@
alloc-ranges = <0x0e000000 0x800000>;
};
/*di CMA pool */
di_cma_reserved:linux,di_cma {
compatible = "shared-dma-pool";
reusable;
/* buffer_size = 3621952(yuv422 8bit)
* | 4736064(yuv422 10bit)
* | 4074560(yuv422 10bit full pack mode)
* 10x3621952=34.6M(0x23) support 8bit
* 10x4736064=45.2M(0x2e) support 12bit
* 10x4074560=40M(0x28) support 10bit
*/
size = <0x02800000>;
alignment = <0x400000>;
};
/* for hdmi rx emp use */
hdmirx_emp_cma_reserved:linux,emp_cma {
compatible = "shared-dma-pool";
@@ -157,6 +171,31 @@
status = "okay";
};
deinterlace {
compatible = "amlogic, deinterlace";
status = "okay";
/* 0:use reserved; 1:use cma; 2:use cma as reserved */
flag_cma = <1>;
//memory-region = <&di_reserved>;
memory-region = <&di_cma_reserved>;
interrupts = <0 46 1
0 40 1>;
interrupt-names = "pre_irq", "post_irq";
clocks = <&clkc CLKID_VPU_CLKB_TMP_COMP>,
<&clkc CLKID_VPU_CLKB_COMP>;
clock-names = "vpu_clkb_tmp_composite",
"vpu_clkb_composite";
clock-range = <334 667>;
/* buffer-size = <3621952>;(yuv422 8bit) */
buffer-size = <4074560>;/*yuv422 fullpack*/
/* reserve-iomap = "true"; */
/* if enable nr10bit, set nr10bit-support to 1 */
post-wr-support = <1>;
nr10bit-support = <1>;
nrds-enable = <1>;
pps-enable = <1>;
};
vout {
compatible = "amlogic, vout";
status = "okay";

26
drivers/amlogic/media/deinterlace/deinterlace.c
View File

@@ -129,7 +129,7 @@ static di_dev_t *de_devp;
static dev_t di_devno;
static struct class *di_clsp;
static const char version_s[] = "2018-11-06a";
static const char version_s[] = "2018-11-12a";
static int bypass_state = 1;
static int bypass_all;
@@ -5090,7 +5090,8 @@ de_post_process(void *arg, unsigned int zoom_start_x_lines,
is_meson_gxlx_cpu() ||
is_meson_txhd_cpu() ||
is_meson_g12a_cpu() ||
is_meson_g12b_cpu()) {
is_meson_g12b_cpu() ||
is_meson_tl1_cpu()) {
di_post_read_reverse_irq(overturn, mc_pre_flag,
post_blend_en ? mcpre_en : false);
/* disable mc for first 2 fieldes mv unreliable */
@@ -5871,7 +5872,8 @@ static void di_unreg_process_irq(void)
afbc_reg_sw(false);
di_hw_uninit();
if (is_meson_txlx_cpu() || is_meson_txhd_cpu()
|| is_meson_g12a_cpu() || is_meson_g12b_cpu()) {
|| is_meson_g12a_cpu() || is_meson_g12b_cpu()
|| is_meson_tl1_cpu()) {
di_pre_gate_control(false, mcpre_en);
nr_gate_control(false);
} else if (cpu_after_eq(MESON_CPU_MAJOR_ID_GXTVBB)) {
@@ -5883,7 +5885,8 @@ static void di_unreg_process_irq(void)
if (mirror_disable) {
di_hw_disable(mcpre_en);
if (is_meson_txlx_cpu() || is_meson_txhd_cpu()
|| is_meson_g12a_cpu() || is_meson_g12b_cpu()) {
|| is_meson_g12a_cpu() || is_meson_g12b_cpu()
|| is_meson_tl1_cpu()) {
enable_di_post_mif(GATE_OFF);
di_post_gate_control(false);
di_top_gate_control(false, false);
@@ -5995,7 +5998,8 @@ static void di_pre_size_change(unsigned short width,
is_meson_gxlx_cpu() ||
is_meson_txhd_cpu() ||
is_meson_g12a_cpu() ||
is_meson_g12b_cpu())
is_meson_g12b_cpu() ||
is_meson_tl1_cpu())
film_mode_win_config(width, height);
}
if (cpu_after_eq(MESON_CPU_MAJOR_ID_TXL))
@@ -6422,7 +6426,8 @@ static int di_task_handle(void *data)
#endif
}
}
if (is_meson_g12a_cpu() || is_meson_g12b_cpu()) {
if (is_meson_g12a_cpu() || is_meson_g12b_cpu()
|| is_meson_tl1_cpu()) {
#ifdef CLK_TREE_SUPPORT
clk_set_rate(de_devp->vpu_clkb,
de_devp->clkb_max_rate);
@@ -7366,7 +7371,8 @@ static void set_di_flag(void)
is_meson_gxlx_cpu() ||
is_meson_txhd_cpu() ||
is_meson_g12a_cpu() ||
is_meson_g12b_cpu()) {
is_meson_g12b_cpu() ||
is_meson_tl1_cpu()) {
mcpre_en = true;
mc_mem_alloc = true;
pulldown_enable = false;
@@ -7383,7 +7389,8 @@ static void set_di_flag(void)
is_meson_gxlx_cpu() ||
is_meson_txhd_cpu() ||
is_meson_g12a_cpu() ||
is_meson_g12b_cpu()) {
is_meson_g12b_cpu() ||
is_meson_tl1_cpu()) {
full_422_pack = true;
}
@@ -7394,7 +7401,8 @@ static void set_di_flag(void)
full_422_pack = false;
}
post_hold_line =
(is_meson_g12a_cpu() || is_meson_g12b_cpu())?10:17;
(is_meson_g12a_cpu() || is_meson_g12b_cpu()
|| is_meson_tl1_cpu())?10:17;
} else {
mcpre_en = false;
pulldown_enable = false;

3
drivers/amlogic/media/deinterlace/deinterlace_dbg.c
View File

@@ -253,7 +253,8 @@ void dump_di_reg_g12(void)
if (is_meson_txlx_cpu() ||
is_meson_txhd_cpu() ||
is_meson_g12a_cpu() ||
is_meson_g12b_cpu())
is_meson_g12b_cpu() ||
is_meson_tl1_cpu())
base_addr = 0xff900000;
else
base_addr = 0xd0100000;

12
drivers/amlogic/media/deinterlace/deinterlace_hw.c
View File

@@ -466,7 +466,8 @@ void di_hw_init(bool pd_enable, bool mc_enable)
unsigned short fifo_size_di = 0xc0;
switch_vpu_clk_gate_vmod(VPU_VPU_CLKB, VPU_CLK_GATE_ON);
if (is_meson_txlx_cpu() || is_meson_txhd_cpu()
|| is_meson_g12a_cpu() || is_meson_g12b_cpu())
|| is_meson_g12a_cpu() || is_meson_g12b_cpu()
|| is_meson_tl1_cpu())
di_top_gate_control(true, true);
else if (is_meson_gxl_cpu() || is_meson_gxm_cpu()
|| is_meson_gxlx_cpu())
@@ -479,7 +480,8 @@ void di_hw_init(bool pd_enable, bool mc_enable)
is_meson_gxlx_cpu() ||
is_meson_txhd_cpu() ||
is_meson_g12a_cpu() ||
is_meson_g12b_cpu()) {
is_meson_g12b_cpu() ||
is_meson_tl1_cpu()) {
/* vpp fifo max size on txl :128*3=384[0x180] */
/* di fifo max size on txl :96*3=288[0x120] */
fifo_size_vpp = 0x180;
@@ -510,7 +512,8 @@ void di_hw_init(bool pd_enable, bool mc_enable)
if (is_meson_txlx_cpu() ||
is_meson_txhd_cpu() ||
is_meson_g12a_cpu() ||
is_meson_g12b_cpu()) {
is_meson_g12b_cpu() ||
is_meson_tl1_cpu()) {
di_pre_gate_control(true, true);
di_post_gate_control(true);
}
@@ -528,7 +531,8 @@ void di_hw_init(bool pd_enable, bool mc_enable)
if (is_meson_txlx_cpu() ||
is_meson_txhd_cpu() ||
is_meson_g12a_cpu() ||
is_meson_g12b_cpu()) {
is_meson_g12b_cpu() ||
is_meson_tl1_cpu()) {
di_pre_gate_control(false, true);
di_post_gate_control(false);
di_top_gate_control(false, false);

9
drivers/amlogic/media/deinterlace/nr_drv.c
View File

@@ -353,7 +353,7 @@ static void linebuffer_config(unsigned short width)
static void nr2_config(unsigned short width, unsigned short height)
{
if (is_meson_txlx_cpu() || is_meson_g12a_cpu() ||
is_meson_g12b_cpu()) {
is_meson_g12b_cpu() || is_meson_tl1_cpu()) {
DI_Wr_reg_bits(NR4_TOP_CTRL, nr2_en, 2, 1);
DI_Wr_reg_bits(NR4_TOP_CTRL, nr2_en, 15, 1);
DI_Wr_reg_bits(NR4_TOP_CTRL, nr2_en, 17, 1);
@@ -402,7 +402,7 @@ void nr_all_config(unsigned short width, unsigned short height,
if (cpu_after_eq(MESON_CPU_MAJOR_ID_GXLX))
cue_config(nr_param.pcue_parm, field_type);
if (is_meson_txlx_cpu() || is_meson_g12a_cpu() ||
is_meson_g12b_cpu()) {
is_meson_g12b_cpu() || is_meson_tl1_cpu()) {
linebuffer_config(width);
nr4_config(nr_param.pnr4_parm, width, height);
}
@@ -782,7 +782,7 @@ void nr_process_in_irq(void)
if (dnr_en)
dnr_process(&dnr_param);
if (is_meson_txlx_cpu() || is_meson_g12a_cpu()
|| is_meson_g12a_cpu()) {
|| is_meson_g12a_cpu() || is_meson_tl1_cpu()) {
noise_meter_process(nr_param.pnr4_parm, nr_param.frame_count);
luma_enhancement_process(nr_param.pnr4_parm,
nr_param.frame_count);
@@ -1130,7 +1130,8 @@ void nr_hw_init(void)
void nr_gate_control(bool gate)
{
if (!is_meson_txlx_cpu() && !is_meson_g12a_cpu()
&& !is_meson_g12b_cpu())
&& !is_meson_g12b_cpu()
&& !is_meson_tl1_cpu())
return;
if (gate) {
/* enable nr auto gate */