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Merge tag 'amlogic-arm-dt-for-v5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux into arm/dt

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Amlogic ARM DT changes for v5.15:
- meson8: use a default higher default GPU clock to solve probe failure
- meson: add AIU audio controller and codec for ec100
- meson8b: fix pwm regulator supply property name

* tag 'amlogic-arm-dt-for-v5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux:
  ARM: dts: meson8b: ec100: Fix the pwm regulator supply properties
  ARM: dts: meson8b: mxq: Fix the pwm regulator supply properties
  ARM: dts: meson8b: odroidc1: Fix the pwm regulator supply properties
  ARM: dts: meson8b: ec100: wire up the RT5640 audio codec
  ARM: dts: meson: Add the AIU audio controller
  ARM: dts: meson8: Use a higher default GPU clock frequency

Link: https://lore.kernel.org/r/87519792-c9e7-76a6-5db5-0e955286b564@baylibre.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann
2021-08-12 22:54:50 +02:00
parent bcbe4bd39d 72ccc373b0
commit c2632c3afe
6 changed files with 194 additions and 5 deletions
Download Patch File Download Diff File Expand all files Collapse all files

12
arch/arm/boot/dts/meson.dtsi
View File

@@ -5,6 +5,7 @@
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/sound/meson-aiu.h>
/ {
#address-cells = <1>;
@@ -36,6 +37,17 @@
reg = <0x4000 0x400>;
};
aiu: audio-controller@5400 {
compatible = "amlogic,aiu";
#sound-dai-cells = <2>;
sound-name-prefix = "AIU";
reg = <0x5400 0x2ac>;
interrupts = <GIC_SPI 48 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 50 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "i2s", "spdif";
status = "disabled";
};
assist: assist@7c00 {
compatible = "amlogic,meson-mx-assist", "syscon";
reg = <0x7c00 0x200>;

68
arch/arm/boot/dts/meson8.dtsi
View File

@@ -304,14 +304,42 @@
"pp2", "ppmmu2", "pp4", "ppmmu4",
"pp5", "ppmmu5", "pp6", "ppmmu6";
resets = <&reset RESET_MALI>;
clocks = <&clkc CLKID_CLK81>, <&clkc CLKID_MALI>;
clock-names = "bus", "core";
assigned-clocks = <&clkc CLKID_MALI>;
assigned-clock-rates = <318750000>;
operating-points-v2 = <&gpu_opp_table>;
#cooling-cells = <2>; /* min followed by max */
};
};
}; /* end of / */
&aiu {
compatible = "amlogic,aiu-meson8", "amlogic,aiu";
clocks = <&clkc CLKID_AIU_GLUE>,
<&clkc CLKID_I2S_OUT>,
<&clkc CLKID_AOCLK_GATE>,
<&clkc CLKID_CTS_AMCLK>,
<&clkc CLKID_MIXER_IFACE>,
<&clkc CLKID_IEC958>,
<&clkc CLKID_IEC958_GATE>,
<&clkc CLKID_CTS_MCLK_I958>,
<&clkc CLKID_CTS_I958>;
clock-names = "pclk",
"i2s_pclk",
"i2s_aoclk",
"i2s_mclk",
"i2s_mixer",
"spdif_pclk",
"spdif_aoclk",
"spdif_mclk",
"spdif_mclk_sel";
resets = <&reset RESET_AIU>;
};
&aobus {
pmu: pmu@e0 {
compatible = "amlogic,meson8-pmu", "syscon";
@@ -335,6 +363,38 @@
gpio-ranges = <&pinctrl_aobus 0 0 16>;
};
i2s_am_clk_pins: i2s-am-clk-out {
mux {
groups = "i2s_am_clk_out_ao";
function = "i2s_ao";
bias-disable;
};
};
i2s_out_ao_clk_pins: i2s-ao-clk-out {
mux {
groups = "i2s_ao_clk_out_ao";
function = "i2s_ao";
bias-disable;
};
};
i2s_out_lr_clk_pins: i2s-lr-clk-out {
mux {
groups = "i2s_lr_clk_out_ao";
function = "i2s_ao";
bias-disable;
};
};
i2s_out_ch01_ao_pins: i2s-out-ch01 {
mux {
groups = "i2s_out_ch01_ao";
function = "i2s_ao";
bias-disable;
};
};
uart_ao_a_pins: uart_ao_a {
mux {
groups = "uart_tx_ao_a", "uart_rx_ao_a";
@@ -455,6 +515,14 @@
};
};
spdif_out_pins: spdif-out {
mux {
groups = "spdif_out";
function = "spdif";
bias-disable;
};
};
spi_nor_pins: nor {
mux {
groups = "nor_d", "nor_q", "nor_c", "nor_cs";

48
arch/arm/boot/dts/meson8b-ec100.dts
View File

@@ -96,6 +96,32 @@
#clock-cells = <0>;
};
sound {
compatible = "amlogic,gx-sound-card";
model = "M8B-EC100";
assigned-clocks = <&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>,
<&clkc CLKID_MPLL2>;
assigned-clock-rates = <270950400>,
<294912000>,
<393216000>;
dai-link-0 {
sound-dai = <&aiu AIU_CPU CPU_I2S_FIFO>;
};
dai-link-1 {
sound-dai = <&aiu AIU_CPU CPU_I2S_ENCODER>;
dai-format = "i2s";
mclk-fs = <256>;
codec-0 {
sound-dai = <&rt5640>;
};
};
};
usb_vbus: regulator-usb-vbus {
/*
* Silergy SY6288CCAC-GP 2A Power Distribution Switch.
@@ -148,7 +174,7 @@
regulator-min-microvolt = <860000>;
regulator-max-microvolt = <1140000>;
vin-supply = <&vcc_5v>;
pwm-supply = <&vcc_5v>;
pwms = <&pwm_cd 0 1148 0>;
pwm-dutycycle-range = <100 0>;
@@ -232,7 +258,7 @@
regulator-min-microvolt = <860000>;
regulator-max-microvolt = <1140000>;
vin-supply = <&vcc_5v>;
pwm-supply = <&vcc_5v>;
pwms = <&pwm_cd 1 1148 0>;
pwm-dutycycle-range = <100 0>;
@@ -242,6 +268,14 @@
};
};
&aiu {
status = "okay";
pinctrl-0 = <&i2s_am_clk_pins>, <&i2s_out_ao_clk_pins>,
<&i2s_out_lr_clk_pins>, <&i2s_out_ch01_ao_pins>;
pinctrl-names = "default";
};
&cpu0 {
cpu-supply = <&vcck>;
};
@@ -283,9 +317,19 @@
rt5640: codec@1c {
compatible = "realtek,rt5640";
reg = <0x1c>;
#sound-dai-cells = <0>;
interrupt-parent = <&gpio_intc>;
interrupts = <13 IRQ_TYPE_EDGE_BOTH>; /* GPIOAO_13 */
/*
* TODO: realtek,ldo1-en-gpios is connected to GPIO_BSD_EN.
* We currently cannot configure this pin correctly.
* Luckily for us it's in the "right" state by default.
*/
realtek,in1-differential;
};
};

4
arch/arm/boot/dts/meson8b-mxq.dts
View File

@@ -34,6 +34,8 @@
regulator-min-microvolt = <860000>;
regulator-max-microvolt = <1140000>;
pwm-supply = <&vcc_5v>;
pwms = <&pwm_cd 0 1148 0>;
pwm-dutycycle-range = <100 0>;
@@ -79,7 +81,7 @@
regulator-min-microvolt = <860000>;
regulator-max-microvolt = <1140000>;
vin-supply = <&vcc_5v>;
pwm-supply = <&vcc_5v>;
pwms = <&pwm_cd 1 1148 0>;
pwm-dutycycle-range = <100 0>;

4
arch/arm/boot/dts/meson8b-odroidc1.dts
View File

@@ -131,7 +131,7 @@
regulator-min-microvolt = <860000>;
regulator-max-microvolt = <1140000>;
vin-supply = <&p5v0>;
pwm-supply = <&p5v0>;
pwms = <&pwm_cd 0 12218 0>;
pwm-dutycycle-range = <91 0>;
@@ -163,7 +163,7 @@
regulator-min-microvolt = <860000>;
regulator-max-microvolt = <1140000>;
vin-supply = <&p5v0>;
pwm-supply = <&p5v0>;
pwms = <&pwm_cd 1 12218 0>;
pwm-dutycycle-range = <91 0>;

63
arch/arm/boot/dts/meson8b.dtsi
View File

@@ -279,6 +279,29 @@
};
}; /* end of / */
&aiu {
compatible = "amlogic,aiu-meson8b", "amlogic,aiu";
clocks = <&clkc CLKID_AIU_GLUE>,
<&clkc CLKID_I2S_OUT>,
<&clkc CLKID_AOCLK_GATE>,
<&clkc CLKID_CTS_AMCLK>,
<&clkc CLKID_MIXER_IFACE>,
<&clkc CLKID_IEC958>,
<&clkc CLKID_IEC958_GATE>,
<&clkc CLKID_CTS_MCLK_I958>,
<&clkc CLKID_CTS_I958>;
clock-names = "pclk",
"i2s_pclk",
"i2s_aoclk",
"i2s_mclk",
"i2s_mixer",
"spdif_pclk",
"spdif_aoclk",
"spdif_mclk",
"spdif_mclk_sel";
resets = <&reset RESET_AIU>;
};
&aobus {
pmu: pmu@e0 {
compatible = "amlogic,meson8b-pmu", "syscon";
@@ -302,6 +325,46 @@
gpio-ranges = <&pinctrl_aobus 0 0 16>;
};
i2s_am_clk_pins: i2s-am-clk-out {
mux {
groups = "i2s_am_clk_out";
function = "i2s";
bias-disable;
};
};
i2s_out_ao_clk_pins: i2s-ao-clk-out {
mux {
groups = "i2s_ao_clk_out";
function = "i2s";
bias-disable;
};
};
i2s_out_lr_clk_pins: i2s-lr-clk-out {
mux {
groups = "i2s_lr_clk_out";
function = "i2s";
bias-disable;
};
};
i2s_out_ch01_ao_pins: i2s-out-ch01 {
mux {
groups = "i2s_out_01";
function = "i2s";
bias-disable;
};
};
spdif_out_1_pins: spdif-out-1 {
mux {
groups = "spdif_out_1";
function = "spdif_1";
bias-disable;
};
};
uart_ao_a_pins: uart_ao_a {
mux {
groups = "uart_tx_ao_a", "uart_rx_ao_a";