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ASoC: rockchip: i2s: fixup clk div
we found mclk maybe not precise as required because of PLL, but it still can be used and no side effect. for example, if we require mclk 11289600, but get 11289598, it doesn't matter. so using DIV_ROUND_CLOSEST to fix it. Change-Id: If8453a7a08b319da81b07d572b02247bd7e7bd27 Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
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@@ -283,10 +283,10 @@ static int rockchip_i2s_hw_params(struct snd_pcm_substream *substream,
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if (i2s->is_master_mode) {
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mclk_rate = clk_get_rate(i2s->mclk);
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bclk_rate = i2s->bclk_fs * params_rate(params);
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if (bclk_rate && mclk_rate % bclk_rate)
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if (!bclk_rate)
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return -EINVAL;
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div_bclk = mclk_rate / bclk_rate;
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div_bclk = DIV_ROUND_CLOSEST(mclk_rate, bclk_rate);
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div_lrck = bclk_rate / params_rate(params);
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regmap_update_bits(i2s->regmap, I2S_CKR,
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I2S_CKR_MDIV_MASK,
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