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Merge commit '993b7f02f5a7e53cc368e74820d2e07c3b342407'

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* commit '993b7f02f5a7e53cc368e74820d2e07c3b342407':
  iommu: rockchip: Register pm ops to LATE_SYSTEM_SLEEP_PM_OPS
  ARM: dts: rockchip: rv1126b-evb2-v10-tb-400w-emmc: fix isp reserve memory error
  include: uapi: rkcif-config: add describe for quick stream control
  media: rockchip: vicap skip cache resume_mode when it is an illegal value
  ARM: dts: rockchip: rv1126b-thunder-boot: Add DCLK_CSI2HOST0 to protect
  drm/rockchip: drv: Fix kernel-doc warning
  media: rockchip: vicap clean cache of rdbk_rx_buf after stream off
  ASoC: rockchip: i2s-tdm: Compatible for deprecated property 'clk-trcm'

Change-Id: I13c1332d96d5b1b255a15b1541a7c28f6e40453b
This commit is contained in:
Tao Huang
2025-09-02 18:13:41 +08:00
parent 8be4fd921a 993b7f02f5
commit c369162b9d
8 changed files with 27 additions and 9 deletions
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6
arch/arm/boot/dts/rv1126b-evb2-v10-tb-400w-emmc.dts
View File

@@ -74,8 +74,8 @@
&rkisp_thunderboot {
/* reg's offset MUST match with RTOS */
/*
* vicap, capture raw10, ceil(w*10/8/256)*256*h *4(buf num)
* e.g. 2688x1520: 0x14c8000
* vicap, capture raw10, ceil(w*10/8/256)*256*h *4(buf num) + sizeof(rkisp_thunderboot_resmem_head)
* e.g. 2688x1520: 0x14c80000 + 0x9000
*/
reg = <0x41320000 0x14c8000>;
reg = <0x41320000 0x14d1000>;
};

6
arch/arm/boot/dts/rv1126b-thunder-boot.dtsi
View File

@@ -19,7 +19,8 @@
<&cru CLK_CORE_ISP>, <&cru ISP0CLK_VICAP>,
<&cru ACLK_VICAP>, <&cru HCLK_VICAP>,
<&cru DCLK_VICAP>, <&cru ISP0CLK_VICAP>,
<&cru PCLK_CSI2HOST0>, <&cru PCLK_CSI2HOST1>,
<&cru PCLK_CSI2HOST0>,
<&cru DCLK_CSI2HOST0>,
<&cru CLK_I2C4>, <&cru PCLK_I2C4>;
clock-names = "clk_hpmcu",
"pclk_hpmcu_intmux", "pclk_hpmcu_mailbox",
@@ -29,7 +30,8 @@
"clk_isp_core", "clk_isp_core_vicap",
"aclk_cif","hclk_cif",
"dclk_cif", "isp0clk_cif",
"pclk_csi2host0", "pclk_csi2host1",
"pclk_csi2host0",
"dclk_csi2host0",
"clk_i2c4", "pclk_i2c4";
};

2
drivers/gpu/drm/rockchip/rockchip_drm_drv.c
View File

@@ -101,7 +101,7 @@ static const struct mvrr_const_val const_hdmi720p60_6000 = {
.vtotal_fixed = 750,
};
/**
/*
* @vrefresh_khz: qms-vrr target refresh rate is 59.94Hz
* @vtotal_fixed: When switch to target refresh rate, vtotal is 750
* @bit_len: frac_array's bit length

4
drivers/iommu/rockchip-iommu.c
View File

@@ -1819,8 +1819,8 @@ static int __maybe_unused rk_iommu_resume(struct device *dev)
static const struct dev_pm_ops rk_iommu_pm_ops = {
SET_RUNTIME_PM_OPS(rk_iommu_suspend, rk_iommu_resume, NULL)
SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
pm_runtime_force_resume)
LATE_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
pm_runtime_force_resume)
};
static struct rk_iommu_ops iommu_data_ops_v1 = {

2
drivers/media/platform/rockchip/cif/capture.c
View File

@@ -10120,7 +10120,7 @@ static long rkcif_ioctl_default(struct file *file, void *fh,
mutex_unlock(&stream->cifdev->stream_lock);
}
stream_param->frame_num = dev->stream[0].frame_idx - 1;
if (!dev->is_rtt_suspend) {
if (!dev->is_rtt_suspend && stream_param->resume_mode != -1) {
dev->resume_mode = stream_param->resume_mode;
v4l2_dbg(3, rkcif_debug, &dev->v4l2_dev,
"set resume mode %d\n", dev->resume_mode);

5
drivers/media/platform/rockchip/cif/subdev-itf.c
View File

@@ -342,10 +342,15 @@ static void sditf_free_buf(struct sditf_priv *priv)
if (priv->hdr_cfg.hdr_mode == HDR_X2) {
rkcif_free_rx_buf(&cif_dev->stream[0], cif_dev->stream[0].rx_buf_num);
rkcif_free_rx_buf(&cif_dev->stream[1], cif_dev->stream[1].rx_buf_num);
cif_dev->rdbk_rx_buf[RDBK_L] = NULL;
cif_dev->rdbk_rx_buf[RDBK_M] = NULL;
} else if (priv->hdr_cfg.hdr_mode == HDR_X3) {
rkcif_free_rx_buf(&cif_dev->stream[0], cif_dev->stream[0].rx_buf_num);
rkcif_free_rx_buf(&cif_dev->stream[1], cif_dev->stream[1].rx_buf_num);
rkcif_free_rx_buf(&cif_dev->stream[2], cif_dev->stream[2].rx_buf_num);
cif_dev->rdbk_rx_buf[RDBK_L] = NULL;
cif_dev->rdbk_rx_buf[RDBK_M] = NULL;
cif_dev->rdbk_rx_buf[RDBK_S] = NULL;
} else {
rkcif_free_rx_buf(&cif_dev->stream[0], cif_dev->stream[0].rx_buf_num);
}

6
include/uapi/linux/rkcif-config.h
View File

@@ -129,6 +129,12 @@ struct rkcif_csi_info {
int dphy_vendor[RKCIF_MAX_CSI_NUM];
};
/*
* function: to quick start or stop stream
* on(input): to start or stop stream
* frame_num(output): for aiq to record frame number after stop stream
* resume_mode(input): set resume_mode to driver for AOV, set -1 for other case
*/
struct rkcif_quick_stream_param {
int on;
__u32 frame_num;

5
sound/soc/rockchip/rockchip_i2s_tdm.c
View File

@@ -3294,6 +3294,11 @@ static int rockchip_i2s_tdm_probe(struct platform_device *pdev)
i2s_tdm->frame_width = 64;
i2s_tdm->clk_trcm = TRCM_TXRX;
if (!of_property_read_u32(node, "rockchip,clk-trcm", &val)) {
if (val >= 0 && val <= 2)
i2s_tdm->clk_trcm = val;
dev_warn(i2s_tdm->dev, "Deprecated property 'rockchip,clk-trcm', please use 'rockchip,trcm-sync-tx/rx-only' in DT\n");
}
if (of_property_read_bool(node, "rockchip,trcm-sync-tx-only"))
i2s_tdm->clk_trcm = TRCM_TX;
if (of_property_read_bool(node, "rockchip,trcm-sync-rx-only")) {