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lcd: optimize tcon type for extensible usage [1/1]

Browse Source 
PD#SWPL-3957

Problem:
tcon_type need extensible usage for special case

Solution:
tcon_type change to hex value

Verify:
x301

Change-Id: I26cb58ffc1cd2f525c8cf0f7c08b0d9cf66766e5
Signed-off-by: Evoke Zhang <evoke.zhang@amlogic.com>
This commit is contained in:
Evoke Zhang
2019-01-08 00:29:50 -05:00
committed by Jianxin Pan
parent 6e25d6f7a7
commit c3f0bbde28
10 changed files with 208 additions and 97 deletions
Download Patch File Download Diff File Expand all files Collapse all files

28
arch/arm/boot/dts/amlogic/mesontl1_skt-panel.dtsi
View File

@@ -240,9 +240,10 @@
1 /*clk_auto_generate*/
0>; /*pixel_clk(unit in Hz)*/
p2p_attr = <
0 /* teyp: 0=ceds, 1=cmpi, 2=isp, 3=epi,
* 10=chpi, 11=cspi, 12=usit
*/
0x0 /* p2p_teyp:
* 0x0=ceds, 0x1=cmpi, 0x2=isp, 0x3=epi,
* 0x10=chpi, 0x11=cspi, 0x12=usit
*/
12 /* channel_num */
0x76543210 /* channel_sel0 */
0xba98 /* channel_sel1 */
@@ -285,9 +286,10 @@
1 /*clk_auto_generate*/
0>; /*pixel_clk(unit in Hz)*/
p2p_attr = <
0 /* teyp: 0=ceds, 1=cmpi, 2=isp, 3=epi,
* 10=chpi, 11=cspi, 12=usit
*/
0x0 /* p2p_teyp:
* 0x0=ceds, 0x1=cmpi, 0x2=isp, 0x3=epi,
* 0x10=chpi, 0x11=cspi, 0x12=usit
*/
6 /* channel_num */
0x76543210 /* channel_sel0 */
0xba98 /* channel_sel1 */
@@ -330,9 +332,10 @@
1 /*clk_auto_generate*/
0>; /*pixel_clk(unit in Hz)*/
p2p_attr = <
10 /* teyp: 0=ceds, 1=cmpi, 2=isp, 3=epi,
* 10=chpi, 11=cspi, 12=usit
*/
0x10 /* p2p_teyp:
* 0x0=ceds, 0x1=cmpi, 0x2=isp, 0x3=epi,
* 0x10=chpi, 0x11=cspi, 0x12=usit
*/
6 /* channel_num */
0x76543210 /* channel_sel0 */
0xba98 /* channel_sel1 */
@@ -375,9 +378,10 @@
1 /*clk_auto_generate*/
0>; /*pixel_clk(unit in Hz)*/
p2p_attr = <
10 /* teyp: 0=ceds, 1=cmpi, 2=isp, 3=epi,
* 10=chpi, 11=cspi, 12=usit
*/
0x10 /* p2p_teyp:
* 0x0=ceds, 0x1=cmpi, 0x2=isp, 0x3=epi,
* 0x10=chpi, 0x11=cspi, 0x12=usit
*/
12 /* channel_num */
0x76543210 /* channel_sel0 */
0xba98 /* channel_sel1 */

28
arch/arm/boot/dts/amlogic/mesontl1_t309-panel.dtsi
View File

@@ -433,9 +433,10 @@
1 /*clk_auto_generate*/
0>; /*pixel_clk(unit in Hz)*/
p2p_attr = <
0 /* teyp: 0=ceds, 1=cmpi, 2=isp, 3=epi,
* 10=chpi, 11=cspi, 12=usit
*/
0x0 /* p2p_teyp:
* 0x0=ceds, 0x1=cmpi, 0x2=isp, 0x3=epi,
* 0x10=chpi, 0x11=cspi, 0x12=usit
*/
12 /* channel_num */
0x76543210 /* channel_sel0 */
0xba98 /* channel_sel1 */
@@ -481,9 +482,10 @@
1 /*clk_auto_generate*/
0>; /*pixel_clk(unit in Hz)*/
p2p_attr = <
0 /* teyp: 0=ceds, 1=cmpi, 2=isp, 3=epi,
* 10=chpi, 11=cspi, 12=usit
*/
0x0 /* p2p_teyp:
* 0x0=ceds, 0x1=cmpi, 0x2=isp, 0x3=epi,
* 0x10=chpi, 0x11=cspi, 0x12=usit
*/
6 /* channel_num */
0x76543210 /* channel_sel0 */
0xba98 /* channel_sel1 */
@@ -528,9 +530,10 @@
1 /*clk_auto_generate*/
0>; /*pixel_clk(unit in Hz)*/
p2p_attr = <
10 /* teyp: 0=ceds, 1=cmpi, 2=isp, 3=epi,
* 10=chpi, 11=cspi, 12=usit
*/
0x10 /* p2p_teyp:
* 0x0=ceds, 0x1=cmpi, 0x2=isp, 0x3=epi,
* 0x10=chpi, 0x11=cspi, 0x12=usit
*/
6 /* channel_num */
0x76543210 /* channel_sel0 */
0xba98 /* channel_sel1 */
@@ -575,9 +578,10 @@
1 /*clk_auto_generate*/
0>; /*pixel_clk(unit in Hz)*/
p2p_attr = <
10 /* teyp: 0=ceds, 1=cmpi, 2=isp, 3=epi,
* 10=chpi, 11=cspi, 12=usit
*/
0x10 /* p2p_teyp:
* 0x0=ceds, 0x1=cmpi, 0x2=isp, 0x3=epi,
* 0x10=chpi, 0x11=cspi, 0x12=usit
*/
12 /* channel_num */
0x76543210 /* channel_sel0 */
0xba98 /* channel_sel1 */

28
arch/arm/boot/dts/amlogic/mesontl1_x301-panel.dtsi
View File

@@ -436,9 +436,10 @@
1 /*clk_auto_generate*/
0>; /*pixel_clk(unit in Hz)*/
p2p_attr = <
0 /* teyp: 0=ceds, 1=cmpi, 2=isp, 3=epi,
* 10=chpi, 11=cspi, 12=usit
*/
0x0 /* p2p_teyp:
* 0x0=ceds, 0x1=cmpi, 0x2=isp, 0x3=epi,
* 0x10=chpi, 0x11=cspi, 0x12=usit
*/
12 /* channel_num */
0x76543210 /* channel_sel0 */
0xba98 /* channel_sel1 */
@@ -484,9 +485,10 @@
1 /*clk_auto_generate*/
0>; /*pixel_clk(unit in Hz)*/
p2p_attr = <
0 /* teyp: 0=ceds, 1=cmpi, 2=isp, 3=epi,
* 10=chpi, 11=cspi, 12=usit
*/
0x0 /* p2p_teyp:
* 0x0=ceds, 0x1=cmpi, 0x2=isp, 0x3=epi,
* 0x10=chpi, 0x11=cspi, 0x12=usit
*/
6 /* channel_num */
0x76543210 /* channel_sel0 */
0xba98 /* channel_sel1 */
@@ -531,9 +533,10 @@
1 /*clk_auto_generate*/
0>; /*pixel_clk(unit in Hz)*/
p2p_attr = <
10 /* teyp: 0=ceds, 1=cmpi, 2=isp, 3=epi,
* 10=chpi, 11=cspi, 12=usit
*/
0x10 /* p2p_teyp:
* 0x0=ceds, 0x1=cmpi, 0x2=isp, 0x3=epi,
* 0x10=chpi, 0x11=cspi, 0x12=usit
*/
6 /* channel_num */
0x76543210 /* channel_sel0 */
0xba98 /* channel_sel1 */
@@ -578,9 +581,10 @@
1 /*clk_auto_generate*/
0>; /*pixel_clk(unit in Hz)*/
p2p_attr = <
10 /* teyp: 0=ceds, 1=cmpi, 2=isp, 3=epi,
* 10=chpi, 11=cspi, 12=usit
*/
0x10 /* p2p_teyp:
* 0x0=ceds, 0x1=cmpi, 0x2=isp, 0x3=epi,
* 0x10=chpi, 0x11=cspi, 0x12=usit
*/
12 /* channel_num */
0x76543210 /* channel_sel0 */
0xba98 /* channel_sel1 */

28
arch/arm64/boot/dts/amlogic/mesontl1_skt-panel.dtsi
View File

@@ -240,9 +240,10 @@
1 /*clk_auto_generate*/
0>; /*pixel_clk(unit in Hz)*/
p2p_attr = <
0 /* teyp: 0=ceds, 1=cmpi, 2=isp, 3=epi,
* 10=chpi, 11=cspi, 12=usit
*/
0x0 /* p2p_teyp:
* 0x0=ceds, 0x1=cmpi, 0x2=isp, 0x3=epi,
* 0x10=chpi, 0x11=cspi, 0x12=usit
*/
12 /* channel_num */
0x76543210 /* channel_sel0 */
0xba98 /* channel_sel1 */
@@ -285,9 +286,10 @@
1 /*clk_auto_generate*/
0>; /*pixel_clk(unit in Hz)*/
p2p_attr = <
0 /* teyp: 0=ceds, 1=cmpi, 2=isp, 3=epi,
* 10=chpi, 11=cspi, 12=usit
*/
0x0 /* p2p_teyp:
* 0x0=ceds, 0x1=cmpi, 0x2=isp, 0x3=epi,
* 0x10=chpi, 0x11=cspi, 0x12=usit
*/
6 /* channel_num */
0x76543210 /* channel_sel0 */
0xba98 /* channel_sel1 */
@@ -330,9 +332,10 @@
1 /*clk_auto_generate*/
0>; /*pixel_clk(unit in Hz)*/
p2p_attr = <
10 /* teyp: 0=ceds, 1=cmpi, 2=isp, 3=epi,
* 10=chpi, 11=cspi, 12=usit
*/
0x10 /* p2p_teyp:
* 0x0=ceds, 0x1=cmpi, 0x2=isp, 0x3=epi,
* 0x10=chpi, 0x11=cspi, 0x12=usit
*/
6 /* channel_num */
0x76543210 /* channel_sel0 */
0xba98 /* channel_sel1 */
@@ -375,9 +378,10 @@
1 /*clk_auto_generate*/
0>; /*pixel_clk(unit in Hz)*/
p2p_attr = <
10 /* teyp: 0=ceds, 1=cmpi, 2=isp, 3=epi,
* 10=chpi, 11=cspi, 12=usit
*/
0x10 /* p2p_teyp:
* 0x0=ceds, 0x1=cmpi, 0x2=isp, 0x3=epi,
* 0x10=chpi, 0x11=cspi, 0x12=usit
*/
12 /* channel_num */
0x76543210 /* channel_sel0 */
0xba98 /* channel_sel1 */

28
arch/arm64/boot/dts/amlogic/mesontl1_t309-panel.dtsi
View File

@@ -433,9 +433,10 @@
1 /*clk_auto_generate*/
0>; /*pixel_clk(unit in Hz)*/
p2p_attr = <
0 /* teyp: 0=ceds, 1=cmpi, 2=isp, 3=epi,
* 10=chpi, 11=cspi, 12=usit
*/
0x0 /* p2p_teyp:
* 0x0=ceds, 0x1=cmpi, 0x2=isp, 0x3=epi,
* 0x10=chpi, 0x11=cspi, 0x12=usit
*/
12 /* channel_num */
0x76543210 /* channel_sel0 */
0xba98 /* channel_sel1 */
@@ -481,9 +482,10 @@
1 /*clk_auto_generate*/
0>; /*pixel_clk(unit in Hz)*/
p2p_attr = <
0 /* teyp: 0=ceds, 1=cmpi, 2=isp, 3=epi,
* 10=chpi, 11=cspi, 12=usit
*/
0x0 /* p2p_teyp:
* 0x0=ceds, 0x1=cmpi, 0x2=isp, 0x3=epi,
* 0x10=chpi, 0x11=cspi, 0x12=usit
*/
6 /* channel_num */
0x76543210 /* channel_sel0 */
0xba98 /* channel_sel1 */
@@ -528,9 +530,10 @@
1 /*clk_auto_generate*/
0>; /*pixel_clk(unit in Hz)*/
p2p_attr = <
10 /* teyp: 0=ceds, 1=cmpi, 2=isp, 3=epi,
* 10=chpi, 11=cspi, 12=usit
*/
0x10 /* p2p_teyp:
* 0x0=ceds, 0x1=cmpi, 0x2=isp, 0x3=epi,
* 0x10=chpi, 0x11=cspi, 0x12=usit
*/
6 /* channel_num */
0x76543210 /* channel_sel0 */
0xba98 /* channel_sel1 */
@@ -575,9 +578,10 @@
1 /*clk_auto_generate*/
0>; /*pixel_clk(unit in Hz)*/
p2p_attr = <
10 /* teyp: 0=ceds, 1=cmpi, 2=isp, 3=epi,
* 10=chpi, 11=cspi, 12=usit
*/
0x10 /* p2p_teyp:
* 0x0=ceds, 0x1=cmpi, 0x2=isp, 0x3=epi,
* 0x10=chpi, 0x11=cspi, 0x12=usit
*/
12 /* channel_num */
0x76543210 /* channel_sel0 */
0xba98 /* channel_sel1 */

28
arch/arm64/boot/dts/amlogic/mesontl1_x301-panel.dtsi
View File

@@ -436,9 +436,10 @@
1 /*clk_auto_generate*/
0>; /*pixel_clk(unit in Hz)*/
p2p_attr = <
0 /* teyp: 0=ceds, 1=cmpi, 2=isp, 3=epi,
* 10=chpi, 11=cspi, 12=usit
*/
0x0 /* p2p_teyp:
* 0x0=ceds, 0x1=cmpi, 0x2=isp, 0x3=epi,
* 0x10=chpi, 0x11=cspi, 0x12=usit
*/
12 /* channel_num */
0x76543210 /* channel_sel0 */
0xba98 /* channel_sel1 */
@@ -484,9 +485,10 @@
1 /*clk_auto_generate*/
0>; /*pixel_clk(unit in Hz)*/
p2p_attr = <
0 /* teyp: 0=ceds, 1=cmpi, 2=isp, 3=epi,
* 10=chpi, 11=cspi, 12=usit
*/
0x0 /* p2p_teyp:
* 0x0=ceds, 0x1=cmpi, 0x2=isp, 0x3=epi,
* 0x10=chpi, 0x11=cspi, 0x12=usit
*/
6 /* channel_num */
0x76543210 /* channel_sel0 */
0xba98 /* channel_sel1 */
@@ -531,9 +533,10 @@
1 /*clk_auto_generate*/
0>; /*pixel_clk(unit in Hz)*/
p2p_attr = <
10 /* teyp: 0=ceds, 1=cmpi, 2=isp, 3=epi,
* 10=chpi, 11=cspi, 12=usit
*/
0x10 /* p2p_teyp:
* 0x0=ceds, 0x1=cmpi, 0x2=isp, 0x3=epi,
* 0x10=chpi, 0x11=cspi, 0x12=usit
*/
6 /* channel_num */
0x76543210 /* channel_sel0 */
0xba98 /* channel_sel1 */
@@ -578,9 +581,10 @@
1 /*clk_auto_generate*/
0>; /*pixel_clk(unit in Hz)*/
p2p_attr = <
10 /* teyp: 0=ceds, 1=cmpi, 2=isp, 3=epi,
* 10=chpi, 11=cspi, 12=usit
*/
0x10 /* p2p_teyp:
* 0x0=ceds, 0x1=cmpi, 0x2=isp, 0x3=epi,
* 0x10=chpi, 0x11=cspi, 0x12=usit
*/
12 /* channel_num */
0x76543210 /* channel_sel0 */
0xba98 /* channel_sel1 */

4
drivers/amlogic/media/vout/lcd/lcd_clk_config.c
View File

@@ -752,10 +752,6 @@ static void lcd_set_tcon_clk(struct lcd_config_s *pconf)
switch (pconf->lcd_basic.lcd_type) {
case LCD_MLVDS:
case LCD_P2P:
/* tcon_clk 50M */
/*lcd_hiu_write(HHI_TCON_CLK_CNTL,
* (1 << 7) | (1 << 6) | (7 << 0));
*/
if (!IS_ERR_OR_NULL(lcd_clktree.tcon_clk)) {
clk_set_rate(lcd_clktree.tcon_clk, 50000000);
clk_prepare_enable(lcd_clktree.tcon_clk);

128
drivers/amlogic/media/vout/lcd/lcd_debug.c
View File

@@ -285,13 +285,13 @@ static int lcd_info_print_ttl(char *buf, int offset)
n = lcd_debug_info_len(len + offset);
len += snprintf((buf+len), n,
"clk_pol %u\n"
"hvsync_valid %u\n"
"de_valid %u\n"
"hvsync_valid %u\n"
"rb_swap %u\n"
"bit_swap %u\n\n",
pconf->lcd_control.ttl_config->clk_pol,
((pconf->lcd_control.ttl_config->sync_valid >> 0) & 1),
((pconf->lcd_control.ttl_config->sync_valid >> 1) & 1),
((pconf->lcd_control.ttl_config->sync_valid >> 0) & 1),
((pconf->lcd_control.ttl_config->swap_ctrl >> 1) & 1),
((pconf->lcd_control.ttl_config->swap_ctrl >> 0) & 1));
@@ -469,7 +469,7 @@ static int lcd_info_print_p2p(char *buf, int offset)
n = lcd_debug_info_len(len + offset);
len += snprintf((buf+len), n,
"p2p_type %d\n"
"p2p_type 0x%x\n"
"lane_num %d\n"
"channel_sel1 0x%08x\n"
"channel_sel1 0x%08x\n"
@@ -988,7 +988,7 @@ static int lcd_reg_print_p2p(char *buf, int offset)
len += snprintf((buf+len), n, "\np2p regs:\n");
n = lcd_debug_info_len(len + offset);
reg = HHI_TCON_CLK_CNTL_TL1;
reg = HHI_TCON_CLK_CNTL;
len += snprintf((buf+len), n,
"HHI_TCON_CLK_CNTL [0x%04x] = 0x%08x\n",
reg, lcd_hiu_read(reg));
@@ -2056,7 +2056,7 @@ static ssize_t lcd_debug_change_store(struct class *class,
break;
case 'p':
p2p_conf = pconf->lcd_control.p2p_config;
ret = sscanf(buf, "p2p %d %d %x %x %d %d",
ret = sscanf(buf, "p2p %x %d %x %x %d %d",
&val[0], &val[1], &val[2], &val[3], &val[4], &val[5]);
if (ret == 6) {
p2p_conf->p2p_type = val[0];
@@ -2066,7 +2066,7 @@ static ssize_t lcd_debug_change_store(struct class *class,
p2p_conf->pn_swap = val[4];
p2p_conf->bit_swap = val[5];
pr_info("change p2p config:\n"
"p2p_type=%d, lane_num=%d,\n"
"p2p_type=0x%x, lane_num=%d,\n"
"channel_sel0=0x%08x, channel_sel1=0x%08x,\n"
"pn_swap=%d, bit_swap=%d\n",
p2p_conf->p2p_type, p2p_conf->lane_num,
@@ -3166,10 +3166,11 @@ static const char *lcd_mlvds_debug_usage_str = {
static const char *lcd_p2p_debug_usage_str = {
"Usage:\n"
" echo <lane_num> <channel_sel0> <channel_sel1> <clk_phase> <pn_swap> <bit_swap> > minilvds ; set minilvds config\n"
" echo <p2p_type> <lane_num> <channel_sel0> <channel_sel1> <pn_swap> <bit_swap> > p2p ; set p2p config\n"
"data format:\n"
" <channel_sel> : minilvds 8 channels mapping in tx 10 channels\n"
" <clk_phase> : bit[13:12]=clk01_pi_sel, bit[11:8]=pi2, bit[7:4]=pi1, bit[3:0]=pi0\n"
" <p2p_type> : 0x0=ceds, 0x1=cmpi, 0x2=isp, 0x3=epi,\n"
" 0x10=chpi, 0x11=cspi, 0x12=usit\n"
" <channel_sel> : 12 channels mapping\n"
" <pn_swap> : 0=normal, 1=swap p/n channels\n"
" <bit_swap> : 0=normal, 1=swap bit LSB/MSB\n"
"\n"
@@ -3200,37 +3201,128 @@ static const char *lcd_debug_tcon_usage_str = {
static ssize_t lcd_ttl_debug_show(struct class *class,
struct class_attribute *attr, char *buf)
{
return sprintf(buf, "%s\n", lcd_ttl_debug_usage_str);
int len = 0;
struct aml_lcd_drv_s *lcd_drv = aml_lcd_get_driver();
struct ttl_config_s *ttl_conf;
ttl_conf = lcd_drv->lcd_config->lcd_control.ttl_config;
len += sprintf(buf+len,
"ttl config: clk_pol=%d, de_valid=%d, hvsync_valid=%d,",
ttl_conf->clk_pol,
(ttl_conf->sync_valid >> 1) & 0x1,
(ttl_conf->sync_valid >> 0) & 0x1);
len += sprintf(buf+len, "rb_swap=%d, bit_swap=%d\n\n",
(ttl_conf->swap_ctrl >> 1) & 0x1,
(ttl_conf->swap_ctrl >> 0) & 0x1);
len += sprintf(buf+len, "%s\n", lcd_ttl_debug_usage_str);
return len;
}
static ssize_t lcd_lvds_debug_show(struct class *class,
struct class_attribute *attr, char *buf)
{
return sprintf(buf, "%s\n", lcd_lvds_debug_usage_str);
int len = 0;
struct aml_lcd_drv_s *lcd_drv = aml_lcd_get_driver();
struct lvds_config_s *lvds_conf;
lvds_conf = lcd_drv->lcd_config->lcd_control.lvds_config;
len += sprintf(buf+len, "lvds config: repack=%d, dual_port=%d,",
lvds_conf->lvds_repack, lvds_conf->dual_port);
len += sprintf(buf+len, "pn_swap=%d, port_swap=%d, lane_reverse=%d\n\n",
lvds_conf->pn_swap, lvds_conf->port_swap,
lvds_conf->lane_reverse);
len += sprintf(buf+len, "%s\n", lcd_lvds_debug_usage_str);
return len;
}
static ssize_t lcd_vx1_debug_show(struct class *class,
struct class_attribute *attr, char *buf)
{
return sprintf(buf, "%s\n", lcd_vbyone_debug_usage_str);
int len = 0;
struct aml_lcd_drv_s *lcd_drv = aml_lcd_get_driver();
struct vbyone_config_s *vx1_conf;
vx1_conf = lcd_drv->lcd_config->lcd_control.vbyone_config;
len += sprintf(buf+len, "vbyone config: lane_count=%d,",
vx1_conf->lane_count);
len += sprintf(buf+len, "region_num=%d, byte_mode=%d\n\n",
vx1_conf->region_num, vx1_conf->byte_mode);
len += sprintf(buf+len, "%s\n", lcd_vbyone_debug_usage_str);
return len;
}
static ssize_t lcd_mipi_debug_show(struct class *class,
struct class_attribute *attr, char *buf)
{
return sprintf(buf, "%s\n", lcd_mipi_debug_usage_str);
int len = 0;
struct aml_lcd_drv_s *lcd_drv = aml_lcd_get_driver();
struct dsi_config_s *dsi_conf;
dsi_conf = lcd_drv->lcd_config->lcd_control.mipi_config;
len += sprintf(buf+len, "mipi_dsi config: lane_num=%d, ",
dsi_conf->lane_num);
len += sprintf(buf+len, "bit_rate_max=%dMhz, factor_numerator=%d, ",
dsi_conf->bit_rate_max, dsi_conf->factor_numerator);
len += sprintf(buf+len,
"operation_mode_init=%d, operation_mode_display=%d, ",
dsi_conf->operation_mode_init,
dsi_conf->operation_mode_display);
len += sprintf(buf+len,
"video_mode_type=%d, clk_always_hs=%d, phy_switch=%d\n\n",
dsi_conf->video_mode_type, dsi_conf->clk_always_hs,
dsi_conf->phy_switch);
len += sprintf(buf+len, "%s\n", lcd_mipi_debug_usage_str);
return len;
}
static ssize_t lcd_mlvds_debug_show(struct class *class,
struct class_attribute *attr, char *buf)
{
return sprintf(buf, "%s\n", lcd_mlvds_debug_usage_str);
int len = 0;
struct aml_lcd_drv_s *lcd_drv = aml_lcd_get_driver();
struct mlvds_config_s *mlvds_conf;
mlvds_conf = lcd_drv->lcd_config->lcd_control.mlvds_config;
len += sprintf(buf+len, "minilvds config: channel_num=%d, ",
mlvds_conf->channel_num);
len += sprintf(buf+len, "channel_sel0=0x%08x, channel_sel1=0x%08x, ",
mlvds_conf->channel_sel0, mlvds_conf->channel_sel1);
len += sprintf(buf+len, "clk_phase=0x%04x, pn_swap=%d, bit_swap=%d\n\n",
mlvds_conf->clk_phase,
mlvds_conf->pn_swap, mlvds_conf->bit_swap);
len += sprintf(buf+len, "%s\n", lcd_mlvds_debug_usage_str);
return len;
}
static ssize_t lcd_p2p_debug_show(struct class *class,
struct class_attribute *attr, char *buf)
{
return sprintf(buf, "%s\n", lcd_p2p_debug_usage_str);
int len = 0;
struct aml_lcd_drv_s *lcd_drv = aml_lcd_get_driver();
struct p2p_config_s *p2p_conf;
p2p_conf = lcd_drv->lcd_config->lcd_control.p2p_config;
len += sprintf(buf+len, "p2p config: p2p_type=0x%x, lane_num=%d, ",
p2p_conf->p2p_type, p2p_conf->lane_num);
len += sprintf(buf+len, "channel_sel0=0x%08x, channel_sel1=0x%08x, ",
p2p_conf->channel_sel0, p2p_conf->channel_sel1);
len += sprintf(buf+len, "pn_swap=%d, bit_swap=%d\n\n",
p2p_conf->pn_swap, p2p_conf->bit_swap);
len += sprintf(buf+len, "%s\n", lcd_p2p_debug_usage_str);
return len;
}
static ssize_t lcd_tcon_debug_show(struct class *class,
@@ -3252,7 +3344,7 @@ static ssize_t lcd_ttl_debug_store(struct class *class,
&temp[0], &temp[1], &temp[2], &temp[3], &temp[4]);
if (ret == 5) {
pr_info("set ttl config:\n"
"clk_pol=%d, de_valid=%d, de_valid=%d\n"
"clk_pol=%d, de_valid=%d, hvsync_valid=%d\n"
"rb_swap=%d, bit_swap=%d\n",
temp[0], temp[1], temp[2], temp[3], temp[4]);
ttl_conf->clk_pol = temp[0];
@@ -3474,13 +3566,13 @@ static ssize_t lcd_p2p_debug_store(struct class *class,
struct p2p_config_s *p2p_conf;
p2p_conf = lcd_drv->lcd_config->lcd_control.p2p_config;
ret = sscanf(buf, "%d %d %x %x %d %d",
ret = sscanf(buf, "%x %d %x %x %d %d",
&p2p_conf->p2p_type, &p2p_conf->lane_num,
&p2p_conf->channel_sel0, &p2p_conf->channel_sel1,
&p2p_conf->pn_swap, &p2p_conf->bit_swap);
if (ret == 6) {
pr_info("set p2p config:\n"
"p2p_type=%d, lane_num=%d,\n"
"p2p_type=0x%x, lane_num=%d,\n"
"channel_sel0=0x%08x, channel_sel1=0x%08x,\n"
"pn_swap=%d, bit_swap=%d\n",
p2p_conf->p2p_type, p2p_conf->lane_num,

3
drivers/amlogic/media/vout/lcd/lcd_reg.h
View File

@@ -211,8 +211,7 @@
#define HHI_DIF_TCON_CNTL0 0x3c
#define HHI_DIF_TCON_CNTL1 0x3d
#define HHI_DIF_TCON_CNTL2 0x3e
#define HHI_TCON_CLK_CNTL 0xf0
#define HHI_TCON_CLK_CNTL_TL1 0x9c
#define HHI_TCON_CLK_CNTL 0x9c
/* Global control: RESET_CBUS_BASE = 0x11 */
#define VERSION_CTRL 0x1100

2
include/linux/amlogic/media/vout/lcd/lcd_vout.h
View File

@@ -342,7 +342,7 @@ enum p2p_type_e {
P2P_CMPI,
P2P_ISP,
P2P_EPI,
P2P_CHPI = 10, /* low common mode */
P2P_CHPI = 0x10, /* low common mode */
P2P_CSPI,
P2P_USIT,
P2P_MAX,