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UPSTREAM: usb: dwc2: Add msleep for host-only

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Although a host-only controller should not have any associated delay,
some rockchip SOC platforms will not show the correct host-values of
registers until after a delay.

So add a 50 ms sleep when in host-only mode.

Change-Id: I3f4963b3ad00a49ed60fe9f27c83939ed5b4742a
Signed-off-by: John Youn <johnyoun@synopsys.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Signed-off-by: William Wu <william.wu@rock-chips.com>
(cherry picked from commit a07ce8d34e)
This commit is contained in:
Heiko Stuebner
2016-10-14 10:47:24 -07:00
committed by Tao Huang
parent 7d5c96662a
commit c456bcd090
1 changed files with 10 additions and 1 deletions
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11
drivers/usb/dwc2/core.c
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@@ -463,9 +463,18 @@ static void dwc2_clear_force_mode(struct dwc2_hsotg *hsotg)
*/
void dwc2_force_dr_mode(struct dwc2_hsotg *hsotg)
{
bool ret;
switch (hsotg->dr_mode) {
case USB_DR_MODE_HOST:
dwc2_force_mode(hsotg, true);
ret = dwc2_force_mode(hsotg, true);
/*
* NOTE: This is required for some rockchip soc based
* platforms on their host-only dwc2.
*/
if (!ret)
msleep(50);
break;
case USB_DR_MODE_PERIPHERAL:
dwc2_force_mode(hsotg, false);