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add prescale mode | dim mode support

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This commit is contained in:
zsq
2012-03-27 19:43:13 -08:00
parent 8eb9d81478
commit c4587fd9f4
4 changed files with 56 additions and 58 deletions
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2
drivers/video/rockchip/rga/RGA_API.c
View File

@@ -148,7 +148,7 @@ uint32_t RGA_gen_two_pro(struct rga_req *msg, struct rga_req *msg1)
msg->dst.act_h = dah;
msg->dst.vir_h = dah;
//msg->dst.yrgb_addr = (u32)rga_service.pre_scale_buf;
msg->dst.yrgb_addr = (u32)rga_service.pre_scale_buf;
msg->dst.uv_addr = msg->dst.yrgb_addr + stride * dah;
msg->dst.v_addr = msg->dst.uv_addr + ((stride * dah) >> 1);

91
drivers/video/rockchip/rga/rga_drv.c
View File

@@ -49,10 +49,10 @@
#include "rga_mmu_info.h"
#include "RGA_API.h"
#include "bug_320x240_swap0_ABGR8888.h"
//#include "bug_320x240_swap0_ABGR8888.h"
#define RGA_TEST 0
#define RGA_TEST 0
#define RGA_TEST_TIME 0
#define PRE_SCALE_BUF_SIZE 2048*1024*4
@@ -152,7 +152,6 @@ static void rga_soft_reset(void)
ERR("soft reset timeout.\n");
}
static void rga_dump(void)
{
int running;
@@ -405,13 +404,7 @@ static struct rga_reg * rga_reg_init(rga_session *session, struct rga_req *req)
return NULL;
}
}
}
#if RGA_TEST_TIME
rga_end = ktime_get();
rga_end = ktime_sub(rga_end, rga_start);
printk("one cmd end time %d\n", (int)ktime_to_us(rga_end));
#endif
RGA_gen_reg_info(req, (uint8_t *)reg->cmd_reg);
spin_lock_irqsave(&rga_service.lock, flag);
@@ -465,6 +458,7 @@ static struct rga_reg * rga_reg_init_2(rga_session *session, struct rga_req *req
RGA_gen_reg_info(req0, (uint8_t *)reg0->cmd_reg);
if(req1->mmu_info.mmu_en)
{
ret = rga_set_mmu_info(reg1, req1);
@@ -473,17 +467,9 @@ static struct rga_reg * rga_reg_init_2(rga_session *session, struct rga_req *req
break;
}
}
}
RGA_gen_reg_info(req1, (uint8_t *)reg1->cmd_reg);
RGA_gen_reg_info(req1, (uint8_t *)reg1->cmd_reg);
{
uint32_t i;
for(i=0; i<28; i++)
{
printk("reg1->cmd_reg[%d] is %.8x\n", i, reg1->cmd_reg[i]);
}
}
spin_lock_irqsave(&rga_service.lock, flag);
list_add_tail(&reg0->status_link, &rga_service.waiting);
list_add_tail(&reg0->session_link, &session->waiting);
@@ -635,11 +621,17 @@ static void rga_try_set_reg(uint32_t num)
/* All CMD finish int */
rga_write(0x1<<10, RGA_INT);
#if RGA_TEST_TIME
rga_start = ktime_get();
#endif
/* Start proc */
atomic_set(&reg->session->done, 0);
rga_write(0x1, RGA_CMD_CTRL);
#if RGA_TEST
{
uint32_t i;
@@ -702,7 +694,7 @@ static int rga_blit_async(rga_session *session, struct rga_req *req)
if(ret == -EINVAL) {
return -EINVAL;
}
}
reg = rga_reg_init(session, req);
if(reg == NULL) {
return -EFAULT;
@@ -745,6 +737,8 @@ static int rga_blit_sync(rga_session *session, struct rga_req *req)
daw = req->dst.act_w;
dah = req->dst.act_h;
printk("req->rotate_mode = %.8x, req->scale_mode = %.8x\n", req->rotate_mode, req->scale_mode);
if((req->render_mode == bitblt_mode) && (((saw>>1) >= daw) || ((sah>>1) >= dah)))
{
/* generate 2 cmd for pre scale */
@@ -777,37 +771,35 @@ static int rga_blit_sync(rga_session *session, struct rga_req *req)
{
return -EFAULT;
}
}
reg = rga_reg_init(session, req);
if(reg == NULL)
{
return -EFAULT;
}
}
atomic_set(&reg->int_enable, 1);
rga_try_set_reg(1);
}
}
ret_timeout = wait_event_interruptible_timeout(session->wait, atomic_read(&session->done), RGA_TIMEOUT_DELAY);
if (unlikely(ret_timeout< 0))
{
pr_err("pid %d wait task ret %d\n", session->pid, ret_timeout);
}
}
else if (0 == ret_timeout)
{
pr_err("pid %d wait %d task done timeout\n", session->pid, atomic_read(&session->task_running));
ret = -ETIMEDOUT;
}
return ret;
#if RGA_TEST_TIME
rga_end = ktime_get();
rga_end = ktime_sub(rga_end, rga_start);
printk("one cmd end time %d\n", (int)ktime_to_us(rga_end));
#endif
return ret;
}
@@ -817,9 +809,7 @@ static long rga_ioctl(struct file *file, uint32_t cmd, unsigned long arg)
int ret = 0;
rga_session *session = (rga_session *)file->private_data;
#if RGA_TEST_TIME
rga_start = ktime_get();
if (NULL == session)
{
@@ -866,7 +856,6 @@ static long rga_ioctl(struct file *file, uint32_t cmd, unsigned long arg)
if(req != NULL) {
kfree(req);
}
}
return ret;
}
@@ -1293,6 +1282,14 @@ static int __init rga_init(void)
return ret;
}
#if 0
{
uint32_t i;
for(i=0; i<10; i++)
rga_test_0();
}
#endif
//rga_test_0();
INFO("Module initialized.\n");
@@ -1319,7 +1316,7 @@ static void __exit rga_exit(void)
}
#if 0
extern struct fb_info * rk_get_fb(int fb_id);
EXPORT_SYMBOL(rk_get_fb);
@@ -1327,6 +1324,7 @@ extern void rk_direct_fb_show(struct fb_info * fbi);
EXPORT_SYMBOL(rk_direct_fb_show);
extern uint32_t ABGR8888_320_240_swap0[240][320];
//unsigned int src_buf[1280*800];
unsigned int dst_buf[1280*800];
void rga_test_0(void)
@@ -1371,14 +1369,16 @@ void rga_test_0(void)
req.src.vir_w = 320;
req.src.vir_h = 240;
req.src.yrgb_addr = (uint32_t)src;
req.src.uv_addr = ((uint32_t)src + 1920*1080);
req.src.format = 0;
req.dst.act_w = 100;
req.dst.act_w = 320;
req.dst.act_h = 240;
req.dst.vir_w = 1280;
req.dst.vir_h = 800;
req.dst.vir_h = 800;
req.dst.x_offset = 200;
req.dst.x_offset = 0;
req.dst.y_offset = 000;
req.dst.yrgb_addr = (uint32_t)dst;
req.clip.xmin = 0;
@@ -1386,10 +1386,15 @@ void rga_test_0(void)
req.clip.ymin = 0;
req.clip.ymax = 799;
req.render_mode = color_fill_mode ;
req.color_fill_mode = 0;
req.fg_color = 0xa0a0a0a0;
req.rotate_mode = 1;
req.scale_mode = 2;
req.alpha_rop_flag = 0;
req.sina = 0;
req.cosa = 0x10000;

14
drivers/video/rockchip/rga/rga_mmu_info.c
View File

@@ -644,7 +644,7 @@ static int rga_mmu_info_color_palette_mode(struct rga_reg *reg, struct rga_req *
* change the buf address in req struct
* for the reason of lie to MMU
*/
req->mmu_info.base_addr = virt_to_phys(MMU_Base);
req->mmu_info.base_addr = (virt_to_phys(MMU_Base)>>2);
req->src.yrgb_addr = (req->src.yrgb_addr & (~PAGE_MASK)) | (CMDMemSize << PAGE_SHIFT);
req->dst.yrgb_addr = (req->dst.yrgb_addr & (~PAGE_MASK)) | ((CMDMemSize + SrcMemSize) << PAGE_SHIFT);
@@ -750,7 +750,7 @@ static int rga_mmu_info_color_fill_mode(struct rga_reg *reg, struct rga_req *req
* change the buf address in req struct
*/
req->mmu_info.base_addr = virt_to_phys(MMU_Base);
req->mmu_info.base_addr = (virt_to_phys(MMU_Base)>>2);
req->dst.yrgb_addr = (req->dst.yrgb_addr & (~PAGE_MASK)) | ((CMDMemSize) << PAGE_SHIFT);
/*record the malloc buf for the cmd end to release*/
@@ -848,7 +848,7 @@ static int rga_mmu_info_line_point_drawing_mode(struct rga_reg *reg, struct rga_
* change the buf address in req struct
* for the reason of lie to MMU
*/
req->mmu_info.base_addr = virt_to_phys(MMU_Base);
req->mmu_info.base_addr = (virt_to_phys(MMU_Base) >> 2);
req->dst.yrgb_addr = (req->dst.yrgb_addr & (~PAGE_MASK)) | ((CMDMemSize) << PAGE_SHIFT);
@@ -979,7 +979,7 @@ static int rga_mmu_info_blur_sharp_filter_mode(struct rga_reg *reg, struct rga_r
* change the buf address in req struct
* for the reason of lie to MMU
*/
req->mmu_info.base_addr = virt_to_phys(MMU_Base);
req->mmu_info.base_addr = (virt_to_phys(MMU_Base) >> 2);
req->src.yrgb_addr = (req->src.yrgb_addr & (~PAGE_MASK)) | (CMDMemSize << PAGE_SHIFT);
req->src.uv_addr = (req->src.uv_addr & (~PAGE_MASK)) | (CMDMemSize << PAGE_SHIFT);
@@ -1144,7 +1144,7 @@ static int rga_mmu_info_pre_scale_mode(struct rga_reg *reg, struct rga_req *req)
* for the reason of lie to MMU
*/
req->mmu_info.base_addr = virt_to_phys(MMU_Base)>>2;
req->mmu_info.base_addr = (virt_to_phys(MMU_Base)>>2);
req->src.yrgb_addr = (req->src.yrgb_addr & (~PAGE_MASK)) | (CMDMemSize << PAGE_SHIFT);
req->src.uv_addr = (req->src.uv_addr & (~PAGE_MASK)) | (CMDMemSize << PAGE_SHIFT);
@@ -1247,7 +1247,7 @@ static int rga_mmu_info_update_palette_table_mode(struct rga_reg *reg, struct rg
* change the buf address in req struct
* for the reason of lie to MMU
*/
req->mmu_info.base_addr = virt_to_phys(MMU_Base);
req->mmu_info.base_addr = (virt_to_phys(MMU_Base) >> 2);
req->src.yrgb_addr = (req->src.yrgb_addr & (~PAGE_MASK)) | (CMDMemSize << PAGE_SHIFT);
@@ -1344,7 +1344,7 @@ static int rga_mmu_info_update_patten_buff_mode(struct rga_reg *reg, struct rga_
* change the buf address in req struct
* for the reason of lie to MMU
*/
req->mmu_info.base_addr = virt_to_phys(MMU_Base);
req->mmu_info.base_addr = (virt_to_phys(MMU_Base) >> 2);
req->src.yrgb_addr = (req->src.yrgb_addr & (~PAGE_MASK)) | (CMDMemSize << PAGE_SHIFT);

7
drivers/video/rockchip/rga/rga_reg_info.c
View File

@@ -1003,11 +1003,6 @@ RGA_set_bitblt_reg_info(u8 *base, const struct rga_req * msg, TILE_INFO *tile)
xp = CLIP(xp, msg->src.x_offset, msg->src.x_offset + msg->src.act_w - 1);
yp = CLIP(yp, msg->src.y_offset, msg->src.y_offset + msg->src.act_h - 1);
}
printk("xoffset = %.8x\n", msg->src.x_offset);
printk("yoffset = %.8x\n", msg->src.y_offset);
printk("xp = %.8x\n", xp);
printk("yp = %.8x\n", yp);
switch(msg->src.format)
{
@@ -1052,8 +1047,6 @@ RGA_set_bitblt_reg_info(u8 *base, const struct rga_req * msg, TILE_INFO *tile)
break;
}
printk("y_addr is %.8x\n", y_addr);
*bRGA_SRC_Y_MST = y_addr;
*bRGA_SRC_CB_MST = u_addr;
*bRGA_SRC_CR_MST = v_addr;