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PM / devfreq: rockchip_dmc: use rockchip_drm_get_sub_dev_type to get lcdc_type
Change-Id: Ic1eb21c6b6b45a2c8c36d3666a987a32f3b50f05 Signed-off-by: YouMin Chen <cym@rock-chips.com>
This commit is contained in:
@@ -55,6 +55,8 @@
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#include "governor.h"
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#include "rockchip_dmc_timing.h"
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#include "../clk/rockchip/clk.h"
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#include "../gpu/drm/rockchip/rockchip_drm_drv.h"
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#define system_status_to_dmcfreq(nb) container_of(nb, struct rockchip_dmcfreq, \
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status_nb)
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@@ -138,6 +140,7 @@ struct rockchip_dmcfreq {
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struct monitor_dev_info *mdev_info;
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struct rl_map_table *vop_pn_rl_tbl;
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struct delayed_work msch_rl_work;
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struct share_params *set_rate_params;
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unsigned long *nocp_bw;
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unsigned long rate, target_rate;
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@@ -338,21 +341,8 @@ rk3328_de_skew_setting_2_register(struct rk3328_ddr_de_skew_setting *de_skew,
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static int rk_drm_get_lcdc_type(void)
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{
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struct drm_device *drm;
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u32 lcdc_type = 0;
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u32 lcdc_type = rockchip_drm_get_sub_dev_type();
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drm = drm_device_get_by_name("rockchip");
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if (drm) {
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struct drm_connector *conn;
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list_for_each_entry(conn, &drm->mode_config.connector_list,
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head) {
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if (conn->encoder) {
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lcdc_type = conn->connector_type;
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break;
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}
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}
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}
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switch (lcdc_type) {
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case DRM_MODE_CONNECTOR_DPI:
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case DRM_MODE_CONNECTOR_LVDS:
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@@ -505,6 +495,12 @@ static int rockchip_dmcfreq_target(struct device *dev, unsigned long *freq,
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cond_resched();
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dev_dbg(dev, "%lu-->%lu\n", old_clk_rate, target_rate);
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if (dmcfreq->set_rate_params) {
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dmcfreq->set_rate_params->lcdc_type = rk_drm_get_lcdc_type();
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dmcfreq->set_rate_params->wait_flag1 = 1;
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dmcfreq->set_rate_params->wait_flag0 = 1;
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}
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if (dmcfreq->is_set_rate_direct)
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err = rockchip_ddr_set_rate(target_rate);
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else
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@@ -1373,6 +1369,10 @@ static __maybe_unused int px30_dmc_init(struct platform_device *pdev,
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complt_hwirq = irqd_to_hwirq(complt_irq_data);
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ddr_psci_param->complt_hwirq = complt_hwirq;
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dmcfreq->set_rate_params = ddr_psci_param;
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rockchip_set_ddrclk_params(dmcfreq->set_rate_params);
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rockchip_set_ddrclk_dmcfreq_wait_complete(rockchip_dmcfreq_wait_complete);
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res = sip_smc_dram(SHARE_PAGE_TYPE_DDR, 0,
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ROCKCHIP_SIP_CONFIG_DRAM_INIT);
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if (res.a0) {
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@@ -1446,6 +1446,10 @@ static __maybe_unused int rk1808_dmc_init(struct platform_device *pdev,
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}
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disable_irq(complt_irq);
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dmcfreq->set_rate_params = ddr_psci_param;
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rockchip_set_ddrclk_params(dmcfreq->set_rate_params);
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rockchip_set_ddrclk_dmcfreq_wait_complete(rockchip_dmcfreq_wait_complete);
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res = sip_smc_dram(SHARE_PAGE_TYPE_DDR, 0,
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ROCKCHIP_SIP_CONFIG_DRAM_INIT);
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if (res.a0) {
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@@ -1463,12 +1467,6 @@ static __maybe_unused int rk3128_dmc_init(struct platform_device *pdev,
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struct rockchip_dmcfreq *dmcfreq)
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{
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struct arm_smccc_res res;
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struct drm_device *drm = drm_device_get_by_name("rockchip");
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if (!drm) {
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dev_err(&pdev->dev, "Get drm_device fail\n");
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return -EPROBE_DEFER;
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}
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res = sip_smc_request_share_mem(DIV_ROUND_UP(sizeof(
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struct rk3128_ddr_dts_config_timing),
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@@ -1483,6 +1481,10 @@ static __maybe_unused int rk3128_dmc_init(struct platform_device *pdev,
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ddr_psci_param->hz = 0;
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ddr_psci_param->lcdc_type = rk_drm_get_lcdc_type();
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dmcfreq->set_rate_params = ddr_psci_param;
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rockchip_set_ddrclk_params(dmcfreq->set_rate_params);
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res = sip_smc_dram(SHARE_PAGE_TYPE_DDR, 0,
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ROCKCHIP_SIP_CONFIG_DRAM_INIT);
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@@ -1516,6 +1518,10 @@ static __maybe_unused int rk3228_dmc_init(struct platform_device *pdev,
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return -ENOMEM;
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ddr_psci_param->hz = 0;
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dmcfreq->set_rate_params = ddr_psci_param;
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rockchip_set_ddrclk_params(dmcfreq->set_rate_params);
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res = sip_smc_dram(SHARE_PAGE_TYPE_DDR, 0,
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ROCKCHIP_SIP_CONFIG_DRAM_INIT);
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@@ -1536,14 +1542,8 @@ static __maybe_unused int rk3288_dmc_init(struct platform_device *pdev,
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struct device *dev = &pdev->dev;
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struct clk *pclk_phy, *pclk_upctl, *dmc_clk;
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struct arm_smccc_res res;
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struct drm_device *drm = drm_device_get_by_name("rockchip");
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int ret;
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if (!drm) {
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dev_err(dev, "Get drm_device fail\n");
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return -EPROBE_DEFER;
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}
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dmc_clk = devm_clk_get(dev, "dmc_clk");
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if (IS_ERR(dmc_clk)) {
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dev_err(dev, "Cannot get the clk dmc_clk\n");
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@@ -1611,6 +1611,10 @@ static __maybe_unused int rk3288_dmc_init(struct platform_device *pdev,
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ddr_psci_param->hz = 0;
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ddr_psci_param->lcdc_type = rk_drm_get_lcdc_type();
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dmcfreq->set_rate_params = ddr_psci_param;
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rockchip_set_ddrclk_params(dmcfreq->set_rate_params);
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res = sip_smc_dram(SHARE_PAGE_TYPE_DDR, 0,
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ROCKCHIP_SIP_CONFIG_DRAM_INIT);
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@@ -1657,6 +1661,9 @@ static __maybe_unused int rk3328_dmc_init(struct platform_device *pdev,
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of_get_rk3328_timings(&pdev->dev, pdev->dev.of_node,
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(uint32_t *)ddr_psci_param);
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dmcfreq->set_rate_params = ddr_psci_param;
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rockchip_set_ddrclk_params(dmcfreq->set_rate_params);
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res = sip_smc_dram(SHARE_PAGE_TYPE_DDR, 0,
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ROCKCHIP_SIP_CONFIG_DRAM_INIT);
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if (res.a0) {
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@@ -1678,18 +1685,12 @@ static __maybe_unused int rk3368_dmc_init(struct platform_device *pdev,
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struct arm_smccc_res res;
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struct rk3368_dram_timing *dram_timing;
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struct clk *pclk_phy, *pclk_upctl;
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struct drm_device *drm = drm_device_get_by_name("rockchip");
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int ret;
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u32 dram_spd_bin;
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u32 addr_mcu_el3;
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u32 dclk_mode;
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u32 lcdc_type;
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if (!drm) {
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dev_err(dev, "Get drm_device fail\n");
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return -EPROBE_DEFER;
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}
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pclk_phy = devm_clk_get(dev, "pclk_phy");
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if (IS_ERR(pclk_phy)) {
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dev_err(dev, "Cannot get the clk pclk_phy\n");
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@@ -1737,6 +1738,12 @@ static __maybe_unused int rk3368_dmc_init(struct platform_device *pdev,
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if (of_property_read_u32(np, "vop-dclk-mode", &dclk_mode) == 0)
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scpi_ddr_dclk_mode(dclk_mode);
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dmcfreq->set_rate_params =
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devm_kzalloc(dev, sizeof(struct share_params), GFP_KERNEL);
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if (!dmcfreq->set_rate_params)
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return -ENOMEM;
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rockchip_set_ddrclk_params(dmcfreq->set_rate_params);
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lcdc_type = rk_drm_get_lcdc_type();
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if (scpi_ddr_init(dram_spd_bin, 0, lcdc_type,
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@@ -1792,6 +1799,12 @@ static __maybe_unused int rk3399_dmc_init(struct platform_device *pdev,
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}
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}
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dmcfreq->set_rate_params =
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devm_kzalloc(dev, sizeof(struct share_params), GFP_KERNEL);
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if (!dmcfreq->set_rate_params)
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return -ENOMEM;
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rockchip_set_ddrclk_params(dmcfreq->set_rate_params);
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arm_smccc_smc(ROCKCHIP_SIP_DRAM_FREQ, 0, 0,
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ROCKCHIP_SIP_CONFIG_DRAM_INIT,
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0, 0, 0, 0, &res);
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@@ -1951,6 +1964,10 @@ static __maybe_unused int rv1126_dmc_init(struct platform_device *pdev,
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&ddr_psci_param->update_deskew_cfg))
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ddr_psci_param->update_deskew_cfg = 0;
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dmcfreq->set_rate_params = ddr_psci_param;
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rockchip_set_ddrclk_params(dmcfreq->set_rate_params);
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rockchip_set_ddrclk_dmcfreq_wait_complete(rockchip_dmcfreq_wait_complete);
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res = sip_smc_dram(SHARE_PAGE_TYPE_DDR, 0,
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ROCKCHIP_SIP_CONFIG_DRAM_INIT);
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if (res.a0) {
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