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arm64: dts: rockchip: rk3588s: Add dsm/vad device node
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com> Change-Id: I1dba3e89a3a4f9ca50579e4efabb12826e08235f
This commit is contained in:
@@ -339,6 +339,11 @@
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};
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};
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sys_grf: syscon@fd58c000 {
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compatible = "rockchip,rk3588-sys-grf", "syscon";
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reg = <0x0 0xfd58c000 0x0 0x1000>;
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};
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vo0_grf: syscon@fd5a6000 {
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compatible = "rockchip,rk3588-vo-grf", "syscon";
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reg = <0x0 0xfd5a6000 0x0 0x2000>;
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@@ -1284,6 +1289,20 @@
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status = "disabled";
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};
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vad: vad@fe4d0000 {
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compatible = "rockchip,rk3588-vad";
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reg = <0x0 0xfe4d0000 0x0 0x1000>;
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reg-names = "vad";
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clocks = <&cru HCLK_VAD>;
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clock-names = "hclk";
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interrupts = <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>;
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rockchip,audio-src = <0>;
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rockchip,det-channel = <0>;
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rockchip,mode = <0>;
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#sound-dai-cells = <0>;
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status = "disabled";
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};
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spdif_tx0: spdif-tx@fe4e0000 {
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compatible = "rockchip,rk3588-spdif", "rockchip,rk3568-spdif";
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reg = <0x0 0xfe4e0000 0x0 0x1000>;
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@@ -1312,6 +1331,21 @@
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status = "disabled";
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};
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acdcdig_dsm: codec-digital@fe500000 {
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compatible = "rockchip,rk3588-codec-digital", "rockchip,codec-digital-v1";
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reg = <0x0 0xfe500000 0x0 0x1000>;
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clocks = <&cru CLK_DAC_ACDCDIG>, <&cru PCLK_ACDCDIG>;
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clock-names = "dac", "pclk";
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resets = <&cru SRST_DAC_ACDCDIG>;
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reset-names = "reset" ;
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rockchip,grf = <&sys_grf>;
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rockchip,pwm-output-mode;
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pinctrl-names = "default";
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pinctrl-0 = <&auddsm_pins>;
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#sound-dai-cells = <0>;
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status = "disabled";
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};
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gic: interrupt-controller@fe600000 {
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compatible = "arm,gic-v3";
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#interrupt-cells = <3>;
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