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clk: rockchip: fix up the freq overshoot

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When integer divider switch to frac divider,
High frequency burrs that may appeared,
It's deadly to the system

Change-Id: I483449f9a0b980671f90d4c534fad033998deaf7
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
This commit is contained in:
Elaine Zhang
2018-05-28 11:45:52 +08:00
committed by Tao Huang
parent 96f06a1be2
commit c64eb759a8
1 changed files with 0 additions and 13 deletions
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13
drivers/clk/rockchip/clk.c
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@@ -122,7 +122,6 @@ struct rockchip_clk_frac {
const struct clk_ops *mux_ops;
int mux_frac_idx;
bool rate_change_remuxed;
int rate_change_idx;
};
@@ -143,18 +142,6 @@ static int rockchip_clk_frac_notifier_cb(struct notifier_block *nb,
frac->rate_change_idx = frac->mux_ops->get_parent(&frac_mux->hw);
if (frac->rate_change_idx != frac->mux_frac_idx) {
frac->mux_ops->set_parent(&frac_mux->hw, frac->mux_frac_idx);
frac->rate_change_remuxed = 1;
}
} else if (event == POST_RATE_CHANGE) {
/*
* The POST_RATE_CHANGE notifier runs directly after the
* divider clock is set in clk_change_rate, so we'll have
* remuxed back to the original parent before clk_change_rate
* reaches the mux itself.
*/
if (frac->rate_change_remuxed) {
frac->mux_ops->set_parent(&frac_mux->hw, frac->rate_change_idx);
frac->rate_change_remuxed = 0;
}
}