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arm64: dts: rockchip: Add vpu/vpu_mmu nodes for rk1808

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Change-Id: Ieaf28874d694136443fb7f0db3309018ae134453
Signed-off-by: Herman Chen <herman.chen@rock-chips.com>
This commit is contained in:
Herman Chen
2018-09-25 15:56:34 +08:00
committed by Tao Huang
parent 40be5ff4ec
commit c6646d1987
1 changed files with 104 additions and 75 deletions
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179
arch/arm64/boot/dts/rockchip/rk1808.dtsi
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@@ -758,81 +758,6 @@
status = "disabled";
};
vop_lite: vop@ffb00000 {
compatible = "rockchip,rk1808-vop-lit";
reg = <0x0 0xffb00000 0x0 0x200>;
reg-names = "regs";
interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru ACLK_VOPLITE>, <&cru DCLK_VOPLITE>,
<&cru HCLK_VOPLITE>;
clock-names = "aclk_vop", "dclk_vop", "hclk_vop";
power-domains = <&power RK1808_PD_VIO>;
iommus = <&vopl_mmu>;
status = "disabled";
vop_lite_out: port {
#address-cells = <1>;
#size-cells = <0>;
vop_lite_out_dsi: endpoint@0 {
reg = <0>;
remote-endpoint = <&dsi_in_vop_lite>;
};
vop_lite_out_rgb: endpoint@1 {
reg = <1>;
remote-endpoint = <&rgb_in_vop_lite>;
};
};
};
vopl_mmu: iommu@ffb00f00 {
compatible = "rockchip,iommu";
reg = <0x0 0xffb00f00 0x0 0x100>;
interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "vopl_mmu";
clocks = <&cru ACLK_VOPLITE>, <&cru HCLK_VOPLITE>;
clock-names = "aclk", "hclk";
power-domains = <&power RK1808_PD_VIO>;
#iommu-cells = <0>;
status = "disabled";
};
vop_raw: vop@ffb40000 {
compatible = "rockchip,rk1808-vop-raw";
reg = <0x0 0xffb40000 0x0 0x500>;
reg-names = "regs";
interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru ACLK_VOPRAW>, <&cru DCLK_VOPRAW>,
<&cru HCLK_VOPRAW>;
clock-names = "aclk_vop", "dclk_vop", "hclk_vop";
power-domains = <&power RK1808_PD_VIO>;
iommus = <&vopr_mmu>;
status = "disabled";
vop_raw_out: port {
#address-cells = <1>;
#size-cells = <0>;
vop_raw_out_csi: endpoint@0 {
reg = <0>;
remote-endpoint = <&csi_in_vop_raw>;
};
};
};
vopr_mmu: iommu@ffb40f00 {
compatible = "rockchip,iommu";
reg = <0x0 0xffb40f00 0x0 0x100>;
interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "vopr_mmu";
clocks = <&cru ACLK_VOPRAW>, <&cru HCLK_VOPRAW>;
clock-names = "aclk", "hclk";
power-domains = <&power RK1808_PD_VIO>;
#iommu-cells = <0>;
status = "disabled";
};
pwm8: pwm@ff5d0000 {
compatible = "rockchip,rk1808-pwm", "rockchip,rk3328-pwm";
reg = <0x0 0xff5d0000 0x0 0x10>;
@@ -954,6 +879,46 @@
status = "disabled";
};
vop_lite: vop@ffb00000 {
compatible = "rockchip,rk1808-vop-lit";
reg = <0x0 0xffb00000 0x0 0x200>;
reg-names = "regs";
interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru ACLK_VOPLITE>, <&cru DCLK_VOPLITE>,
<&cru HCLK_VOPLITE>;
clock-names = "aclk_vop", "dclk_vop", "hclk_vop";
power-domains = <&power RK1808_PD_VIO>;
iommus = <&vopl_mmu>;
status = "disabled";
vop_lite_out: port {
#address-cells = <1>;
#size-cells = <0>;
vop_lite_out_dsi: endpoint@0 {
reg = <0>;
remote-endpoint = <&dsi_in_vop_lite>;
};
vop_lite_out_rgb: endpoint@1 {
reg = <1>;
remote-endpoint = <&rgb_in_vop_lite>;
};
};
};
vopl_mmu: iommu@ffb00f00 {
compatible = "rockchip,iommu";
reg = <0x0 0xffb00f00 0x0 0x100>;
interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "vopl_mmu";
clocks = <&cru ACLK_VOPLITE>, <&cru HCLK_VOPLITE>;
clock-names = "aclk", "hclk";
power-domains = <&power RK1808_PD_VIO>;
#iommu-cells = <0>;
status = "disabled";
};
csi_tx: csi@ffb20000 {
compatible = "rockchip,rk1808-mipi-csi";
reg = <0x0 0xffb20000 0x0 0x500>;
@@ -1006,6 +971,70 @@
};
};
vop_raw: vop@ffb40000 {
compatible = "rockchip,rk1808-vop-raw";
reg = <0x0 0xffb40000 0x0 0x500>;
reg-names = "regs";
interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru ACLK_VOPRAW>, <&cru DCLK_VOPRAW>,
<&cru HCLK_VOPRAW>;
clock-names = "aclk_vop", "dclk_vop", "hclk_vop";
power-domains = <&power RK1808_PD_VIO>;
iommus = <&vopr_mmu>;
status = "disabled";
vop_raw_out: port {
#address-cells = <1>;
#size-cells = <0>;
vop_raw_out_csi: endpoint@0 {
reg = <0>;
remote-endpoint = <&csi_in_vop_raw>;
};
};
};
vopr_mmu: iommu@ffb40f00 {
compatible = "rockchip,iommu";
reg = <0x0 0xffb40f00 0x0 0x100>;
interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "vopr_mmu";
clocks = <&cru ACLK_VOPRAW>, <&cru HCLK_VOPRAW>;
clock-names = "aclk", "hclk";
power-domains = <&power RK1808_PD_VIO>;
#iommu-cells = <0>;
status = "disabled";
};
vpu: vpu@ffb80000 {
compatible = "rockchip,vpu_service";
reg = <0x0 0xffb80000 0x0 0x800>;
interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "irq_enc", "irq_dec";
clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>;
clock-names = "aclk_vcodec", "hclk_vcodec";
power-domains = <&power RK1808_PD_VPU>;
resets = <&cru SRST_VPU_A>, <&cru SRST_VPU_H>;
reset-names = "video_a", "video_h";
iommus = <&vpu_mmu>;
iommu_enabled = <1>;
allocator = <1>; /* 0 means ion, 1 means drm */
status = "disabled";
};
vpu_mmu: iommu@ffb80800 {
compatible = "rockchip,iommu";
reg = <0x0 0xffb80800 0x0 0x100>;
interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "vpu_mmu";
clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>;
clock-names = "aclk", "hclk";
power-domains = <&power RK1808_PD_VPU>;
#iommu-cells = <0>;
status = "disabled";
};
sdio: dwmmc@ffc60000 {
compatible = "rockchip,rk1808-dw-mshc", "rockchip,rk3288-dw-mshc";
reg = <0x0 0xffc60000 0x0 0x4000>;