ARM: dts: rockchip: add csiphy0_pclk to thunder_boot_rkisp for rv1126-thunder-boot

Signed-off-by: Hu Kejun <william.hu@rock-chips.com>
Change-Id: Id797c8cca9afc9a7d7582970eb5c96bd9c63e35e
This commit is contained in:
Hu Kejun
2020-09-18 16:53:07 +08:00
committed by Tao Huang
parent 75200228a6
commit c6e7c35ce4

View File

@@ -57,11 +57,14 @@
<&cru CLK_ISP>, <&cru CLK_MIPICSI_OUT>,
<&cru CLK_I2C1>, <&cru PCLK_I2C1>,
<&cru CLK_SCR1>, <&cru CLK_SCR1_CORE>,
<&cru CLK_SCR1_RTC>, <&cru CLK_SCR1_JTAG>;
clock-names = "aclk_isp", "hclk_isp", "clk_isp",
"xvclk", "i2c", "pclk",
<&cru CLK_SCR1_RTC>, <&cru CLK_SCR1_JTAG>,
<&cru PCLK_CSIPHY0>;
clock-names = "aclk_isp", "hclk_isp",
"clk_isp", "xvclk",
"i2c1", "i2c1_pclk",
"clk_scr1", "clk_scr1_core",
"clk_scr1_rtc", "clk_scr1_jtag";
"clk_scr1_rtc", "clk_scr1_jtag",
"csiphy0_pclk";
assigned-clocks = <&cru ACLK_ISP>, <&cru HCLK_ISP>, <&cru CLK_MIPICSI_OUT>;
assigned-clock-rates = <500000000>, <250000000>, <24000000>;
power-domains = <&power RV1126_PD_VI>;