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di: change clkb frq from 500 to 667 [1/1]

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PD#SWPL-6762

Problem:
di clkb frq is not right

Solution:
change from 500 to 667

Verify:
tl1

Change-Id: I9c62bb9936630937f19d8a6b490a8266d73a268c
Signed-off-by: Yong Qin <yong.qin@amlogic.com>
This commit is contained in:
Yong Qin
2019-04-04 16:16:58 +08:00
committed by Tao Zeng
parent 0b352e3e35
commit c75a783c42
7 changed files with 37 additions and 13 deletions
Download Patch File Download Diff File Expand all files Collapse all files

6
arch/arm/boot/dts/amlogic/tl1_t962x2_t309.dts
View File

@@ -216,9 +216,11 @@
0 40 1>;
interrupt-names = "pre_irq", "post_irq";
clocks = <&clkc CLKID_VPU_CLKB_TMP_COMP>,
<&clkc CLKID_VPU_CLKB_COMP>;
<&clkc CLKID_VPU_CLKB_COMP>,
<&clkc CLKID_VPU_MUX>;
clock-names = "vpu_clkb_tmp_composite",
"vpu_clkb_composite";
"vpu_clkb_composite",
"vpu_mux";
clock-range = <334 667>;
/* buffer-size = <3621952>;(yuv422 8bit) */
buffer-size = <4074560>;/*yuv422 fullpack*/

6
arch/arm/boot/dts/amlogic/tl1_t962x2_x301_1g.dts
View File

@@ -223,9 +223,11 @@
0 40 1>;
interrupt-names = "pre_irq", "post_irq";
clocks = <&clkc CLKID_VPU_CLKB_TMP_COMP>,
<&clkc CLKID_VPU_CLKB_COMP>;
<&clkc CLKID_VPU_CLKB_COMP>,
<&clkc CLKID_VPU_MUX>;
clock-names = "vpu_clkb_tmp_composite",
"vpu_clkb_composite";
"vpu_clkb_composite",
"vpu_mux";
clock-range = <334 667>;
/* buffer-size = <3621952>;(yuv422 8bit) */
buffer-size = <4074560>;/*yuv422 fullpack*/

6
arch/arm/boot/dts/amlogic/tl1_t962x2_x301_2g.dts
View File

@@ -218,9 +218,11 @@
0 40 1>;
interrupt-names = "pre_irq", "post_irq";
clocks = <&clkc CLKID_VPU_CLKB_TMP_COMP>,
<&clkc CLKID_VPU_CLKB_COMP>;
<&clkc CLKID_VPU_CLKB_COMP>,
<&clkc CLKID_VPU_MUX>;
clock-names = "vpu_clkb_tmp_composite",
"vpu_clkb_composite";
"vpu_clkb_composite",
"vpu_mux";
clock-range = <334 667>;
/* buffer-size = <3621952>;(yuv422 8bit) */
buffer-size = <4074560>;/*yuv422 fullpack*/

6
arch/arm64/boot/dts/amlogic/tl1_t962x2_t309.dts
View File

@@ -214,9 +214,11 @@
0 40 1>;
interrupt-names = "pre_irq", "post_irq";
clocks = <&clkc CLKID_VPU_CLKB_TMP_COMP>,
<&clkc CLKID_VPU_CLKB_COMP>;
<&clkc CLKID_VPU_CLKB_COMP>,
<&clkc CLKID_VPU_MUX>;
clock-names = "vpu_clkb_tmp_composite",
"vpu_clkb_composite";
"vpu_clkb_composite",
"vpu_mux";
clock-range = <334 667>;
/* buffer-size = <3621952>;(yuv422 8bit) */
buffer-size = <4074560>;/*yuv422 fullpack*/

6
arch/arm64/boot/dts/amlogic/tl1_t962x2_x301_1g.dts
View File

@@ -220,9 +220,11 @@
0 40 1>;
interrupt-names = "pre_irq", "post_irq";
clocks = <&clkc CLKID_VPU_CLKB_TMP_COMP>,
<&clkc CLKID_VPU_CLKB_COMP>;
<&clkc CLKID_VPU_CLKB_COMP>,
<&clkc CLKID_VPU_MUX>;
clock-names = "vpu_clkb_tmp_composite",
"vpu_clkb_composite";
"vpu_clkb_composite",
"vpu_mux";
clock-range = <334 667>;
/* buffer-size = <3621952>;(yuv422 8bit) */
buffer-size = <4074560>;/*yuv422 fullpack*/

6
arch/arm64/boot/dts/amlogic/tl1_t962x2_x301_2g.dts
View File

@@ -214,9 +214,11 @@
0 40 1>;
interrupt-names = "pre_irq", "post_irq";
clocks = <&clkc CLKID_VPU_CLKB_TMP_COMP>,
<&clkc CLKID_VPU_CLKB_COMP>;
<&clkc CLKID_VPU_CLKB_COMP>,
<&clkc CLKID_VPU_MUX>;
clock-names = "vpu_clkb_tmp_composite",
"vpu_clkb_composite";
"vpu_clkb_composite",
"vpu_mux";
clock-range = <334 667>;
/* buffer-size = <3621952>;(yuv422 8bit) */
buffer-size = <4074560>;/*yuv422 fullpack*/

14
drivers/amlogic/media/deinterlace/deinterlace.c
View File

@@ -7658,6 +7658,7 @@ static void di_get_vpu_clkb(struct device *dev, struct di_dev_s *pdev)
int ret = 0;
unsigned int tmp_clk[2] = {0, 0};
struct clk *vpu_clk = NULL;
struct clk *clkb_tmp_comp = NULL;
vpu_clk = clk_get(dev, "vpu_mux");
if (IS_ERR(vpu_clk))
@@ -7678,9 +7679,20 @@ static void di_get_vpu_clkb(struct device *dev, struct di_dev_s *pdev)
pdev->clkb_max_rate);
#ifdef CLK_TREE_SUPPORT
pdev->vpu_clkb = clk_get(dev, "vpu_clkb_composite");
clkb_tmp_comp = clk_get(dev, "vpu_clkb_tmp_composite");
if (IS_ERR(clkb_tmp_comp))
pr_err("clkb_tmp_comp error\n");
else {
if (!IS_ERR(vpu_clk))
clk_set_parent(clkb_tmp_comp, vpu_clk);
}
if (IS_ERR(pdev->vpu_clkb))
pr_err("%s: get vpu clkb gate error.\n", __func__);
clk_set_rate(pdev->vpu_clkb, pdev->clkb_min_rate);
else {
clk_set_rate(pdev->vpu_clkb, pdev->clkb_min_rate);
pr_info("get clkb rate:%ld\n", clk_get_rate(pdev->vpu_clkb));
}
#endif
}