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RK2928 USB

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This commit is contained in:
wlf
2012-08-21 12:41:07 +08:00
parent 0d54b690bb
commit c8d3adfb02
3 changed files with 21 additions and 34 deletions
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6
drivers/usb/dwc_otg/dwc_otg_driver.c
View File

@@ -1295,7 +1295,6 @@ static __devinit int dwc_otg_driver_probe(struct platform_device *pdev)
clk_disable(ahbclk);
#endif
#endif
//need to be checked @wlf
#ifdef CONFIG_ARCH_RK2928
#ifndef CONFIG_USB20_HOST
otg_phy_con = (unsigned int*)(USBGRF_UOC1_CON5);
@@ -1417,8 +1416,7 @@ static __devinit int dwc_otg_driver_probe(struct platform_device *pdev)
dwc_otg_device->phyclk = phyclk;
dwc_otg_device->ahbclk = ahbclk;
#endif
//need to be checked @wlf
#if 0//def CONFIG_ARCH_RK2928
#ifdef CONFIG_ARCH_RK2928
otg_phy_con = (unsigned int*)(USBGRF_UOC0_CON5);
cru_set_soft_reset(SOFT_RST_USBPHY0, true);
cru_set_soft_reset(SOFT_RST_OTGC0, true);
@@ -2206,7 +2204,7 @@ static __devinit int host20_driver_probe(struct platform_device *pdev)
ahbclk = clk_get(NULL, "hclk_otg1");
#endif
#ifdef CONFIG_ARCH_RK2928
ahbclk = clk_get(NULL, "hclk_otg1"); //need to be checked @wlf
ahbclk = clk_get(NULL, "hclk_otg1");
#endif
if (IS_ERR(ahbclk)) {
retval = PTR_ERR(ahbclk);

34
drivers/usb/dwc_otg/dwc_otg_hcd.c
View File

@@ -624,21 +624,15 @@ static int32_t dwc_otg_phy_suspend_cb( void *_p, int suspend)
DWC_DEBUGPL(DBG_PCDV, "disable usb phy\n");
}
#endif
#if 0//def CONFIG_ARCH_RK2928
#ifdef CONFIG_ARCH_RK2928
unsigned int * otg_phy_con1 = (unsigned int*)(USBGRF_UOC0_CON5);
if(exitsuspend && (pcd->phy_suspend == 1)) {
clk_enable(pcd->otg_dev->ahbclk);
clk_enable(pcd->otg_dev->phyclk);
pcd->phy_suspend = 0;
if(suspend) {
*otg_phy_con1 = (0x01<<16); // exit suspend.
DWC_DEBUGPL(DBG_PCDV, "enable usb phy\n");
}
if( !exitsuspend && (pcd->phy_suspend == 0)) {
pcd->phy_suspend = 1;
*otg_phy_con1 = 0x55 |(0x7f<<16); // enter suspend.
else{
*otg_phy_con1 = 0x1D5 |(0x1ff<<16); // enter suspend. enable dm,dp Pull-Down Resistor wlf @2012.8.10
udelay(3);
clk_disable(pcd->otg_dev->phyclk);
clk_disable(pcd->otg_dev->ahbclk);
DWC_DEBUGPL(DBG_PCDV, "disable usb phy\n");
}
#endif
@@ -761,9 +755,9 @@ static void dwc_otg_hcd_connect_detect(unsigned long pdata)
}
if(dwc_otg_hcd->host_setenable != dwc_otg_hcd->host_enabled){
#ifdef CONFIG_ARCH_RK30
DWC_PRINT("%s schedule delaywork 0x%x, 0x%x\n", __func__, dwc_read_reg32(core_if->host_if->hprt0), usbgrf_status& (7<<22));
DWC_PRINT("%s schedule delaywork, hprt 0x%08x, grfstatus 0x%08x\n", __func__, dwc_read_reg32(core_if->host_if->hprt0), usbgrf_status& (7<<22));
#else //CONFIG_ARCH_RK2928
DWC_PRINT("%s schedule delaywork \n", __func__, dwc_read_reg32(core_if->host_if->hprt0), usbgrf_status& (7<<12));
DWC_PRINT("%s schedule delaywork, hprt 0x%08x, grfstatus 0x%08x\n", __func__, dwc_read_reg32(core_if->host_if->hprt0), usbgrf_status& (7<<12));
#endif
schedule_delayed_work(&dwc_otg_hcd->host_enable_work, 8);
}
@@ -1149,21 +1143,15 @@ static int32_t host20_phy_suspend_cb( void *_p, int suspend)
DWC_DEBUGPL(DBG_PCDV, "disable usb phy\n");
}
#endif
#if 0//def CONFIG_ARCH_RK2928
unsigned int * otg_phy_con1 = (unsigned int*)(USBGRF_UOC0_CON5);
if(exitsuspend && (pcd->phy_suspend == 1)) {
clk_enable(pcd->otg_dev->ahbclk);
clk_enable(pcd->otg_dev->phyclk);
pcd->phy_suspend = 0;
#ifdef CONFIG_ARCH_RK2928
unsigned int * otg_phy_con1 = (unsigned int*)(USBGRF_UOC1_CON5);
if(suspend) {
*otg_phy_con1 = (0x01<<16); // exit suspend.
DWC_DEBUGPL(DBG_PCDV, "enable usb phy\n");
}
if( !exitsuspend && (pcd->phy_suspend == 0)) {
pcd->phy_suspend = 1;
*otg_phy_con1 = 0x55 |(0x7f<<16); // enter suspend.
else{
*otg_phy_con1 = 0x1D5 |(0x1ff<<16); // enter suspend. enable dm,dp Pull-Down Resistor wlf @2012.8.10
udelay(3);
clk_disable(pcd->otg_dev->phyclk);
clk_disable(pcd->otg_dev->ahbclk);
DWC_DEBUGPL(DBG_PCDV, "disable usb phy\n");
}
#endif

15
drivers/usb/dwc_otg/dwc_otg_pcd.c
View File

@@ -1682,10 +1682,10 @@ int dwc_otg20phy_suspend( int exitsuspend )
}
if( !exitsuspend && (pcd->phy_suspend == 0)) {
pcd->phy_suspend = 1;
*otg_phy_con1 = 0x55 |(0x7f<<16); // enter suspend.
// *otg_phy_con1 = 0x1D5 |(0x1ff<<16); // enter suspend. enable dm,dp debug_wlf @2012.8.10
*otg_phy_con1 = 0x1D5 |(0x1ff<<16); // enter suspend. enable dm,dp Pull-Down Resistor wlf @2012.8.10
udelay(3);
clk_disable(pcd->otg_dev->phyclk);
// otg/host20 use the same phyclk, so can't disable phyclk in case host20 is used. wlf @2012.8.16
// clk_disable(pcd->otg_dev->phyclk);
clk_disable(pcd->otg_dev->ahbclk);
DWC_DEBUGPL(DBG_PCDV, "disable usb phy\n");
}
@@ -1918,7 +1918,6 @@ static void dwc_otg_pcd_check_vbus_timer( unsigned long pdata )
/* if usb not connect before ,then start connect */
if( _pcd->vbus_status == 0 ) {
DWC_PRINT("********vbus detect*********************************************\n");
dwc_otg_msc_lock(_pcd);
_pcd->vbus_status = 1;
if(_pcd->conn_en)
goto connect;
@@ -1935,16 +1934,16 @@ static void dwc_otg_pcd_check_vbus_timer( unsigned long pdata )
_pcd->conn_status++;
if((dwc_read_reg32((uint32_t*)((uint8_t *)_pcd->otg_dev->base + DWC_OTG_HOST_PORT_REGS_OFFSET))&0xc00) == 0xc00)
_pcd->vbus_status = 2;
dwc_otg20phy_suspend(0);
}
}else {
_pcd->vbus_status = 0;
if(_pcd->conn_status)
{
if(_pcd->conn_status){
_pcd->conn_status = 0;
dwc_otg_msc_unlock(_pcd);
}
/* every 500 ms open usb phy power and start 1 jiffies timer to get vbus */
if( _pcd->phy_suspend == 0 )
else if( _pcd->phy_suspend == 0 )
/* no vbus detect here , close usb phy */
dwc_otg20phy_suspend( 0 );
}
@@ -1953,6 +1952,8 @@ static void dwc_otg_pcd_check_vbus_timer( unsigned long pdata )
return;
connect:
if(_pcd->conn_status==0)
dwc_otg_msc_lock(_pcd);
if( _pcd->phy_suspend == 1 )
dwc_otg20phy_suspend( 1 );
schedule_delayed_work( &_pcd->reconnect , 8 ); /* delay 1 jiffies */