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cvbs: add cvbs support for sm1 [1/1]
PD#SWPL-6112 Problem: need add cvbsout support for sm1 Solution: add cvbsout support for sm1 Verify: sm1 Change-Id: I037fbdb41b823d9ef93a9069f3798f8d38ac5796 Signed-off-by: Nian Jing <nian.jing@amlogic.com>
This commit is contained in:
@@ -1180,7 +1180,7 @@
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};
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vdac {
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compatible = "amlogic, vdac-g12a";
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compatible = "amlogic, vdac-sm1";
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status = "okay";
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};
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@@ -131,7 +131,7 @@
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};
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cvbsout {
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compatible = "amlogic, cvbsout-g12a";
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compatible = "amlogic, cvbsout-sm1";
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dev_name = "cvbsout";
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status = "okay";
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clocks = <&clkc CLKID_VCLK2_ENCI
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@@ -145,7 +145,7 @@
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clk_path = <0>;
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/* performance: reg_address, reg_value */
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/* g12a */
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/* sm1 */
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performance = <0x1bf0 0x9
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0x1b56 0x333
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0x1b12 0x8080
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@@ -171,7 +171,7 @@
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};
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cvbsout {
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compatible = "amlogic, cvbsout-g12a";
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compatible = "amlogic, cvbsout-sm1";
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dev_name = "cvbsout";
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status = "okay";
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clocks = <&clkc CLKID_VCLK2_ENCI
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@@ -190,7 +190,7 @@
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clk_path = <0>;
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/* performance: reg_address, reg_value */
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/* g12a */
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/* sm1 */
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performance = <0x1bf0 0x9
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0x1b56 0x333
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0x1b12 0x8080
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@@ -171,7 +171,7 @@
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};
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cvbsout {
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compatible = "amlogic, cvbsout-g12a";
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compatible = "amlogic, cvbsout-sm1";
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dev_name = "cvbsout";
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status = "okay";
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clocks = <&clkc CLKID_VCLK2_ENCI
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@@ -190,7 +190,7 @@
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clk_path = <0>;
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/* performance: reg_address, reg_value */
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/* g12a */
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/* sm1 */
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performance = <0x1bf0 0x9
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0x1b56 0x333
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0x1b12 0x8080
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@@ -1180,7 +1180,7 @@
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};
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vdac {
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compatible = "amlogic, vdac-g12a";
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compatible = "amlogic, vdac-sm1";
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status = "okay";
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};
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@@ -132,7 +132,7 @@
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};
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cvbsout {
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compatible = "amlogic, cvbsout-g12a";
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compatible = "amlogic, cvbsout-sm1";
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dev_name = "cvbsout";
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status = "okay";
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clocks = <&clkc CLKID_VCLK2_ENCI
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@@ -146,7 +146,7 @@
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clk_path = <0>;
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/* performance: reg_address, reg_value */
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/* g12a */
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/* sm1 */
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performance = <0x1bf0 0x9
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0x1b56 0x333
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0x1b12 0x8080
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@@ -169,7 +169,7 @@
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};
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cvbsout {
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compatible = "amlogic, cvbsout-g12a";
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compatible = "amlogic, cvbsout-sm1";
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dev_name = "cvbsout";
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status = "okay";
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clocks = <&clkc CLKID_VCLK2_ENCI
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@@ -188,7 +188,7 @@
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clk_path = <0>;
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/* performance: reg_address, reg_value */
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/* g12a */
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/* sm1 */
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performance = <0x1bf0 0x9
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0x1b56 0x333
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0x1b12 0x8080
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@@ -169,7 +169,7 @@
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};
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cvbsout {
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compatible = "amlogic, cvbsout-g12a";
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compatible = "amlogic, cvbsout-sm1";
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dev_name = "cvbsout";
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status = "okay";
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clocks = <&clkc CLKID_VCLK2_ENCI
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@@ -188,7 +188,7 @@
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clk_path = <0>;
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/* performance: reg_address, reg_value */
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/* g12a */
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/* sm1 */
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performance = <0x1bf0 0x9
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0x1b56 0x333
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0x1b12 0x8080
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@@ -903,17 +903,13 @@ static void cvbs_performance_regs_dump(void)
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pr_info("vcbus [0x%x] = 0x%x\n", performance_regs_enci[i],
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cvbs_out_reg_read(performance_regs_enci[i]));
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}
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if (cvbs_cpu_type() == CVBS_CPU_TYPE_G12A ||
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cvbs_cpu_type() == CVBS_CPU_TYPE_G12B ||
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cvbs_cpu_type() == CVBS_CPU_TYPE_TL1)
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if (cvbs_cpu_type() >= CVBS_CPU_TYPE_G12A)
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size = sizeof(performance_regs_vdac_g12a)/sizeof(unsigned int);
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else
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size = sizeof(performance_regs_vdac)/sizeof(unsigned int);
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pr_info("------------------------\n");
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for (i = 0; i < size; i++) {
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if (cvbs_cpu_type() == CVBS_CPU_TYPE_G12A ||
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cvbs_cpu_type() == CVBS_CPU_TYPE_G12B ||
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cvbs_cpu_type() == CVBS_CPU_TYPE_TL1)
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if (cvbs_cpu_type() >= CVBS_CPU_TYPE_G12A)
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pr_info("hiu [0x%x] = 0x%x\n",
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performance_regs_vdac_g12a[i],
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cvbs_out_hiu_read(performance_regs_vdac_g12a[i]));
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@@ -1210,9 +1206,7 @@ static void cvbs_debug_store(char *buf)
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cvbs_performance_config_dump();
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break;
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case CMD_VP_SET_PLLPATH:
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if (cvbs_cpu_type() != CVBS_CPU_TYPE_G12A &&
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cvbs_cpu_type() != CVBS_CPU_TYPE_G12B &&
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cvbs_cpu_type() != CVBS_CPU_TYPE_TL1) {
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if (cvbs_cpu_type() < CVBS_CPU_TYPE_G12A) {
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print_info("ERR:Only after g12a/b chip supported\n");
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break;
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}
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@@ -1458,6 +1452,12 @@ struct meson_cvbsout_data meson_tl1_cvbsout_data = {
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.name = "meson-tl1-cvbsout",
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};
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struct meson_cvbsout_data meson_sm1_cvbsout_data = {
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.cntl0_val = 0x8f6001,
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.cpu_id = CVBS_CPU_TYPE_SM1,
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.name = "meson-sm1-cvbsout",
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};
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static const struct of_device_id meson_cvbsout_dt_match[] = {
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{
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.compatible = "amlogic, cvbsout-gxl",
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@@ -1477,6 +1477,9 @@ static const struct of_device_id meson_cvbsout_dt_match[] = {
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}, {
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.compatible = "amlogic, cvbsout-tl1",
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.data = &meson_tl1_cvbsout_data,
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}, {
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.compatible = "amlogic, cvbsout-sm1",
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.data = &meson_sm1_cvbsout_data,
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},
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{},
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};
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@@ -52,6 +52,7 @@ enum cvbs_cpu_type {
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CVBS_CPU_TYPE_G12A = 4,
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CVBS_CPU_TYPE_G12B = 5,
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CVBS_CPU_TYPE_TL1 = 6,
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CVBS_CPU_TYPE_SM1 = 7,
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};
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struct meson_cvbsout_data {
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@@ -183,7 +183,8 @@ void set_vmode_clk(void)
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cvbs_out_hiu_setb(HHI_VIID_CLK_CNTL, 0, VCLK2_EN, 1);
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udelay(5);
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} else if (cvbs_cpu_type() == CVBS_CPU_TYPE_G12A ||
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cvbs_cpu_type() == CVBS_CPU_TYPE_G12B) {
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cvbs_cpu_type() == CVBS_CPU_TYPE_G12B ||
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cvbs_cpu_type() == CVBS_CPU_TYPE_SM1) {
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if (cvbs_clk_path & 0x1) {
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pr_info("config g12a gp0_pll\n");
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cvbs_out_hiu_write(HHI_GP0_PLL_CNTL0, 0x180204f7);
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@@ -250,7 +251,8 @@ void set_vmode_clk(void)
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}
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if (cvbs_cpu_type() == CVBS_CPU_TYPE_G12A ||
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cvbs_cpu_type() == CVBS_CPU_TYPE_G12B) {
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cvbs_cpu_type() == CVBS_CPU_TYPE_G12B ||
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cvbs_cpu_type() == CVBS_CPU_TYPE_SM1) {
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if (cvbs_clk_path & 0x2)
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cvbs_set_vid1_clk(cvbs_clk_path & 0x1);
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else
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@@ -274,7 +276,8 @@ void set_vmode_clk(void)
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void disable_vmode_clk(void)
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{
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if (cvbs_cpu_type() == CVBS_CPU_TYPE_G12A ||
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cvbs_cpu_type() == CVBS_CPU_TYPE_G12B) {
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cvbs_cpu_type() == CVBS_CPU_TYPE_G12B ||
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cvbs_cpu_type() == CVBS_CPU_TYPE_SM1) {
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if (cvbs_clk_path & 0x2)
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disable_vid1_clk_out();
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else
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@@ -589,6 +589,11 @@ struct meson_vdac_data meson_tl1_vdac_data = {
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.name = "meson-tl1-vdac",
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};
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struct meson_vdac_data meson_sm1_vdac_data = {
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.cpu_id = VDAC_CPU_SM1,
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.name = "meson-sm1-vdac",
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};
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static const struct of_device_id meson_vdac_dt_match[] = {
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{
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.compatible = "amlogic, vdac-gxtvbb",
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@@ -620,6 +625,9 @@ static const struct of_device_id meson_vdac_dt_match[] = {
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}, {
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.compatible = "amlogic, vdac-tl1",
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.data = &meson_tl1_vdac_data,
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}, {
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.compatible = "amlogic, vdac-sm1",
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.data = &meson_sm1_vdac_data,
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},
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{},
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};
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@@ -701,7 +709,8 @@ static int __exit aml_vdac_remove(struct platform_device *pdev)
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static int amvdac_drv_suspend(struct platform_device *pdev,
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pm_message_t state)
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{
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if (s_vdac_data->cpu_id == VDAC_CPU_TXL)
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if (s_vdac_data->cpu_id == VDAC_CPU_TXL ||
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s_vdac_data->cpu_id == VDAC_CPU_TXLX)
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vdac_hiu_reg_write(HHI_VDAC_CNTL0, 0);
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else if (s_vdac_data->cpu_id == VDAC_CPU_TL1)
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vdac_hiu_reg_setb(HHI_VDAC_CNTL1_G12A, 1, 7, 1);
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@@ -725,8 +734,11 @@ static void amvdac_drv_shutdown(struct platform_device *pdev)
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pr_info("%s: shutdown module\n", __func__);
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cntl0 = 0x0;
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if (is_meson_txl_cpu() || is_meson_txlx_cpu())
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if (s_vdac_data->cpu_id == VDAC_CPU_TXL ||
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s_vdac_data->cpu_id == VDAC_CPU_TXLX)
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cntl1 = 0x0;
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else if (s_vdac_data->cpu_id == VDAC_CPU_TL1)
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cntl1 = 0x80;
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else
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cntl1 = 0x8;
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vdac_set_ctrl0_ctrl1(cntl0, cntl1);
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@@ -27,6 +27,7 @@ enum vdac_cpu_type {
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VDAC_CPU_TXHD = 5,
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VDAC_CPU_G12AB = 6,
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VDAC_CPU_TL1 = 7,
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VDAC_CPU_SM1 = 8,
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VDAC_CPU_MAX,
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};
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